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Copyright (C) 2017-2021 Intel Corporation

SPDX-License-Identifier: MIT

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This file is distributed under the University of Illinois Open Source License.
See LICENSE.TXT for details.

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Copyright (C) 2014 Advanced Micro Devices, Inc. All rights reserved.

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// This file defines Operation Code class for SPIR-V.

#ifndef SPIRVOPCODE_HPP_
#define SPIRVOPCODE_HPP_

#include "SPIRVUtil.h"
#include "spirv.hpp"
#include <string>
#include "Probe/Assertion.h"

namespace igc_spv{

template<> inline void
SPIRVMap<Op, std::string>::init() {
#define _SPIRV_OP(x, ...) add(Op##x, #x);
#include "SPIRVOpCodeEnum.h"
#undef _SPIRV_OP
}
SPIRV_DEF_NAMEMAP(Op, OpCodeNameMap)

inline bool isAtomicOpCode(Op OpCode) {
  IGC_ASSERT(OpAtomicLoad < OpAtomicXor);
  return ((unsigned)OpCode >= OpAtomicLoad
      && (unsigned)OpCode <= OpAtomicXor)
      || OpCode == OpAtomicFlagTestAndSet
      || OpCode == OpAtomicFlagClear;
}
inline bool isBinaryOpCode(Op OpCode) {
  return ((unsigned)OpCode >= OpIAdd &&
      (unsigned)OpCode <= OpFMod) ||
      OpCode == OpDot;
}

inline bool isShiftOpCode(Op OpCode) {
  return (unsigned)OpCode >= OpShiftRightLogical &&
      (unsigned)OpCode <= OpShiftLeftLogical;
}

inline bool isLogicalOpCode(Op OpCode) {
  return (unsigned)OpCode >= OpLogicalEqual &&
      (unsigned)OpCode <= OpLogicalNot;
}

inline bool isBitwiseOpCode(Op OpCode) {
  return (unsigned)OpCode >= OpBitwiseOr &&
      (unsigned)OpCode <= OpBitwiseAnd;
}

inline bool isBinaryShiftLogicalBitwiseOpCode(Op OpCode) {
  return (((unsigned)OpCode >= OpShiftRightLogical &&
      (unsigned)OpCode <= OpBitwiseAnd) ||
      isBinaryOpCode(OpCode));
}

inline bool isCmpOpCode(Op OpCode) {
  return ((unsigned)OpCode >= OpIEqual &&
      (unsigned)OpCode <= OpFUnordGreaterThanEqual) ||
      (OpCode >= OpLessOrGreater && OpCode <= OpLogicalNotEqual);
}

inline bool isCvtOpCode(Op OpCode) {
  return ((unsigned)OpCode >= OpConvertFToU &&
      (unsigned)OpCode <= OpBitcast) ||
      OpCode == OpSatConvertSToU ||
      OpCode == OpSatConvertUToS;
}

inline bool isCvtToUnsignedOpCode(Op OpCode) {
  return OpCode == OpConvertFToU ||
      OpCode == OpUConvert ||
      OpCode == OpSatConvertSToU;
}

inline bool isCvtFromUnsignedOpCode(Op OpCode) {
  return OpCode == OpConvertUToF ||
      OpCode == OpUConvert ||
      OpCode == OpSatConvertUToS;
}

inline bool isOpaqueGenericTypeOpCode(Op OpCode) {
  return (unsigned)OpCode >= OpTypeEvent &&
      (unsigned)OpCode <= OpTypePipe;
}

inline bool isGenericNegateOpCode(Op OpCode) {
  return (unsigned)OpCode == OpSNegate ||
      (unsigned)OpCode == OpFNegate ||
      (unsigned)OpCode == OpNot;
}

inline bool isAccessChainOpCode(Op OpCode) {
  return OpCode == OpAccessChain ||
      OpCode == OpInBoundsAccessChain;
}

inline bool hasExecScope(Op OpCode) {
  unsigned OC = OpCode;
  return (OpGroupWaitEvents <= OC &&
            OC <= OpGroupSMax) ||
      (OpGroupReserveReadPipePackets <= OC &&
          OC <= OpGroupCommitWritePipe);
}

inline bool hasGroupOperation(Op OpCode) {
  unsigned OC = OpCode;
  return (OpGroupIAdd <= OC && OC <= OpGroupSMax) ||
         (OpGroupNonUniformBallotBitCount == OC)  ||
         (OpGroupNonUniformIAdd <= OC && OC <= OpGroupNonUniformLogicalXor);
}

inline bool isSubgroupAvcINTELTypeOpCode(Op OpCode) {
  unsigned OC = OpCode;
  return OpTypeAvcImePayloadINTEL <= OC && OC <= OpTypeAvcSicResultINTEL;
}

inline unsigned getSubgroupAvcINTELTypeVectorWidth(Op Opcode) {
  IGC_ASSERT(isSubgroupAvcINTELTypeOpCode(Opcode));

  switch (Opcode) {
  case OpTypeAvcImeResultSingleReferenceStreamoutINTEL:
  case OpTypeAvcImeResultDualReferenceStreamoutINTEL:
    return 8;

  case OpTypeAvcImePayloadINTEL:
  case OpTypeAvcRefPayloadINTEL:
  case OpTypeAvcSicPayloadINTEL:
  case OpTypeAvcMcePayloadINTEL:
  case OpTypeAvcMceResultINTEL:
  case OpTypeAvcImeResultINTEL:
  case OpTypeAvcRefResultINTEL:
  case OpTypeAvcSicResultINTEL:
    return 4;

  case OpTypeAvcImeDualReferenceStreaminINTEL:
    return 2;

  case OpTypeAvcImeSingleReferenceStreaminINTEL:
    // Scalar.
    return 1;

  default:
    IGC_ASSERT_MESSAGE(0, "Unknown VME Opcode!");
    return 0;
  }
}

inline bool isVCOpCode(Op OpCode) { return OpCode == OpTypeBufferSurfaceINTEL; }

inline bool isTypeOpCode(Op OpCode) {
  unsigned OC = OpCode;
  return (OpTypeVoid <= OC && OC <= OpTypePipe) ||
         isSubgroupAvcINTELTypeOpCode(OpCode) || OC == OpTypeVmeImageINTEL ||
         isVCOpCode(OpCode) || OC == OpTypeTokenINTEL;
}

inline bool isConstantOpCode(Op OpCode) {
  unsigned OC = OpCode;
  return (OpConstantTrue <= OC
      && OC <= OpSpecConstantOp)
      || OC == OpUndef || OC == OpConstFunctionPointerINTEL;
}

inline bool isModuleScopeAllowedOpCode(Op OpCode) {
  return OpCode == OpVariable ||
      isConstantOpCode(OpCode);
}

inline bool isImageOpCode(Op OpCode) {
    return (OpCode >= OpImageSampleImplicitLod) && (OpCode <= OpImageWrite);
}

inline bool isIntelSubgroupOpCode(Op OpCode) {
  unsigned OC = OpCode;
  return OpSubgroupShuffleINTEL <= OC && OC <= OpSubgroupImageMediaBlockWriteINTEL;
}

inline bool isIntelVMEOpCode(Op OpCode) {
  unsigned OC = OpCode;
  return OpVmeImageINTEL <= OC && OC <= OpSubgroupAvcSicGetInterRawSadsINTEL;
}

}

#endif /* SPIRVOPCODE_HPP_ */
