mirror of
https://github.com/intel/intel-graphics-compiler.git
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91 lines
2.4 KiB
C++
91 lines
2.4 KiB
C++
/*========================== begin_copyright_notice ============================
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Copyright (C) 2019-2022 Intel Corporation
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SPDX-License-Identifier: MIT
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============================= end_copyright_notice ===========================*/
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#pragma once
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#include "types.h"
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#include "utility.h"
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#if defined(_M_IX86) || defined(_M_AMD64) || \
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defined(__i386__) || defined(__x86_64_)
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#include "UFO/portable_cpuid.h"
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#endif
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namespace iSTD
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{
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/*****************************************************************************\
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ENUM: CPU_INSTRUCTION_LEVEL
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\*****************************************************************************/
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enum CPU_INSTRUCTION_LEVEL
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{
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CPU_INSTRUCTION_LEVEL_UNKNOWN,
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CPU_INSTRUCTION_LEVEL_MMX,
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CPU_INSTRUCTION_LEVEL_SSE,
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CPU_INSTRUCTION_LEVEL_SSE2,
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CPU_INSTRUCTION_LEVEL_SSE3,
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CPU_INSTRUCTION_LEVEL_SSE4,
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CPU_INSTRUCTION_LEVEL_SSE4_1,
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NUM_CPU_INSTRUCTION_LEVELS
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};
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/*****************************************************************************\
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Inline Function:
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GetCpuInstructionLevel
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Description:
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Returns the highest level of IA32 instruction extensions supported by the CPU
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( i.e. SSE, SSE2, SSE4, etc )
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Output:
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CPU_INSTRUCTION_LEVEL - highest level of IA32 instruction extension(s) supported
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by CPU
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Notes:
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See Table 3-20 Vol2A SW Dev Manual for bit-field numbering
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\*****************************************************************************/
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inline CPU_INSTRUCTION_LEVEL GetCpuInstructionLevel( void )
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{
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#if defined(ANDROID) && defined(__SSE4_1__)
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return CPU_INSTRUCTION_LEVEL_SSE4_1;
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#elif defined(_M_IX86) || defined(_M_AMD64) || \
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defined(__i386__) || defined(__x86_64_)
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int CPUInfo[4] = { 0, 0, 0, 0 };
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__cpuid(CPUInfo, 1);
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CPU_INSTRUCTION_LEVEL CpuInstructionLevel = CPU_INSTRUCTION_LEVEL_UNKNOWN;
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if( CPUInfo[2] & BIT(19) )
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{
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CpuInstructionLevel = CPU_INSTRUCTION_LEVEL_SSE4_1;
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}
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else if( CPUInfo[2] & BIT(0) )
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{
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CpuInstructionLevel = CPU_INSTRUCTION_LEVEL_SSE3;
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}
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else if( CPUInfo[3] & BIT(26) )
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{
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CpuInstructionLevel = CPU_INSTRUCTION_LEVEL_SSE2;
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}
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else if( CPUInfo[3] & BIT(25) )
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{
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CpuInstructionLevel = CPU_INSTRUCTION_LEVEL_SSE;
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}
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else if( CPUInfo[3] & BIT(23) )
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{
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CpuInstructionLevel = CPU_INSTRUCTION_LEVEL_MMX;
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}
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return CpuInstructionLevel;
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#else
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return CPU_INSTRUCTION_LEVEL_UNKNOWN;
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#endif
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}
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}//namespace iSTD
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