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https://github.com/intel/intel-graphics-compiler.git
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539f561fe4
CloneAddressArithmetic marks rematted instructions with metadata Use the metadata in RematChainsAnalysis pass to mark the patterns that are safe to consider in the scheduling. Use the estimation of the target instructions (because it's usually a load) in the RegisterPressureTracker of the scheduling and schedule the remat chain as a whole.
78 lines
2.5 KiB
C++
78 lines
2.5 KiB
C++
/*========================== begin_copyright_notice ============================
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Copyright (C) 2025 Intel Corporation
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SPDX-License-Identifier: MIT
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============================= end_copyright_notice ===========================*/
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#pragma once
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#include "Compiler/IGCPassSupport.h"
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#include "Compiler/CISACodeGen/WIAnalysis.hpp"
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#include "Compiler/CISACodeGen/IGCLivenessAnalysis.h"
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#include "Compiler/CISACodeGen/VectorShuffleAnalysis.hpp"
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#include "Compiler/CISACodeGen/RematChainsAnalysis.hpp"
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#include "Compiler/CISACodeGen/TranslationTable.hpp"
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#include "Compiler/CodeGenContextWrapper.hpp"
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#include "Compiler/MetaDataUtilsWrapper.h"
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#include "Compiler/MetaDataApi/MetaDataApi.h"
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#include "common/LLVMWarningsPush.hpp"
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#include <llvm/Analysis/PostDominators.h>
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#include <llvm/Analysis/LoopInfo.h>
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#include "common/LLVMWarningsPop.hpp"
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namespace IGC {
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class CodeScheduling : public llvm::FunctionPass {
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// llvm::DominatorTree* DT = nullptr;
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// llvm::PostDominatorTree* PDT = nullptr;
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// llvm::LoopInfo* LI = nullptr;
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llvm::AliasAnalysis *AA = nullptr;
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VectorShuffleAnalysis *VSA = nullptr;
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RematChainsAnalysis *RCA = nullptr;
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WIAnalysisRunner *WI = nullptr;
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// IGCMD::MetaDataUtils* MDUtils = nullptr;
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IGCLivenessAnalysis *RPE = nullptr;
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IGCFunctionExternalRegPressureAnalysis *FRPE = nullptr;
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CodeGenContext *CTX = nullptr;
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public:
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static char ID; // Pass identification
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CodeScheduling();
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virtual bool runOnFunction(llvm::Function &F) override;
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virtual void getAnalysisUsage(llvm::AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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// AU.addRequired<llvm::DominatorTreeWrapperPass>();
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// AU.addRequired<llvm::LoopInfoWrapperPass>();
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// AU.addRequired<llvm::AAResultsWrapperPass>();
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AU.addRequired<IGCLivenessAnalysis>();
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AU.addRequired<IGCFunctionExternalRegPressureAnalysis>();
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AU.addRequired<CodeGenContextWrapper>();
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AU.addRequired<VectorShuffleAnalysis>();
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AU.addRequired<RematChainsAnalysis>();
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// AU.addPreserved<llvm::DominatorTreeWrapperPass>();
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// AU.addPreserved<llvm::LoopInfoWrapperPass>();
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// AU.addPreserved<llvm::AAResultsWrapperPass>();
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AU.addPreserved<IGCLivenessAnalysis>();
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AU.addPreserved<IGCFunctionExternalRegPressureAnalysis>();
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AU.addPreserved<VectorShuffleAnalysis>();
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AU.addPreserved<RematChainsAnalysis>();
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}
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private:
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/// dumping
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std::string Log;
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llvm::raw_string_ostream LogStringStream;
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llvm::raw_ostream *LogStream = nullptr;
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void dumpToFile(const std::string &Log);
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};
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void initializeCodeSchedulingPass(llvm::PassRegistry &);
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} // namespace IGC
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