mirror of
https://github.com/intel/intel-graphics-compiler.git
synced 2025-10-30 08:18:26 +08:00
a42d3f6321
Previously DispatchGRFStartRegister was used as base, but it points at the start of 'constants+input' section of the payload. GetTotalURBReadLength() refers only to inputs, so constants were missed and GetMaxRegForThreadDispatch() didn't have the full picture.
720 lines
29 KiB
C++
720 lines
29 KiB
C++
/*========================== begin_copyright_notice ============================
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Copyright (C) 2017-2023 Intel Corporation
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SPDX-License-Identifier: MIT
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============================= end_copyright_notice ===========================*/
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#pragma once
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#include "common/LLVMUtils.h"
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#include "Compiler/CISACodeGen/DebugInfoData.hpp"
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#include "Compiler/CISACodeGen/CVariable.hpp"
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#include "Compiler/CISACodeGen/PushAnalysis.hpp"
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#include "Compiler/CISACodeGen/helper.h"
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#include "Compiler/CISACodeGen/CISACodeGen.h"
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#include "Compiler/CISACodeGen/CISABuilder.hpp"
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#include "Compiler/CISACodeGen/GenericShaderState.hpp"
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#include "Compiler/CISACodeGen/LiveVars.hpp"
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#include "Compiler/CISACodeGen/WIAnalysis.hpp"
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#include "Compiler/CISACodeGen/CoalescingEngine.hpp"
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#include "Compiler/CodeGenPublic.h"
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#include "Compiler/MetaDataApi/MetaDataApi.h"
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// Needed for SConstantGatherEntry
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#include "usc_gen7.h"
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#include "common/Types.hpp"
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#include "common/LLVMWarningsPush.hpp"
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#include <llvm/ADT/DenseMap.h>
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#include <llvm/ADT/MapVector.h>
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#include "common/LLVMWarningsPop.hpp"
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#include "common/debug/Dump.hpp"
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#include <map>
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#include <string>
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#include <vector>
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#include "Probe/Assertion.h"
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#include "CShaderProgram.hpp"
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namespace llvm {
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class Value;
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class PHINode;
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class Function;
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class BasicBlock;
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} // namespace llvm
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namespace IGC {
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class DeSSA;
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class CoalescingEngine;
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class GenXFunctionGroupAnalysis;
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class VariableReuseAnalysis;
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class ResourceLoopAnalysis;
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class EmitPass;
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struct PushInfo;
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// Helper Function
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VISA_Type GetType(llvm::Type *pType, CodeGenContext *pDataLayout);
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uint64_t GetImmediateVal(llvm::Value *Const);
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e_alignment GetPreferredAlignment(llvm::Value *Val, WIAnalysis *WIA, CodeGenContext *pContext);
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class CShaderProgram;
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///--------------------------------------------------------------------------------------------------------
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class CShader {
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public:
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friend class CShaderProgram;
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class ExtractMaskWrapper {
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// To enable ExtractMask of any vector size. Currently, only vector
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// whose size is no larger than 32 has its extractMask calculated.
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private:
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uint32_t m_EM; // 32 bit extractMask;
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bool m_hasEM; // If true, m_EM is valid; otherwise, not valid.
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public:
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ExtractMaskWrapper(CShader *pS, llvm::Value *VecVal);
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ExtractMaskWrapper() = delete;
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ExtractMaskWrapper(const ExtractMaskWrapper &) = delete;
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ExtractMaskWrapper &operator=(const ExtractMaskWrapper &) = delete;
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// b: bit position, from 0 to 31.
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bool isSet(uint32_t b) const {
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if (m_hasEM) {
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IGC_ASSERT(b < 32);
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return (1 << (b)) & m_EM;
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}
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return true;
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}
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uint32_t getEM() const { return m_EM; }
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uint16_t hasEM() const { return m_hasEM; }
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};
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bool IsRecompilationRequestForced();
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protected:
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CShader(llvm::Function *, CShaderProgram *pProgram, GenericShaderState &GState);
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public:
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virtual ~CShader();
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CShader(const CShader &) = delete;
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CShader &operator=(const CShader &) = delete;
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void Destroy();
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virtual void InitEncoder(SIMDMode simdMode, bool canAbortOnSpill,
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ShaderDispatchMode shaderMode = ShaderDispatchMode::NOT_APPLICABLE);
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virtual void PreCompile() {}
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virtual void PreCompileFunction(llvm::Function &F) { IGC_UNUSED(F); }
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virtual void ParseShaderSpecificOpcode(llvm::Instruction *inst) { IGC_UNUSED(inst); }
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virtual void AllocatePayload() {}
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virtual void AddPrologue() {}
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virtual void PreAnalysisPass();
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virtual void ExtractGlobalVariables() {}
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void EOTURBWrite();
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CVariable *URBFence(LSC_SCOPE scope = LSC_SCOPE_LOCAL);
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void EOTGateway(CVariable *payload = nullptr);
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void EOTRenderTarget(CVariable *r1, bool isPerCoarse);
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virtual void AddEpilogue(llvm::ReturnInst *ret);
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virtual CVariable *GetURBOutputHandle() {
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IGC_ASSERT_MESSAGE(0, "Should be overridden in a derived class!");
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return nullptr;
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}
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virtual CVariable *GetURBInputHandle(CVariable *pVertexIndex, BasicBlock *block) {
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IGC_UNUSED(pVertexIndex);
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IGC_UNUSED(block);
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IGC_ASSERT_MESSAGE(0, "Should be overridden in a derived class!");
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return nullptr;
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}
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virtual OctEltUnit GetTotalURBReadLength() const { return OctEltUnit(0); }
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virtual unsigned GetMaxRegForThreadDispatch() const {
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unsigned int startReg = m_VertexElementsStartOffset > 0 ? m_VertexElementsStartOffset / m_Platform->getGRFSize()
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: m_simdProgram.m_startReg;
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return startReg + 8 * GetTotalURBReadLength().Count();
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}
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// if true, HW will pass one GRF NOS of inlinedata to payload, (compute only
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// right now)
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virtual bool passNOSInlineData() { return false; }
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virtual bool loadThreadPayload() { return false; }
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virtual int getAnnotatedNumThreads() { return -1; }
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virtual bool IsRegularGRFRequested() { return false; }
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virtual bool IsLargeGRFRequested() { return false; }
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virtual bool hasReadWriteImage(llvm::Function &F) {
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IGC_UNUSED(F);
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return false;
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}
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virtual bool CompileSIMDSize(SIMDMode simdMode, EmitPass &EP, llvm::Function &F) {
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IGC_UNUSED(F);
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IGC_UNUSED(EP);
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return CompileSIMDSizeInCommon(simdMode);
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}
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CVariable *LazyCreateCCTupleBackingVariable(CoalescingEngine::CCTuple *ccTuple, VISA_Type baseType = ISA_TYPE_UD);
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CVariable *GetSymbol(llvm::Value *value, bool fromConstantPool = false, e_alignment MinAlign = EALIGN_AUTO);
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void AddSetup(uint index, CVariable *var);
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bool AppendPayloadSetup(CVariable *var);
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void AddPatchTempSetup(CVariable *var);
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void AddPatchPredSetup(CVariable *var);
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void AddPatchConstantSetup(uint index, CVariable *var);
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unsigned getSetupSize() const { return unsigned(setup.size()); }
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CShaderProgram *GetParent() const { return m_parent; }
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// TODO: simplify calls to GetNewVariable to these shorter and more
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// expressive cases where possible.
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//
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// CVariable* GetNewVector(VISA_Type type, const CName &name) {
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// return GetNewVariable(numLanes(m_SIMDSize), type, EALIGN_GRF, false,
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// name);
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// }
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// CVariable* GetNewUniform(VISA_Type type, const CName &name) {
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// grep a GetNewVariable(1, .. true) and see what B and W use
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// return GetNewVariable(1, type, alignOf_TODO(type), true, name);
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// }
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CVariable *GetNewVariable(uint16_t nbElement, VISA_Type type, e_alignment align, const CName &name) {
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return GetNewVariable(nbElement, type, align, false, 1, name);
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}
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CVariable *GetNewVariable(uint16_t nbElement, VISA_Type type, e_alignment align, UniformArgWrap uniform,
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const CName &name) {
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return GetNewVariable(nbElement, type, align, uniform, 1, name);
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}
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CVariable *GetNewVariable(uint16_t nbElement, VISA_Type type, e_alignment align, UniformArgWrap uniform,
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uint16_t numberInstance, const CName &name);
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CVariable *GetNewVariable(const CVariable *from, const CName &name = CName());
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CVariable *GetNewAddressVariable(uint16_t nbElement, VISA_Type type, UniformArgWrap uniform, bool vectorUniform,
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const CName &name);
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CVariable *GetNewVector(llvm::Value *val, e_alignment preferredAlign = EALIGN_AUTO);
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CVariable *GetNewAlias(CVariable *var, VISA_Type type, uint16_t offset, uint16_t numElements);
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CVariable *GetNewAlias(CVariable *var, VISA_Type type, uint16_t offset, uint16_t numElements, bool uniform);
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// Create a multi-instance alias of a single-instance variable.
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CVariable *GetNewAlias(CVariable *var, uint16_t numInstances);
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// Create an alias whose genVar has non-zero alias offset (for inline asm)
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CVariable *GetNewAliasWithAliasOffset(CVariable *var);
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// If BaseVar's type matches V's, return BaseVar; otherwise, create an new
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// alias CVariable to BaseVar. The newly-created alias CVariable's size
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// should be the same as BaseVar's size (used for creating alias for values
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// in the same DeSSA's congruent class).
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CVariable *createAliasIfNeeded(llvm::Value *V, CVariable *BaseVar);
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// Allow to create an alias of a variable handpicking a slice to be able to
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// do cross lane in SIMD32
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CVariable *GetVarHalf(CVariable *var, unsigned int half);
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void CopyVariable(CVariable *dst, CVariable *src, uint dstSubVar = 0, uint srcSubVar = 0);
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void PackAndCopyVariable(CVariable *dst, CVariable *src, uint subVar = 0);
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void CopyVariableRaw(CVariable *dst, CVariable *src);
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CVariable *CopyVariableRaw(CVariable *src, bool singleInstance = true);
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bool IsValueUsed(llvm::Value *value);
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CVariable *GetGlobalCVar(llvm::Value *value);
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uint GetNbElementAndMask(llvm::Value *value, uint32_t &mask);
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void CreatePayload(uint regCount, uint idxOffset, CVariable *&payload, llvm::Instruction *inst, uint paramOffset,
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uint8_t hfFactor);
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uint GetNbVectorElementAndMask(llvm::Value *value, uint32_t &mask);
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uint16_t AdjustExtractIndex(llvm::Value *value, uint16_t elemIndex);
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WIBaseClass::WIDependancy GetDependency(llvm::Value *v) const;
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void SetDependency(llvm::Value *v, WIBaseClass::WIDependancy dep);
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bool GetIsUniform(llvm::Value *v) const;
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bool InsideDivergentCF(const llvm::Instruction *inst) const;
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bool InsideWorkgroupDivergentCF(const llvm::Instruction *inst) const;
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CEncoder &GetEncoder();
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CVariable *GetR0();
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CVariable *GetNULL();
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CVariable *GetTSC();
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CVariable *GetSR0();
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CVariable *GetCR0();
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CVariable *GetCE0();
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CVariable *GetDBG();
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CVariable *GetMSG0();
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CVariable *GetHWTID();
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CVariable *GetSP();
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CVariable *GetFP();
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CVariable *GetPrevFP();
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CVariable *GetARGVReservedVariable(ARG_SPACE_RESERVATION_SLOTS slot);
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uint32_t GetARGVReservedVariablesTotalSize();
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CVariable *GetARGV();
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CVariable *GetRETV();
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CVariable *GetPrivateBase();
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CVariable *GetImplArgBufPtr();
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CVariable *GetLocalIdBufPtr();
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CVariable *GetGlobalBufferArg();
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void SaveSRet(CVariable *sretPtr);
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CVariable *GetAndResetSRet();
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bool hasSP() const { return m_SP != nullptr; }
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bool hasFP() const { return m_FP != nullptr; }
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void InitializeStackVariables();
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void InitializeSPFPForVLA();
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void SaveStackState();
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void RestoreStackState();
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void RemoveBitRange(CVariable *&src, unsigned removebit, unsigned range);
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void AllocateInput(CVariable *var, uint offset, uint instance = 0, bool forceLiveOut = false);
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void AllocateOutput(CVariable *var, uint offset, uint instance = 0);
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void AllocatePred(CVariable *var, uint offset, bool forceLiveOut = false);
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CVariable *ImmToVariable(uint64_t immediate, VISA_Type type, bool isCodePatchCandidate = false);
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CVariable *GetConstant(llvm::Constant *C, CVariable *dstVar = nullptr);
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CVariable *GetScalarConstant(llvm::Value *c);
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CVariable *GetUndef(VISA_Type type);
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llvm::Constant *findCommonConstant(llvm::Constant *C, uint elts, uint currentEmitElts, bool &allSame);
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virtual unsigned int GetSLMMappingValue(llvm::Value *c);
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virtual CVariable *GetSLMMapping(llvm::Value *c);
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CVariable *BitCast(CVariable *var, VISA_Type newType);
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void CacheArgumentsList();
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virtual void MapPushedInputs();
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void CreateGatherMap() { m_State.CreateGatherMap(); }
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void CreateConstantBufferOutput(SKernelProgram *pKernelProgram) {
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m_State.CreateConstantBufferOutput(pKernelProgram);
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}
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CVariable *CreateFunctionSymbol(llvm::Function *pFunc, StringRef symbolName = "");
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CVariable *CreateGlobalSymbol(llvm::GlobalVariable *pGlobal);
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CVariable *GetStructVariable(llvm::Value *v);
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void CreateImplicitArgs();
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void CreateAliasVars();
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void SetUniformHelper(WIAnalysis *WI) { m_WI = WI; }
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void SetDeSSAHelper(DeSSA *deSSA) { m_deSSA = deSSA; }
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void SetCoalescingEngineHelper(CoalescingEngine *ce) { m_coalescingEngine = ce; }
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void SetCodeGenHelper(CodeGenPatternMatch *CG) { m_CG = CG; }
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void SetPushInfoHelper(PushInfo *PI) { pushInfo = *PI; }
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void SetEmitPassHelper(EmitPass *EP) { m_EmitPass = EP; }
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void SetDominatorTreeHelper(llvm::DominatorTree *DT) { m_DT = DT; }
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void SetDataLayout(const llvm::DataLayout *DL) { m_DL = DL; }
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void SetVariableReuseAnalysis(VariableReuseAnalysis *VRA) { m_VRA = VRA; }
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void SetResourceLoopAnalysis(ResourceLoopAnalysis *RLA) { m_RLA = RLA; }
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void SetMetaDataUtils(IGC::IGCMD::MetaDataUtils *pMdUtils) { m_pMdUtils = pMdUtils; }
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void SetScratchSpaceSize(uint size) { m_ScratchSpaceSize = size; }
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// Set FGA and also FunctionGroup attributes
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void SetFunctionGroupAnalysis(GenXFunctionGroupAnalysis *FGA) {
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m_FGA = FGA;
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FunctionGroup *FG = (FGA && entry) ? FGA->getGroupForHead(entry) : nullptr;
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if (FG) {
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m_HasSubroutine = FG->hasSubroutine();
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m_HasStackCall = FG->hasStackCall();
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m_HasIndirectCall = FG->hasIndirectCall();
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m_HasNestedCall = FG->hasNestedCall();
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m_IsIntelSymbolTableVoidProgram = FGA->isIndirectCallGroup(FG);
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}
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if (IGC_IS_FLAG_ENABLED(ForceAddingStackcallKernelPrerequisites)) {
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m_HasStackCall = true;
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}
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}
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GenXFunctionGroupAnalysis *GetFGA() { return m_FGA; }
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bool HasSubroutines() const { return m_HasSubroutine; }
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bool HasStackCalls() const { return m_HasStackCall; }
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void SetHasStackCalls(bool hasStackCall) { m_HasStackCall = hasStackCall; }
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bool HasNestedCalls() const { return m_HasNestedCall; }
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bool HasIndirectCalls() const { return m_HasIndirectCall; }
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bool IsIntelSymbolTableVoidProgram() const { return m_IsIntelSymbolTableVoidProgram; }
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int PrivateMemoryPerWI() const { return m_PrivateMemoryPerWI; }
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IGCMD::MetaDataUtils *GetMetaDataUtils() { return m_pMdUtils; }
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virtual void SetShaderSpecificHelper(EmitPass *emitPass) { IGC_UNUSED(emitPass); }
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void AllocateConstants(uint &offset);
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void AllocateSimplePushConstants(uint &offset);
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void AllocateNOSConstants(uint &offset);
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void AllocateConstants3DShader(uint &offset);
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ShaderType GetShaderType() const { return GetContext()->type; }
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bool IsPatchablePS();
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void GetSimdOffsetBase(CVariable *&pVar, bool dup = false);
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/// Returns a simd8 register filled with values [24, 20, 16, 12, 8, 4, 0]
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/// that are used to index subregisters of a GRF when counting offsets in
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/// bytes. Used e.g. for indirect addressing via a0 register.
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CVariable *GetPerLaneOffsetsReg(uint typeSizeInBytes);
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void GetPayloadElementSymbols(llvm::Value *inst, CVariable *payload[], int vecWidth);
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CodeGenContext *GetContext() const { return m_ctx; }
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SProgramOutput *ProgramOutput();
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bool CanTreatAsAlias(llvm::ExtractElementInst *inst);
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bool CanTreatScalarSourceAsAlias(llvm::InsertElementInst *);
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bool HasBecomeNoop(llvm::Instruction *inst);
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// If V is not in any congruent class, not aliased to any other
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// variables, not payload-coalesced, then this function returns
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// true.
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bool IsCoalesced(llvm::Value *V);
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bool VMECoalescePattern(llvm::GenIntrinsicInst *);
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bool isUnpacked(llvm::Value *value);
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/// Return true if we are sure that all lanes are active at the begging
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/// of the thread
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virtual bool HasFullDispatchMask() { return false; }
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bool needsEntryFence() const;
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std::pair<bool, unsigned> getExtractMask(Value *V) const {
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auto It = extractMasks.find(V);
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if (It == extractMasks.end())
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return std::make_pair(false, 0);
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return std::make_pair(true, It->second);
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}
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llvm::Function *entry = nullptr;
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const CBTILayout *m_pBtiLayout = nullptr;
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const CPlatform *m_Platform = nullptr;
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const CDriverInfo *m_DriverInfo = nullptr;
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ModuleMetaData *m_ModuleMetadata = nullptr;
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/// SIMD Size is the default size of instructions
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ShaderDispatchMode m_ShaderDispatchMode{};
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/// the default emit size for this shader. This is the default size for
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/// variables as well as the default execution size for each instruction.
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/// encoder may override it explicitly via CEncoder::SetSIMDSize
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SIMDMode m_SIMDSize{};
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uint8_t m_numberInstance = 0;
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PushInfo pushInfo;
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EmitPass *m_EmitPass = nullptr;
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uint m_sendStallCycle = 0;
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uint m_staticCycle = 0;
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uint m_loopNestedStallCycle = 0;
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uint m_loopNestedCycle = 0;
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unsigned m_spillSize = 0;
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float m_spillCost = 0; // num weighted spill inst / total inst
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uint m_asmInstrCount = 0;
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std::vector<llvm::Value *> m_argListCache;
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/// The size in byte used by igc (non-spill space). And this
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/// is the value passed to VISA so that VISA's spill, if any,
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/// will go after this space.
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uint m_ScratchSpaceSize = 0;
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CVariable *m_ScratchSurfaceAddress = nullptr;
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ShaderStats *m_shaderStats = nullptr;
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GenericShaderState &m_State;
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// Number of binding table entries per cache line.
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static constexpr DWORD cBTEntriesPerCacheLine = 32;
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// Max BTI value that can increase binding table count.
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// SampleEngine: Binding Table Index is set to 252 specifies the bindless
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// surface offset.
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// DataPort: The special entry 255 is used to reference Stateless A32
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// or A64 address model, and the special entry 254 is used
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// to reference the SLM address model. The special entry 252
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// is used to reference bindless resource operation.
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static constexpr DWORD MAX_BINDING_TABLE_INDEX = 251;
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static constexpr uint cMessageExtendedDescriptorEOTBit = BIT(5);
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CVariable *GetCCTupleToVariableMapping(CoalescingEngine::CCTuple *ccTuple) { return ccTupleMapping[ccTuple]; }
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void addConstantInPool(llvm::Constant *C, CVariable *Var) { ConstantPool[C] = Var; }
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CVariable *lookupConstantInPool(llvm::Constant *C) { return ConstantPool.lookup(C); }
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unsigned int EvaluateSIMDConstExpr(llvm::Value *C);
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/// Initialize per function status.
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void BeginFunction(llvm::Function *F);
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// This method split payload interpolations from the shader into another
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// compilation unit
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void SplitPayloadFromShader(llvm::Function *F);
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/// This method is used to create the vISA variable for function F's formal
|
|
/// return value
|
|
CVariable *getOrCreateReturnSymbol(llvm::Function *F);
|
|
/// This method is used to create the vISA variable for function F's formal
|
|
/// argument
|
|
CVariable *getOrCreateArgumentSymbol(llvm::Argument *Arg,
|
|
bool ArgInCallee, // true if Arg isn't in current func
|
|
bool useStackCall = false);
|
|
void UpdateSymbolMap(llvm::Value *v, CVariable *CVar);
|
|
VISA_Type GetType(llvm::Type *type);
|
|
uint32_t GetNumElts(llvm::Type *type, bool isUniform = false);
|
|
|
|
/// Evaluate constant expression and return the result immediate value.
|
|
uint64_t GetConstantExpr(llvm::ConstantExpr *C);
|
|
|
|
uint32_t GetMaxUsedBindingTableEntryCount(void) const { return m_State.GetMaxUsedBindingTableEntryCount(); }
|
|
|
|
uint32_t GetBindingTableEntryBitmap(void) const { return m_State.GetBindingTableEntryBitmap(); }
|
|
|
|
void SetBindingTableEntryCountAndBitmap(bool directIdx, BufferType bufType, uint32_t typeBti, uint32_t bti) {
|
|
if (bti <= MAX_BINDING_TABLE_INDEX) {
|
|
if (directIdx) {
|
|
m_State.m_BindingTableEntryCount = (bti <= m_pBtiLayout->GetBindingTableEntryCount())
|
|
? (std::max(bti, m_State.m_BindingTableEntryCount))
|
|
: m_State.m_BindingTableEntryCount;
|
|
m_State.m_BindingTableUsedEntriesBitmap |= BIT(bti / cBTEntriesPerCacheLine);
|
|
|
|
if (bufType == RESOURCE) {
|
|
m_State.m_shaderResourceLoaded[typeBti / 32] |= BIT(typeBti % 32);
|
|
} else if (bufType == CONSTANT_BUFFER) {
|
|
m_State.m_constantBufferLoaded |= BIT(typeBti);
|
|
} else if (bufType == UAV) {
|
|
m_State.m_uavLoaded |= QWBIT(typeBti);
|
|
} else if (bufType == RENDER_TARGET) {
|
|
m_State.m_renderTargetLoaded |= BIT(typeBti);
|
|
}
|
|
} else {
|
|
// Indirect addressing, set the maximum BTI.
|
|
m_State.m_BindingTableEntryCount = m_pBtiLayout->GetBindingTableEntryCount();
|
|
m_State.m_BindingTableUsedEntriesBitmap |=
|
|
BITMASK_RANGE(0, (m_State.m_BindingTableEntryCount / cBTEntriesPerCacheLine));
|
|
|
|
if (bufType == RESOURCE || bufType == BINDLESS_TEXTURE) {
|
|
unsigned int MaxArray = m_pBtiLayout->GetTextureIndexSize() / 32;
|
|
for (unsigned int i = 0; i < MaxArray; i++) {
|
|
m_State.m_shaderResourceLoaded[i] = 0xffffffff;
|
|
}
|
|
|
|
for (unsigned int i = MaxArray * 32; i < m_pBtiLayout->GetTextureIndexSize(); i++) {
|
|
m_State.m_shaderResourceLoaded[MaxArray] = BIT(i % 32);
|
|
}
|
|
} else if (bufType == CONSTANT_BUFFER || bufType == BINDLESS_CONSTANT_BUFFER) {
|
|
m_State.m_constantBufferLoaded |= BITMASK_RANGE(0, m_pBtiLayout->GetConstantBufferIndexSize());
|
|
} else if (bufType == UAV || bufType == BINDLESS) {
|
|
m_State.m_uavLoaded |= QWBITMASK_RANGE(0, m_pBtiLayout->GetUavIndexSize());
|
|
} else if (bufType == RENDER_TARGET) {
|
|
m_State.m_renderTargetLoaded |= BITMASK_RANGE(0, m_pBtiLayout->GetRenderTargetIndexSize());
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
static unsigned GetIMEReturnPayloadSize(llvm::GenIntrinsicInst *I);
|
|
|
|
void addCVarsForVectorBC(llvm::BitCastInst *BCI, const llvm::SmallVector<CVariable *, 8> &CVars) {
|
|
IGC_ASSERT_MESSAGE(m_VectorBCItoCVars.find(BCI) == std::end(m_VectorBCItoCVars),
|
|
"a variable already exists for this vector bitcast");
|
|
m_VectorBCItoCVars.try_emplace(BCI, CVars);
|
|
}
|
|
|
|
CVariable *getCVarForVectorBCI(llvm::BitCastInst *BCI, int index) {
|
|
auto iter = m_VectorBCItoCVars.find(BCI);
|
|
if (iter == m_VectorBCItoCVars.end()) {
|
|
return nullptr;
|
|
}
|
|
return (*iter).second[index];
|
|
}
|
|
|
|
void SetHasGlobalStatelessAccess() { m_HasGlobalStatelessMemoryAccess = true; }
|
|
bool GetHasGlobalStatelessAccess() const { return m_HasGlobalStatelessMemoryAccess; }
|
|
void SetHasConstantStatelessAccess() { m_HasConstantStatelessMemoryAccess = true; }
|
|
bool GetHasConstantStatelessAccess() const { return m_HasConstantStatelessMemoryAccess; }
|
|
void SetHasGlobalAtomics() { m_HasGlobalAtomics = true; }
|
|
bool GetHasGlobalAtomics() const { return m_HasGlobalAtomics; }
|
|
bool GetHasEval() const { return m_State.GetHasEval(); }
|
|
void IncStatelessWritesCount() { ++m_StatelessWritesCount; }
|
|
void IncIndirectStatelessCount() { ++m_IndirectStatelessCount; }
|
|
void IncNumSampleBallotLoops() { ++m_NumSampleBallotLoops; }
|
|
uint32_t GetStatelessWritesCount() const { return m_StatelessWritesCount; }
|
|
uint32_t GetIndirectStatelessCount() const { return m_IndirectStatelessCount; }
|
|
uint32_t GetNumSampleBallotLoops() const { return m_NumSampleBallotLoops; }
|
|
|
|
// In bytes
|
|
uint32_t getGRFSize() const { return m_Platform->getGRFSize(); }
|
|
|
|
// In bytes
|
|
uint32_t getCVarSize(CVariable *var) const {
|
|
uint varNumberElement = var->GetNumberElement();
|
|
uint varElemSize = var->GetElemSize();
|
|
uint varSize = varNumberElement * varElemSize;
|
|
return (getGRFSize() >= varSize) ? getGRFSize() : varSize;
|
|
}
|
|
|
|
// in DWORDs
|
|
uint32_t getMinPushConstantBufferAlignmentInBytes() const {
|
|
return m_State.getMinPushConstantBufferAlignmentInBytes();
|
|
}
|
|
|
|
// Note that for PVC A0 simd16, PVCLSCEnabled() returns true
|
|
// but no LSC is generated!
|
|
bool PVCLSCEnabled() const { return m_Platform->isCoreChildOf(IGFX_XE_HPC_CORE) && m_Platform->hasLSC(); }
|
|
|
|
e_alignment getGRFAlignment() const { return CVariable::getAlignment(getGRFSize()); }
|
|
|
|
llvm::DenseMap<llvm::Value *, CVariable *> &GetSymbolMapping() { return symbolMapping; }
|
|
|
|
llvm::DenseMap<llvm::Value *, CVariable *> &GetGlobalMapping() { return globalSymbolMapping; }
|
|
|
|
llvm::DenseMap<llvm::Constant *, CVariable *> &GetConstantMapping() { return ConstantPool; }
|
|
|
|
int64_t GetKernelArgOffset(CVariable *argV) {
|
|
auto it = kernelArgToPayloadOffsetMap.find(argV);
|
|
return it != kernelArgToPayloadOffsetMap.end() ? (int64_t)it->second : -1;
|
|
}
|
|
|
|
DebugInfoData &GetDebugInfoData();
|
|
|
|
unsigned int GetPrimitiveTypeSizeInRegisterInBits(const llvm::Type *Ty) const;
|
|
unsigned int GetPrimitiveTypeSizeInRegister(const llvm::Type *Ty) const;
|
|
unsigned int GetScalarTypeSizeInRegisterInBits(const llvm::Type *Ty) const;
|
|
unsigned int GetScalarTypeSizeInRegister(const llvm::Type *Ty) const;
|
|
|
|
////////////////////////////////////////////////////////////////////
|
|
// NOTE: for vector load/stores instructions pass the
|
|
// optional instruction argument checks additional constraints
|
|
static Tristate shouldGenerateLSCQuery(const CodeGenContext &Ctx, llvm::Instruction *vectorLdStInst = nullptr,
|
|
SIMDMode Mode = SIMDMode::UNKNOWN);
|
|
bool shouldGenerateLSC(llvm::Instruction *vectorLdStInst = nullptr, bool isTGM = false);
|
|
bool forceCacheCtrl(llvm::Instruction *vectorLdStInst = nullptr);
|
|
uint32_t totalBytesToStoreOrLoad(llvm::Instruction *vectorLdStInst);
|
|
|
|
void setShaderProgramID(int aID) { m_shaderProgramID = aID; }
|
|
int getShaderProgramID() const { return m_shaderProgramID; }
|
|
void getShaderFileName(std::string &ShaderName) const;
|
|
|
|
protected:
|
|
bool CompileSIMDSizeInCommon(SIMDMode simdMode);
|
|
uint32_t GetShaderThreadUsageRate();
|
|
|
|
private:
|
|
int m_shaderProgramID = 0; // unique for each shaderProgram
|
|
// Return DefInst's CVariable if it could be reused for UseInst, and return
|
|
// nullptr otherwise.
|
|
CVariable *reuseSourceVar(llvm::Instruction *UseInst, llvm::Instruction *DefInst, e_alignment preferredAlign);
|
|
|
|
// Return nullptr if no source variable is reused. Otherwise return a
|
|
// CVariable from its source operand.
|
|
CVariable *GetSymbolFromSource(llvm::Instruction *UseInst, e_alignment preferredAlign);
|
|
|
|
protected:
|
|
CShaderProgram *m_parent = nullptr;
|
|
CodeGenContext *m_ctx = nullptr;
|
|
WIAnalysis *m_WI = nullptr;
|
|
DeSSA *m_deSSA = nullptr;
|
|
CoalescingEngine *m_coalescingEngine = nullptr;
|
|
CodeGenPatternMatch *m_CG = nullptr;
|
|
llvm::DominatorTree *m_DT = nullptr;
|
|
const llvm::DataLayout *m_DL = nullptr;
|
|
GenXFunctionGroupAnalysis *m_FGA = nullptr;
|
|
VariableReuseAnalysis *m_VRA = nullptr;
|
|
ResourceLoopAnalysis *m_RLA = nullptr;
|
|
|
|
IGC::IGCMD::MetaDataUtils *m_pMdUtils = nullptr;
|
|
|
|
#if defined(_DEBUG) || defined(_INTERNAL)
|
|
llvm::SpecificBumpPtrAllocator<CVariable> Allocator;
|
|
#else
|
|
llvm::BumpPtrAllocator Allocator;
|
|
#endif
|
|
|
|
// Mapping from formal argument to its variable or from function to its
|
|
// return variable. Per kernel mapping. Used when llvm functions are
|
|
// compiled into vISA subroutine
|
|
llvm::DenseMap<llvm::Value *, CVariable *> globalSymbolMapping;
|
|
|
|
llvm::DenseMap<llvm::Value *, CVariable *> symbolMapping;
|
|
// Yet another map: a mapping from ccTuple to its corresponding root variable.
|
|
// Variables that participate in congruence class tuples will be defined as
|
|
// aliases (with respective offset) to the root variable.
|
|
llvm::DenseMap<CoalescingEngine::CCTuple *, CVariable *> ccTupleMapping;
|
|
// Constant pool.
|
|
llvm::DenseMap<llvm::Constant *, CVariable *> ConstantPool;
|
|
|
|
// keep a map when we generate accurate mask for vector value
|
|
// in order to reduce register usage
|
|
llvm::DenseMap<llvm::Value *, uint32_t> extractMasks;
|
|
|
|
// keep a map for each kernel argument to its allocated payload offset
|
|
llvm::DenseMap<CVariable *, uint32_t> kernelArgToPayloadOffsetMap;
|
|
|
|
CEncoder encoder;
|
|
std::vector<CVariable *> setup;
|
|
std::vector<CVariable *> payloadLiveOutSetup;
|
|
std::vector<CVariable *> payloadTempSetup;
|
|
std::vector<CVariable *> payloadPredSetup;
|
|
std::vector<CVariable *> patchConstantSetup;
|
|
std::vector<CVariable *> perPrimitiveSetup;
|
|
|
|
uint m_maxBlockId = 0;
|
|
uint m_VertexElementsStartOffset = 0;
|
|
|
|
CVariable *m_R0 = nullptr;
|
|
CVariable *m_NULL = nullptr;
|
|
CVariable *m_TSC = nullptr;
|
|
CVariable *m_SR0 = nullptr;
|
|
CVariable *m_CR0 = nullptr;
|
|
CVariable *m_CE0 = nullptr;
|
|
CVariable *m_MSG0 = nullptr;
|
|
CVariable *m_DBG = nullptr;
|
|
CVariable *m_HW_TID = nullptr;
|
|
CVariable *m_SP = nullptr;
|
|
CVariable *m_FP = nullptr;
|
|
CVariable *m_SavedFP = nullptr;
|
|
CVariable *m_ARGV = nullptr;
|
|
std::array<CVariable *, NUM_ARG_SPACE_RESERVATION_SLOTS> m_ARGVReservedVariables{};
|
|
uint32_t m_ARGVReservedVariablesTotalSize = 0;
|
|
CVariable *m_RETV = nullptr;
|
|
CVariable *m_SavedSRetPtr = nullptr;
|
|
CVariable *m_ImplArgBufPtr = nullptr;
|
|
CVariable *m_LocalIdBufPtr = nullptr;
|
|
CVariable *m_GlobalBufferArg = nullptr;
|
|
SProgramOutput m_simdProgram;
|
|
|
|
// for each vector BCI whose uses are all extractElt with imm offset,
|
|
// we store the CVariables for each index
|
|
llvm::DenseMap<llvm::Instruction *, llvm::SmallVector<CVariable *, 8>> m_VectorBCItoCVars;
|
|
|
|
// Those two are for stateful token setup. It is a quick
|
|
// special case checking. Once a generic approach is added,
|
|
// this two fields shall be retired.
|
|
//
|
|
// [OCL] preAnalysis()/ParseShaderSpecificOpcode() must
|
|
// set this to true if there is any stateless access.
|
|
bool m_HasGlobalStatelessMemoryAccess = false;
|
|
bool m_HasConstantStatelessMemoryAccess = false;
|
|
|
|
bool m_HasGlobalAtomics = false;
|
|
|
|
uint32_t m_StatelessWritesCount = 0;
|
|
uint32_t m_IndirectStatelessCount = 0;
|
|
|
|
uint32_t m_NumSampleBallotLoops = 0;
|
|
|
|
DebugInfoData diData;
|
|
|
|
// Program function attributes
|
|
bool m_HasSubroutine = false;
|
|
bool m_HasStackCall = false;
|
|
bool m_HasNestedCall = false;
|
|
bool m_HasIndirectCall = false;
|
|
bool m_IsIntelSymbolTableVoidProgram = false;
|
|
int m_PrivateMemoryPerWI = 0;
|
|
};
|
|
|
|
struct SInstContext {
|
|
CVariable *flag;
|
|
e_modifier dst_mod;
|
|
bool invertFlag;
|
|
void init() {
|
|
flag = NULL;
|
|
dst_mod = EMOD_NONE;
|
|
invertFlag = false;
|
|
}
|
|
};
|
|
|
|
static const SInstContext g_InitContext = {
|
|
NULL,
|
|
EMOD_NONE,
|
|
false,
|
|
};
|
|
|
|
struct PSSignature;
|
|
|
|
void AddCodeGenPasses(CodeGenContext &ctx, CShaderProgram::KernelShaderMap &shaders, IGCPassManager &Passes,
|
|
SIMDMode simdMode, bool canAbortOnSpill,
|
|
ShaderDispatchMode shaderMode = ShaderDispatchMode::NOT_APPLICABLE,
|
|
PSSignature *pSignature = nullptr);
|
|
|
|
|
|
bool SimdEarlyCheck(CodeGenContext *ctx);
|
|
void AddLegalizationPasses(CodeGenContext &ctx, IGCPassManager &mpm, PSSignature *pSignature = nullptr);
|
|
void AddAnalysisPasses(CodeGenContext &ctx, IGCPassManager &mpm);
|
|
void destroyShaderMap(CShaderProgram::KernelShaderMap &shaders);
|
|
void unify_opt_PreProcess(CodeGenContext *pContext);
|
|
|
|
} // namespace IGC
|