mirror of
https://github.com/intel/intel-graphics-compiler.git
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57 lines
1.9 KiB
C++
57 lines
1.9 KiB
C++
/*========================== begin_copyright_notice ============================
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Copyright (C) 2017-2021 Intel Corporation
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SPDX-License-Identifier: MIT
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============================= end_copyright_notice ===========================*/
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#pragma once
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#include "common/LLVMWarningsPush.hpp"
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#include <llvm/Pass.h>
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#include <llvm/Analysis/LoopInfo.h>
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#include <llvm/Analysis/PostDominators.h>
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#include <llvm/IR/Dominators.h>
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#include <llvm/IR/Instructions.h>
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#include "common/LLVMWarningsPop.hpp"
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namespace IGC {
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class CShader;
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/// @brief sort basic blocks into topological order
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/// Arbitrary reverse postorder is not sufficient.
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/// Whenever it is possible, we want to layout blocks in such way
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/// that the vIsa Jitter can recognize the control-flow structures
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class Layout : public llvm::FunctionPass {
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public:
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static char ID;
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Layout();
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virtual void getAnalysisUsage(llvm::AnalysisUsage &AU) const override;
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/// @brief Provides name of pass
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virtual llvm::StringRef getPassName() const override { return "Layout"; }
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virtual bool runOnFunction(llvm::Function &func) override;
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private:
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llvm::BasicBlock *getLastReturnBlock(llvm::Function &Func);
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void LayoutBlocks(llvm::Function &func, llvm::LoopInfo &LI);
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void LayoutBlocks(llvm::Function &func);
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llvm::BasicBlock *selectSucc(llvm::BasicBlock *CurrBlk, bool SelectNoInstBlk, const llvm::LoopInfo &LI,
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const std::set<llvm::BasicBlock *> &VisitSet);
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bool isAtomicWrite(llvm::Instruction *inst, bool onlyLocalMem);
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bool isAtomicRead(llvm::Instruction *inst, bool onlyLocalMem);
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llvm::Value *getMemoryOperand(llvm::Instruction *inst, bool onlyLocalMem);
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bool isReturnBlock(llvm::BasicBlock *bb);
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bool tryMovingWrite(llvm::Instruction *write, llvm::Loop *loop, llvm::LoopInfo &LI);
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void moveAtomicWrites2Loop(llvm::Function &func, llvm::LoopInfo &LI, bool onlyLocalMem);
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llvm::PostDominatorTree *m_PDT;
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llvm::DominatorTree *m_DT;
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};
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} // namespace IGC
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