bmips: rework ARCH_HAS_SYNC_DMA_FOR_CPU_ALL patch
Let's disable ARCH_HAS_SYNC_DMA_FOR_CPU_ALL only for BCM6358. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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@ -1,7 +1,7 @@
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From 84c06b4a1dfa3e021fdbcafaff8cebfdec462402 Mon Sep 17 00:00:00 2001
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From 84c06b4a1dfa3e021fdbcafaff8cebfdec462402 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
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From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
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Date: Tue, 23 Feb 2021 10:39:48 +0100
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Date: Tue, 23 Feb 2021 10:39:48 +0100
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Subject: [PATCH] mips: bmips: disable ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
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Subject: [PATCH] mips: bmips: BCM6358: disable ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
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@ -47,34 +47,48 @@ Enabling this option causes kernel panics on BCM6358 with EHCI/OHCI:
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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---
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---
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arch/mips/Kconfig | 1 -
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arch/mips/bmips/dma.c
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1 file changed, 1 deletion(-)
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arch/mips/bmips/setup.c
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -264,7 +264,6 @@ config ATH79
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config BMIPS_GENERIC
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bool "Broadcom Generic BMIPS kernel"
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select ARCH_HAS_RESET_CONTROLLER
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- select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
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select ARCH_HAS_PHYS_TO_DMA
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select BOOT_RAW
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select NO_EXCEPT_FILL
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--- a/arch/mips/bmips/dma.c
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--- a/arch/mips/bmips/dma.c
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+++ b/arch/mips/bmips/dma.c
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+++ b/arch/mips/bmips/dma.c
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@@ -64,6 +64,7 @@ phys_addr_t dma_to_phys(struct device *d
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@@ -19,6 +19,8 @@
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return dma_addr;
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#include <linux/types.h>
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}
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#include <asm/bmips.h>
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+#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
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+int bmips_dma_sync_enabled = 1;
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void arch_sync_dma_for_cpu_all(void)
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+
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{
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/*
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* BCM338x has configurable address translation windows which allow the
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* peripherals' DMA addresses to be different from the Zephyr-visible
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@@ -69,6 +71,9 @@ void arch_sync_dma_for_cpu_all(void)
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void __iomem *cbr = BMIPS_GET_CBR();
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void __iomem *cbr = BMIPS_GET_CBR();
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@@ -79,6 +80,7 @@ void arch_sync_dma_for_cpu_all(void)
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u32 cfg;
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__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
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__raw_readl(cbr + BMIPS_RAC_CONFIG);
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}
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+#endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
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static int __init bmips_init_dma_ranges(void)
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+ if (!bmips_dma_sync_enabled)
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{
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+ return;
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+
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if (boot_cpu_type() != CPU_BMIPS3300 &&
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boot_cpu_type() != CPU_BMIPS4350 &&
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boot_cpu_type() != CPU_BMIPS4380)
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--- a/arch/mips/bmips/setup.c
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+++ b/arch/mips/bmips/setup.c
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@@ -89,6 +89,8 @@
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#define DDR_CSEND_REG 0x8
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+extern int bmips_dma_sync_enabled;
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+
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static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
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struct bmips_cpufreq {
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@@ -168,6 +170,9 @@ static void bcm6358_quirks(void)
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* disable SMP for now
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*/
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bmips_smp_enabled = 0;
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+
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+ /* ARCH_HAS_SYNC_DMA_FOR_CPU_ALL causes kernel panics on BCM6358 */
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+ bmips_dma_sync_enabled = 0;
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}
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static void bcm6368_quirks(void)
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