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ramips: kernel: fix awake-rt305x-dwc2 patch 

At this point in v5.4 kernel we cannot use dwc2_readl() and
dwc2_writel() since they rely on the value hsotg->needs_byte_swap
which cannot be obtained before the controller wakes up.
We should use readl() and writel() to wake up the controller before
calling dwc2_check_core_endianness().

Fixes: 6be0da90a1 ("ramips: refresh patches")
Signed-off-by: Alexey Dobrovolsky <dobrovolskiy.alexey@gmail.com>
[fixed Fixes: tag]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This commit is contained in:
Alexey Dobrovolsky 2020-05-06 23:48:15 +03:00 committed by Petr Štetiar
parent 4d92a558f2
commit ecda6b791b
1 changed files with 7 additions and 7 deletions
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14
target/linux/ramips/patches-5.4/0069-awake-rt305x-dwc2-controller.patch
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@ -1,15 +1,15 @@
--- a/drivers/usb/dwc2/platform.c --- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c +++ b/drivers/usb/dwc2/platform.c
@@ -432,6 +432,12 @@ static int dwc2_driver_probe(struct plat @@ -430,6 +430,12 @@ static int dwc2_driver_probe(struct plat
if (retval)
hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg); return retval;
+ /* Enable USB port before any regs access */ + /* Enable USB port before any regs access */
+ if (dwc2_readl(hsotg, PCGCTL) & 0x0f) { + if (readl(hsotg->regs + PCGCTL) & 0x0f) {
+ dwc2_writel(0x00, hsotg, PCGCTL); + writel(0x00, hsotg->regs + PCGCTL);
+ /* TODO: mdelay(25) here? vendor driver don't use it */ + /* TODO: mdelay(25) here? vendor driver don't use it */
+ } + }
+ +
hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
retval = dwc2_get_dr_mode(hsotg); retval = dwc2_get_dr_mode(hsotg);
if (retval)
goto error;