From eac8ddafad0684fda074d3d657079a5b1df825b9 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Fri, 1 Nov 2024 09:12:01 +0000
Subject: [PATCH] dts: bcm2712-rpi: Add RP1 firmware and mailboxes

Declare the communications channel to RP1.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
 .../boot/dts/broadcom/bcm2712-rpi-5-b.dts     |  4 +--
 .../boot/dts/broadcom/bcm2712-rpi-cm5.dtsi    |  4 +--
 arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi |  4 +++
 arch/arm64/boot/dts/broadcom/rp1.dtsi         | 27 +++++++++++++++++++
 4 files changed, 35 insertions(+), 4 deletions(-)

--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
@@ -152,7 +152,7 @@ rp1_target: &pcie2 {
 	// This is the RP1 peripheral space
 	ranges = <0xc0 0x40000000
 		  0x02000000 0x00 0x00000000
-		  0x00 0x00400000>;
+		  0x00 0x00410000>;
 
 	dma-ranges =
 	// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
@@ -164,7 +164,7 @@ rp1_target: &pcie2 {
 	// This allows the RP1 DMA controller to address RP1 hardware
 		     <0xc0 0x40000000
 		      0x02000000 0x0 0x00000000
-		      0x0 0x00400000>,
+		      0x0 0x00410000>,
 
 	// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
 		     <0x00 0x00000000
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
@@ -133,7 +133,7 @@ rp1_target: &pcie2 {
 	// This is the RP1 peripheral space
 	ranges = <0xc0 0x40000000
 		  0x02000000 0x00 0x00000000
-		  0x00 0x00400000>;
+		  0x00 0x00410000>;
 
 	dma-ranges =
 	// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
@@ -145,7 +145,7 @@ rp1_target: &pcie2 {
 	// This allows the RP1 DMA controller to address RP1 hardware
 		     <0xc0 0x40000000
 		      0x02000000 0x0 0x00000000
-		      0x0 0x00400000>,
+		      0x0 0x00410000>,
 
 	// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
 		     <0x00 0x00000000
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
@@ -294,6 +294,10 @@ pciex4: &pcie2 { };
 	status = "okay";
 };
 
+&rp1_mbox {
+	status = "okay";
+};
+
 /* Add some gpiomem nodes to make the devices accessible to userspace.
  * /dev/gpiomem<n> should expose the registers for the interface with DT alias
  * gpio<n>.
--- a/arch/arm64/boot/dts/broadcom/rp1.dtsi
+++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi
@@ -13,6 +13,14 @@
 
 		// ranges and dma-ranges must be provided by the includer
 
+		rp1_mbox: mailbox@8000 {
+			compatible = "raspberrypi,rp1-mbox";
+			status = "disabled";
+			reg = <0xc0 0x40008000  0x0 0x4000>;  // SYSCFG
+			interrupts = <RP1_INT_SYSCFG IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <1>;
+		};
+
 		rp1_clocks: clocks@18000 {
 			compatible = "raspberrypi,rp1-clocks";
 			#clock-cells = <1>;
@@ -1183,6 +1191,19 @@
 			assigned-clocks        = <&rp1_clocks RP1_CLK_DPI>;
 			assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>;
 		};
+
+		sram: sram@400000 {
+			compatible = "mmio-sram";
+			reg = <0xc0 0x40400000  0x0 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0  0xc0 0x40400000  0x10000>;
+
+			rp1_fw_shmem: shmem@ff00 {
+				compatible = "raspberrypi,rp1-shmem";
+				reg = <0xff00 0x100>; // firmware mailbox buffer
+			};
+		};
 	};
 };
 
@@ -1281,6 +1302,12 @@
 };
 
 / {
+	rp1_firmware: rp1_firmware {
+		compatible = "raspberrypi,rp1-firmware", "simple-mfd";
+		mboxes = <&rp1_mbox 0>;
+		shmem = <&rp1_fw_shmem>;
+	};
+
 	rp1_vdd_3v3: rp1_vdd_3v3 {
 		compatible = "regulator-fixed";
 		regulator-name = "vdd-3v3";
