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Include the NAND specs into the DTS. It is unclear which devices really need it. Keep it disabled for now. As the SoC register area is defined too small until now, increase the size to an appropriate value. If enabled one can see the following log messages (e.g. Linksys LGS328C or LGS352C). [ 1.206600] spi-nand spi1.0: Macronix SPI NAND was found. [ 1.212795] spi-nand spi1.0: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64 [ 1.222217] 3 fixed-partitions partitions found on MTD device spi1.0 [ 1.229466] OF: Bad cell count for /soc/spi@1a400/flash@0/partitions [ 1.236617] OF: Bad cell count for /soc/spi@1a400/flash@0/partitions [ 1.244164] Creating 3 MTD partitions on "spi1.0": [ 1.249620] 0x000000000000-0x000004000000 : "ubifs" [ 1.423593] 0x000004000000-0x000005e00000 : "firmware" [ 1.738268] mtdsplit_uimage: no uImage found in "firmware" [ 1.744577] 0x000005e00000-0x000007c00000 : "runtime2" Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/19583 Signed-off-by: Robert Marko <robimarko@gmail.com>
254 lines
4.7 KiB
Plaintext
254 lines
4.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#define INTERNAL_PHY_SDS(n, s) \
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phy##n: ethernet-phy@##n { \
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reg = <##n>; \
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compatible = "ethernet-phy-ieee802.3-c22"; \
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phy-is-integrated; \
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sds = <##s>; \
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};
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "realtek,rtl838x-soc";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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frequency = <800000000>;
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cpu@0 {
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compatible = "mips,mips34Kc";
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reg = <0>;
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};
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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cpuintc: cpuintc {
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compatible = "mti,cpu-interrupt-controller";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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lx_clk: lx_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <175000000>;
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};
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soc: soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x18000000 0x20000>;
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intc: interrupt-controller@3000 {
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compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";
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reg = <0x3000 0x18>, <0x3018 0x18>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>, <3>, <4>, <5>, <6>, <7>;
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};
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snand: spi@1a400 {
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compatible = "realtek,rtl9301-snand";
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reg = <0x1a400 0x44>;
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interrupt-parent = <&intc>;
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interrupts = <19 2>;
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clocks = <&lx_clk>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi0: spi@1200 {
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compatible = "realtek,rtl8380-spi";
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reg = <0x1200 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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timer0: timer@3200 {
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compatible = "realtek,rtl930x-timer", "realtek,otto-timer";
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reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>,
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<0x3230 0x10>, <0x3240 0x10>;
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interrupt-parent = <&intc>;
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interrupts = <7 4>, <8 4>, <9 4>, <10 4>, <11 4>;
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clocks = <&lx_clk>;
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};
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uart0: uart@2000 {
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compatible = "ns16550a";
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reg = <0x2000 0x100>;
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clocks = <&lx_clk>;
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interrupt-parent = <&intc>;
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interrupts = <30 1>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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};
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uart1: uart@2100 {
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compatible = "ns16550a";
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reg = <0x2100 0x100>;
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clocks = <&lx_clk>;
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interrupt-parent = <&intc>;
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interrupts = <31 0>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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watchdog0: watchdog@3260 {
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compatible = "realtek,rtl9300-wdt";
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reg = <0x3260 0xc>;
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realtek,reset-mode = "soc";
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clocks = <&lx_clk>;
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timeout-sec = <30>;
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interrupt-parent = <&intc>;
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interrupt-names = "phase1", "phase2";
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interrupts = <5 4>, <6 4>;
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};
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gpio0: gpio-controller@3300 {
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compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";
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reg = <0x3300 0x1c>, <0x3338 0x8>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <24>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <13 1>;
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};
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};
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switchcore@1b000000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x1b000000 0x10000>;
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mdio_aux: mdio-aux {
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compatible = "realtek,rtl9300-aux-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&pinmux_gpio_mdio_en>;
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pinctrl-names = "default";
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status = "disabled";
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};
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soc_thermal: thermal {
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compatible = "realtek,rtl9300-thermal";
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#thermal-sensor-cells = <0>;
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};
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};
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pinmux@1b00c600 {
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compatible = "pinctrl-single";
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reg = <0x1b00c600 0x4>;
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pinctrl-single,bit-per-mux;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x1>;
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#pinctrl-cells = <2>;
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pinmux_gpio_mdio_en: gpio-mdio-en {
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pinctrl-single,bits = <0x0 0x100 0x100>;
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};
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};
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pinmux_led: pinmux@1b00cc00 {
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compatible = "pinctrl-single";
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reg = <0x1b00cc00 0x4>;
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pinctrl-single,bit-per-mux;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x1>;
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#pinctrl-cells = <2>;
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/* enable GPIO 0 */
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pinmux_disable_sys_led: disable_sys_led {
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pinctrl-single,bits = <0x0 0x0 0x1000>;
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};
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};
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ethernet0: ethernet@1b00a300 {
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compatible = "realtek,rtl838x-eth";
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reg = <0x1b00a300 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <24 3>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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switch0: switch@1b000000 {
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compatible = "realtek,rtl83xx-switch";
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status = "okay";
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interrupt-parent = <&intc>;
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interrupts = <23 2>;
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};
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thermal_zones: thermal-zones {
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cpu-thermal {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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coefficients = <1000 0>;
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thermal-sensors = <&soc_thermal>;
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trips {
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critical {
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temperature = <105000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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};
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};
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};
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