63 lines
1.6 KiB
C
63 lines
1.6 KiB
C
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/******************************************************************************
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* Copyright (c) 2004, 2008 IBM Corporation
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* All rights reserved.
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* This program and the accompanying materials
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* are made available under the terms of the BSD License
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* which accompanies this distribution, and is available at
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* http://www.opensource.org/licenses/bsd-license.php
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*
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* Contributors:
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* IBM Corporation - initial implementation
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*****************************************************************************/
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#ifndef __CACHE_H
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#define __CACHE_H
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#include <cpu.h>
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#include <stdint.h>
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// XXX FIXME: Use proper CI load/store */
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#define cache_inhibited_access(type,name) \
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static inline type ci_read_##name(type * addr) \
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{ \
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type val; \
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val = *addr; \
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return val; \
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} \
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static inline void ci_write_##name(type * addr, type data) \
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{ \
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*addr = data; \
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}
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cache_inhibited_access(uint8_t, 8)
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cache_inhibited_access(uint16_t, 16)
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cache_inhibited_access(uint32_t, 32)
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cache_inhibited_access(uint64_t, 64)
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static inline uint16_t bswap16_load(uint64_t addr)
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{
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unsigned int val;
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asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr));
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return val;
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}
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static inline uint32_t bswap32_load(uint64_t addr)
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{
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unsigned int val;
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asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr));
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return val;
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}
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static inline void bswap16_store(uint64_t addr, uint16_t val)
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{
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asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr));
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}
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static inline void bswap32_store(uint64_t addr, uint32_t val)
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{
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asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr));
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}
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#endif /* __CACHE_H */
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