72 lines
2.0 KiB
C
72 lines
2.0 KiB
C
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/* Capstone Disassembly Engine */
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/* By billow <billow.fun@gmail.com>, 2024 */
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#include <stdio.h>
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#include <capstone/capstone.h>
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void print_insn_detail_xtensa(csh handle, cs_insn *ins)
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{
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int i;
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cs_regs regs_read, regs_write;
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uint8_t regs_read_count, regs_write_count;
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// detail can be NULL on "data" instruction if SKIPDATA option is turned ON
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if (ins->detail == NULL)
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return;
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cs_xtensa *detail = &(ins->detail->xtensa);
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if (detail->op_count)
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printf("\top_count: %u\n", detail->op_count);
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for (i = 0; i < detail->op_count; i++) {
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cs_xtensa_op *op = &(detail->operands[i]);
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if (op->type == CS_OP_REG)
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printf("\t\toperands[%u].type: REG = %s\n", i,
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cs_reg_name(handle, op->reg));
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else if (op->type == CS_OP_IMM)
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printf("\t\toperands[%u].type: IMM = 0x%" PRIx32 "\n",
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i, op->imm);
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else if (op->type == CS_OP_MEM)
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printf("\t\toperands[%u].type: MEM\n"
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"\t\t\t.mem.base: REG = %s\n"
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"\t\t\t.mem.disp: 0x%" PRIx8 "\n",
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i, cs_reg_name(handle, op->mem.base),
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op->mem.disp);
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else if (op->type == XTENSA_OP_L32R) {
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printf("\t\toperands[%u].type: L32R\n"
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"\t\t\t.l32r = %" PRIx32 "\n",
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i, op->imm);
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}
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if (op->access & CS_AC_READ)
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printf("\t\t\t.access: READ\n");
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else if (op->access & CS_AC_WRITE)
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printf("\t\t\t.access: WRITE\n");
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else if (op->access & (CS_AC_READ | CS_AC_WRITE))
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printf("\t\t\t.access: READ | WRITE\n");
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}
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// Print out all registers accessed by this instruction (either implicit or
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// explicit)
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if (!cs_regs_access(handle, ins, regs_read, ®s_read_count,
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regs_write, ®s_write_count)) {
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if (regs_read_count) {
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printf("\tRegisters read:");
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for (i = 0; i < regs_read_count; i++) {
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printf(" %s",
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cs_reg_name(handle, regs_read[i]));
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}
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printf("\n");
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}
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if (regs_write_count) {
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printf("\tRegisters modified:");
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for (i = 0; i < regs_write_count; i++) {
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printf(" %s",
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cs_reg_name(handle, regs_write[i]));
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}
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printf("\n");
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}
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}
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}
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