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capstone/suite/MC/LoongArch/bitclr.s.cs

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Initial auto-sync LoongArch support (#2349) * Initial auto-sync LoongArch support - Accompanied llvm changes: https://github.com/capstone-engine/llvm-capstone/pull/45 - MC Tests are generated from llvm - Instruction groups are implemented - Register accesses are implemented - Memory operands are handled for memory instructions - Code are formatted using clang-format of LLVM 17 - Import tests from LLVM MC - Collect operand type and access - Collect registers read/modified --------- Co-authored-by: CoA <1109673069@qq.com> * Ensure same indent for all patched lines. * Emit upper case OP_GROUP enum * Spell all enum values in capital letters. * Capticalize enums in loongarch_detail.c * Add test which contains now a tab. * Run clang-format on test_loongarch.c --------- Co-authored-by: CoA <1109673069@qq.com> Co-authored-by: Rot127 <unisono@quyllur.org>
2024-06-26 14:47:44 +08:00
# CS_ARCH_LOONGARCH, CS_MODE_LOONGARCH64, None
0xb8,0x38,0x0c,0x75 = xvbitclr.b $xr24, $xr5, $xr14
0x3e,0xb5,0x0c,0x75 = xvbitclr.h $xr30, $xr9, $xr13
0x62,0x1c,0x0d,0x75 = xvbitclr.w $xr2, $xr3, $xr7
0xae,0xe4,0x0d,0x75 = xvbitclr.d $xr14, $xr5, $xr25
0x56,0x3f,0x10,0x77 = xvbitclri.b $xr22, $xr26, 7
0xc2,0x75,0x10,0x77 = xvbitclri.h $xr2, $xr14, 0xd
0x43,0x80,0x10,0x77 = xvbitclri.w $xr3, $xr2, 0
0x8a,0x1d,0x11,0x77 = xvbitclri.d $xr10, $xr12, 7