x86: eliminate X86_get_insn_id2()

arch/X86/X86ATTInstPrinter.c

@@ -509,22 +509,16 @@ static void get_last_op(char *buffer, char *lastop)
 
 void X86_ATT_printInst(MCInst *MI, SStream *OS, void *info)
 {
-	// FIXME
+	unsigned int id, alias_id;
-	//const MCInstrDesc *Desc = MII.get(MI->getOpcode());
-	//uint64_t TSFlags = Desc.TSFlags;
 
-	//if (TSFlags & X86II::LOCK)
+	// save internal ID of this insn
-	//  OS << "\tlock\n";
+	id = MCInst_getOpcode(MI);
 
 	// Try to print any aliases first.
-	if (printAliasInstr(MI, OS, NULL)) {
+	alias_id = printAliasInstr(MI, OS, NULL);
-		char *mnem = cs_strdup(OS->buffer);
+	if (alias_id) {
-		char *tab = strchr(mnem, '\t');
-		if (tab)
-			*tab = '\0';
 		// reflect the new insn name (alias) in the opcode
-		MCInst_setOpcode(MI, X86_get_insn_id2(X86_map_insn(mnem)));
+		MCInst_setOpcode(MI, alias_id);
-		cs_mem_free(mnem);
 	} else
 		printInstruction(MI, OS, NULL);
 

arch/X86/X86GenAsmWriter.inc

@@ -13667,13 +13667,15 @@ static char *getRegisterName(unsigned RegNo)
 #ifdef PRINT_ALIAS_INSTR
 #undef PRINT_ALIAS_INSTR
 
-static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
+static unsigned int printAliasInstr(MCInst *MI, SStream *OS, void *info)
 {
+  unsigned int id;
   #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg)))
   const char *AsmString;
   // MCRegisterInfo *MRI = (MCRegisterInfo *)info;
-  switch (MCInst_getOpcode(MI)) {
+  id = MCInst_getOpcode(MI);
-  default: return false;
+  switch (id) {
+  default: return 0;
   case X86_AAD8i8:
     if (MCInst_getNumOperands(MI) == 1 &&
         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
@@ -13682,7 +13684,7 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
       AsmString = "aad";
       break;
     }
-    return false;
+    return 0;
   case X86_AAM8i8:
     if (MCInst_getNumOperands(MI) == 1 &&
         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
@@ -13691,14 +13693,14 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
       AsmString = "aam";
       break;
     }
-    return false;
+    return 0;
   case X86_XSTORE:
     if (MCInst_getNumOperands(MI) == 0) {
       // (XSTORE)
       AsmString = "xstorerng";
       break;
     }
-    return false;
+    return 0;
   }
 
   char *tmp = cs_strdup(AsmString), *AsmMnem, *AsmOps;
@@ -13722,7 +13724,7 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
     }
   }
   cs_mem_free(tmp);
-  return true;
+  return id;
 }
 
 #endif // PRINT_ALIAS_INSTR

arch/X86/X86GenAsmWriter1.inc

@@ -13178,13 +13178,15 @@ static char *getRegisterName(unsigned RegNo)
 #ifdef PRINT_ALIAS_INSTR
 #undef PRINT_ALIAS_INSTR
 
-static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
+static unsigned int printAliasInstr(MCInst *MI, SStream *OS, void *info)
 {
+  unsigned int id;
   #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg)))
   const char *AsmString;
   // MCRegisterInfo *MRI = (MCRegisterInfo *)info;
-  switch (MCInst_getOpcode(MI)) {
+  id = MCInst_getOpcode(MI);
-  default: return false;
+  switch (id) {
+  default: return 0;
   case X86_AAD8i8:
     if (MCInst_getNumOperands(MI) == 1 &&
         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
@@ -13193,7 +13195,7 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
       AsmString = "aad";
       break;
     }
-    return false;
+    return 0;
   case X86_AAM8i8:
     if (MCInst_getNumOperands(MI) == 1 &&
         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
@@ -13202,14 +13204,14 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
       AsmString = "aam";
       break;
     }
-    return false;
+    return 0;
   case X86_XSTORE:
     if (MCInst_getNumOperands(MI) == 0) {
       // (XSTORE)
       AsmString = "xstorerng";
       break;
     }
-    return false;
+    return 0;
   }
 
   char *tmp = cs_strdup(AsmString), *AsmMnem, *AsmOps;
@@ -13233,7 +13235,7 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
     }
   }
   cs_mem_free(tmp);
-  return true;
+  return id;
 }
 
 #endif // PRINT_ALIAS_INSTR

arch/X86/X86IntelInstPrinter.c

@@ -279,21 +279,19 @@ static bool get_first_op(char *buffer, char *firstop)
 		return false;
 }
 
-static bool printAliasInstr(MCInst *MI, SStream *OS, void *info);
+static unsigned int printAliasInstr(MCInst *MI, SStream *OS, void *info);
 static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI);
 void X86_Intel_printInst(MCInst *MI, SStream *O, void *Info)
 {
-	//if (TSFlags & X86II::LOCK)
+	unsigned int id, alias_id;
-	//  O << "\tlock\n";
 
-	if (printAliasInstr(MI, O, NULL)) {
+	// save internal ID of this insn
-		char *mnem = cs_strdup(O->buffer);
+	id = MCInst_getOpcode(MI);
-		char *tab = strchr(mnem, '\t');
+
-		if (tab)
+	// Try to print any aliases first.
-			*tab = '\0';
+	alias_id = printAliasInstr(MI, O, NULL);
-		// reflect the new insn name (alias) in the opcode
+	if (alias_id) {
-		MCInst_setOpcode(MI, X86_get_insn_id2(X86_map_insn(mnem)));
+		MCInst_setOpcode(MI, alias_id);
-		cs_mem_free(mnem);
 	} else
 		printInstruction(MI, O, NULL);
 

arch/X86/X86Mapping.c

@@ -6671,12 +6671,6 @@ void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
 	}
 }
 
-// given public insn id, return internal insn id
-unsigned int X86_get_insn_id2(unsigned int id)
-{
-	return insn_reverse_id(insns, ARR_SIZE(insns), id);
-}
-
 // can this instruction combine with prev prefix instruction?
 // this also updates h->pre_prefix if needed
 bool X86_insn_check_combine(cs_struct *h, cs_insn *insn)

arch/X86/X86Mapping.h

@@ -32,9 +32,6 @@ const char *X86_insn_name(csh handle, unsigned int id);
 // return insn id, given insn mnemonic
 x86_reg X86_map_insn(const char *mnem);
 
-// given public insn id, return internal insn id
-unsigned int X86_get_insn_id2(unsigned int insn_id);
-
 // post printer for X86.
 void X86_post_printer(csh handle, cs_insn *pub_insn, char *insn_asm);