Virtualization
/
capstone
mirror of https://gitlab.com/qemu-project/capstone.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

x86: eliminate X86_get_insn_id2()

This commit is contained in:
Nguyen Anh Quynh 2014-02-18 11:11:46 +08:00
parent 585018f831
commit 005c5148a6
6 changed files with 34 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
arch/X86/X86ATTInstPrinter.c
View File

@ -509,24 +509,18 @@ static void get_last_op(char *buffer, char *lastop)
void X86_ATT_printInst(MCInst *MI, SStream *OS, void *info)
{
// FIXME
//const MCInstrDesc *Desc = MII.get(MI->getOpcode());
//uint64_t TSFlags = Desc.TSFlags;
unsigned int id, alias_id;
//if (TSFlags & X86II::LOCK)
// OS << "\tlock\n";
// save internal ID of this insn
id = MCInst_getOpcode(MI);
// Try to print any aliases first.
if (printAliasInstr(MI, OS, NULL)) {
char *mnem = cs_strdup(OS->buffer);
char *tab = strchr(mnem, '\t');
if (tab)
*tab = '\0';
alias_id = printAliasInstr(MI, OS, NULL);
if (alias_id) {
// reflect the new insn name (alias) in the opcode
MCInst_setOpcode(MI, X86_get_insn_id2(X86_map_insn(mnem)));
cs_mem_free(mnem);
MCInst_setOpcode(MI, alias_id);
} else
printInstruction(MI, OS, NULL);
printInstruction(MI, OS, NULL);
if (MI->csh->detail) {
// first op can be embedded in the asm by llvm.

16
arch/X86/X86GenAsmWriter.inc
View File

@ -13667,13 +13667,15 @@ static char *getRegisterName(unsigned RegNo)
#ifdef PRINT_ALIAS_INSTR
#undef PRINT_ALIAS_INSTR
static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
static unsigned int printAliasInstr(MCInst *MI, SStream *OS, void *info)
{
unsigned int id;
#define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg)))
const char *AsmString;
// MCRegisterInfo *MRI = (MCRegisterInfo *)info;
switch (MCInst_getOpcode(MI)) {
default: return false;
id = MCInst_getOpcode(MI);
switch (id) {
default: return 0;
case X86_AAD8i8:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
@ -13682,7 +13684,7 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
AsmString = "aad";
break;
}
return false;
return 0;
case X86_AAM8i8:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
@ -13691,14 +13693,14 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
AsmString = "aam";
break;
}
return false;
return 0;
case X86_XSTORE:
if (MCInst_getNumOperands(MI) == 0) {
// (XSTORE)
AsmString = "xstorerng";
break;
}
return false;
return 0;
}
char *tmp = cs_strdup(AsmString), *AsmMnem, *AsmOps;
@ -13722,7 +13724,7 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
}
}
cs_mem_free(tmp);
return true;
return id;
}
#endif // PRINT_ALIAS_INSTR

16
arch/X86/X86GenAsmWriter1.inc
View File

@ -13178,13 +13178,15 @@ static char *getRegisterName(unsigned RegNo)
#ifdef PRINT_ALIAS_INSTR
#undef PRINT_ALIAS_INSTR
static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
static unsigned int printAliasInstr(MCInst *MI, SStream *OS, void *info)
{
unsigned int id;
#define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg)))
const char *AsmString;
// MCRegisterInfo *MRI = (MCRegisterInfo *)info;
switch (MCInst_getOpcode(MI)) {
default: return false;
id = MCInst_getOpcode(MI);
switch (id) {
default: return 0;
case X86_AAD8i8:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
@ -13193,7 +13195,7 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
AsmString = "aad";
break;
}
return false;
return 0;
case X86_AAM8i8:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
@ -13202,14 +13204,14 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
AsmString = "aam";
break;
}
return false;
return 0;
case X86_XSTORE:
if (MCInst_getNumOperands(MI) == 0) {
// (XSTORE)
AsmString = "xstorerng";
break;
}
return false;
return 0;
}
char *tmp = cs_strdup(AsmString), *AsmMnem, *AsmOps;
@ -13233,7 +13235,7 @@ static bool printAliasInstr(MCInst *MI, SStream *OS, void *info)
}
}
cs_mem_free(tmp);
return true;
return id;
}
#endif // PRINT_ALIAS_INSTR

20
arch/X86/X86IntelInstPrinter.c
View File

@ -279,21 +279,19 @@ static bool get_first_op(char *buffer, char *firstop)
return false;
}
static bool printAliasInstr(MCInst *MI, SStream *OS, void *info);
static unsigned int printAliasInstr(MCInst *MI, SStream *OS, void *info);
static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI);
void X86_Intel_printInst(MCInst *MI, SStream *O, void *Info)
{
//if (TSFlags & X86II::LOCK)
// O << "\tlock\n";
unsigned int id, alias_id;
if (printAliasInstr(MI, O, NULL)) {
char *mnem = cs_strdup(O->buffer);
char *tab = strchr(mnem, '\t');
if (tab)
*tab = '\0';
// reflect the new insn name (alias) in the opcode
MCInst_setOpcode(MI, X86_get_insn_id2(X86_map_insn(mnem)));
cs_mem_free(mnem);
// save internal ID of this insn
id = MCInst_getOpcode(MI);
// Try to print any aliases first.
alias_id = printAliasInstr(MI, O, NULL);
if (alias_id) {
MCInst_setOpcode(MI, alias_id);
} else
printInstruction(MI, O, NULL);

6
arch/X86/X86Mapping.c
View File

@ -6671,12 +6671,6 @@ void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
}
}
// given public insn id, return internal insn id
unsigned int X86_get_insn_id2(unsigned int id)
{
return insn_reverse_id(insns, ARR_SIZE(insns), id);
}
// can this instruction combine with prev prefix instruction?
// this also updates h->pre_prefix if needed
bool X86_insn_check_combine(cs_struct *h, cs_insn *insn)

3
arch/X86/X86Mapping.h
View File

@ -32,9 +32,6 @@ const char *X86_insn_name(csh handle, unsigned int id);
// return insn id, given insn mnemonic
x86_reg X86_map_insn(const char *mnem);
// given public insn id, return internal insn id
unsigned int X86_get_insn_id2(unsigned int insn_id);
// post printer for X86.
void X86_post_printer(csh handle, cs_insn *pub_insn, char *insn_asm);