x86: op_addReg() & op_addImm() only work when detail mode is ON
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@ -488,7 +488,6 @@ void X86_Intel_printInst(MCInst *MI, SStream *O, void *Info)
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MI->flat_insn->detail->x86.operands[0].size = MI->csh->regsize_map[reg];
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MI->flat_insn->detail->x86.op_count++;
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}
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}
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}
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@ -42561,17 +42561,21 @@ bool X86_lockrep(MCInst *MI, SStream *O)
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void op_addReg(MCInst *MI, int reg)
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{
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_REG;
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].reg = reg;
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->csh->regsize_map[reg];
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MI->flat_insn->detail->x86.op_count++;
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if (MI->csh->detail) {
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_REG;
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].reg = reg;
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->csh->regsize_map[reg];
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MI->flat_insn->detail->x86.op_count++;
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}
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}
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void op_addImm(MCInst *MI, int v)
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{
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM;
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = v;
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MI->flat_insn->detail->x86.op_count++;
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if (MI->csh->detail) {
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM;
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MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = v;
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MI->flat_insn->detail->x86.op_count++;
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}
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}
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#endif
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