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x86: do not use markup in AT&T syntax

This commit is contained in:
Nguyen Anh Quynh 2014-06-18 14:28:55 +08:00
parent 46291c139f
commit 1e688d4ff9
1 changed files with 14 additions and 26 deletions
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40
arch/X86/X86ATTInstPrinter.c
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@ -30,8 +30,6 @@
#include "../../MCRegisterInfo.h" #include "../../MCRegisterInfo.h"
#include "X86Mapping.h" #include "X86Mapping.h"
#define markup(x) ""
#define GET_INSTRINFO_ENUM #define GET_INSTRINFO_ENUM
#ifdef CAPSTONE_X86_REDUCE #ifdef CAPSTONE_X86_REDUCE
@ -228,8 +226,6 @@ static void printSrcIdx(MCInst *MI, unsigned Op, SStream *O)
SegReg = MCInst_getOperand(MI, Op+1); SegReg = MCInst_getOperand(MI, Op+1);
SStream_concat0(O, markup("<mem:"));
// If this has a segment register, print it. // If this has a segment register, print it.
if (MCOperand_getReg(SegReg)) { if (MCOperand_getReg(SegReg)) {
printOperand(MI, Op+1, O); printOperand(MI, Op+1, O);
@ -241,7 +237,7 @@ static void printSrcIdx(MCInst *MI, unsigned Op, SStream *O)
printOperand(MI, Op, O); printOperand(MI, Op, O);
SStream_concat(O, ")%s", markup(">")); SStream_concat0(O, ")");
set_mem_access(MI, false); set_mem_access(MI, false);
} }
@ -249,14 +245,14 @@ static void printDstIdx(MCInst *MI, unsigned Op, SStream *O)
{ {
// DI accesses are always ES-based on non-64bit mode // DI accesses are always ES-based on non-64bit mode
if (MI->csh->mode != CS_MODE_64) if (MI->csh->mode != CS_MODE_64)
SStream_concat(O, "%s%s", markup("<mem:"), "%es:("); SStream_concat0(O, "%es:(");
else else
SStream_concat(O, "%s%s", markup("<mem:"), "("); SStream_concat0(O, "(");
set_mem_access(MI, true); set_mem_access(MI, true);
printOperand(MI, Op, O); printOperand(MI, Op, O);
SStream_concat(O, ")%s", markup(">")); SStream_concat0(O, ")");
set_mem_access(MI, false); set_mem_access(MI, false);
} }
@ -313,8 +309,6 @@ static void printMemOffset(MCInst *MI, unsigned Op, SStream *O)
MCOperand *DispSpec = MCInst_getOperand(MI, Op); MCOperand *DispSpec = MCInst_getOperand(MI, Op);
MCOperand *SegReg = MCInst_getOperand(MI, Op+1); MCOperand *SegReg = MCInst_getOperand(MI, Op+1);
SStream_concat0(O, markup("<mem:"));
// If this has a segment register, print it. // If this has a segment register, print it.
if (MCOperand_getReg(SegReg)) { if (MCOperand_getReg(SegReg)) {
printOperand(MI, Op+1, O); printOperand(MI, Op+1, O);
@ -344,8 +338,6 @@ static void printMemOffset(MCInst *MI, unsigned Op, SStream *O)
} }
} }
SStream_concat0(O, markup(">"));
if (MI->csh->detail) if (MI->csh->detail)
MI->flat_insn->detail->x86.op_count++; MI->flat_insn->detail->x86.op_count++;
} }
@ -435,14 +427,14 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
int64_t imm = MCOperand_getImm(Op); int64_t imm = MCOperand_getImm(Op);
if (imm >= 0) { if (imm >= 0) {
if (imm > HEX_THRESHOLD) if (imm > HEX_THRESHOLD)
SStream_concat(O, "%s$0x%"PRIx64"%s", markup("<imm:"), imm, markup(">")); SStream_concat(O, "$0x%"PRIx64, imm);
else else
SStream_concat(O, "%s$%"PRIu64"%s", markup("<imm:"), imm, markup(">")); SStream_concat(O, "$%"PRIu64, imm);
} else { } else {
if (imm < -HEX_THRESHOLD) if (imm < -HEX_THRESHOLD)
SStream_concat(O, "%s$-0x%"PRIx64"%s", markup("<imm:"), -imm, markup(">")); SStream_concat(O, "$-0x%"PRIx64, -imm);
else else
SStream_concat(O, "%s$-%"PRIu64"%s", markup("<imm:"), -imm, markup(">")); SStream_concat(O, "$-%"PRIu64, -imm);
} }
if (MI->csh->detail) { if (MI->csh->detail) {
if (MI->csh->doing_mem) { if (MI->csh->doing_mem) {
@ -473,14 +465,14 @@ static void _printOperand(MCInst *MI, unsigned OpNo, SStream *O)
int64_t imm = MCOperand_getImm(Op); int64_t imm = MCOperand_getImm(Op);
if (imm < 0) { if (imm < 0) {
if (imm < -HEX_THRESHOLD) if (imm < -HEX_THRESHOLD)
SStream_concat(O, "%s$-0x%"PRIx64"%s", markup("<imm:"), -imm, markup(">")); SStream_concat(O, "$-0x%"PRIx64, -imm);
else else
SStream_concat(O, "%s$-%"PRIu64"%s", markup("<imm:"), -imm, markup(">")); SStream_concat(O, "$-%"PRIu64, -imm);
} else { } else {
if (imm > HEX_THRESHOLD) if (imm > HEX_THRESHOLD)
SStream_concat(O, "%s$0x%"PRIx64"%s", markup("<imm:"), imm, markup(">")); SStream_concat(O, "$0x%"PRIx64, imm);
else else
SStream_concat(O, "%s$%"PRIu64"%s", markup("<imm:"), imm, markup(">")); SStream_concat(O, "$%"PRIu64, imm);
} }
} }
} }
@ -502,8 +494,6 @@ static void printMemReference(MCInst *MI, unsigned Op, SStream *O)
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0;
} }
SStream_concat0(O, markup("<mem:"));
// If this has a segment register, print it. // If this has a segment register, print it.
if (MCOperand_getReg(SegReg)) { if (MCOperand_getReg(SegReg)) {
_printOperand(MI, Op+4, O); _printOperand(MI, Op+4, O);
@ -539,14 +529,12 @@ static void printMemReference(MCInst *MI, unsigned Op, SStream *O)
if (MI->csh->detail) if (MI->csh->detail)
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = (int)ScaleVal; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = (int)ScaleVal;
if (ScaleVal != 1) { if (ScaleVal != 1) {
SStream_concat(O, ", %s%u%s", markup("<imm:"), ScaleVal, markup(">")); SStream_concat(O, ", %u", ScaleVal);
} }
} }
SStream_concat0(O, ")"); SStream_concat0(O, ")");
} }
SStream_concat0(O, markup(">"));
if (MI->csh->detail) if (MI->csh->detail)
MI->flat_insn->detail->x86.op_count++; MI->flat_insn->detail->x86.op_count++;
} }
@ -566,7 +554,7 @@ static void printMemReference(MCInst *MI, unsigned Op, SStream *O)
static void printRegName(SStream *OS, unsigned RegNo) static void printRegName(SStream *OS, unsigned RegNo)
{ {
SStream_concat(OS, "%s%%%s%s", markup("<reg:"), getRegisterName(RegNo), markup(">")); SStream_concat(OS, "%%%s", getRegisterName(RegNo));
} }
void X86_ATT_printInst(MCInst *MI, SStream *OS, void *info) void X86_ATT_printInst(MCInst *MI, SStream *OS, void *info)