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tests: properly define HAS_XXX marcros so some tests work

This commit is contained in:
Nguyen Anh Quynh 2015-08-09 09:47:53 -07:00
parent 5d18674abc
commit 20037df9dd
4 changed files with 54 additions and 54 deletions
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32
tests/test_basic.c
View File

@ -30,13 +30,13 @@ static void print_string_hex(unsigned char *str, size_t len)
static void test()
{
#ifdef CAPSTONE_X86_SUPPORT
#ifdef CAPSTONE_HAS_X86
#define X86_CODE16 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
#define X86_CODE32 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
//#define X86_CODE32 "\x0f\xa7\xc0" // xstorerng
#define X86_CODE64 "\x55\x48\x8b\x05\xb8\x13\x00\x00"
#endif
#ifdef CAPSTONE_ARM_SUPPORT
#ifdef CAPSTONE_HAS_ARM
//#define ARM_CODE "\x04\xe0\x2d\xe5"
#define ARM_CODE "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
#define ARM_CODE2 "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3"
@ -45,31 +45,31 @@ static void test()
#define THUMB_CODE "\x70\x47\xeb\x46\x83\xb0\xc9\x68"
#define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0"
#endif
#ifdef CAPSTONE_MIPS_SUPPORT
#ifdef CAPSTONE_HAS_MIPS
#define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56"
#define MIPS_CODE2 "\x56\x34\x21\x34\xc2\x17\x01\x00"
#define MIPS_32R6M "\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0"
#define MIPS_32R6 "\xec\x80\x00\x19\x7c\x43\x22\xa0"
#endif
#ifdef CAPSTONE_ARM64_SUPPORT
#ifdef CAPSTONE_HAS_ARM64
//#define ARM64_CODE "\x00\x40\x21\x4b" // sub w0, w0, w1, uxtw
//#define ARM64_CODE "\x21\x7c\x02\x9b" // mul x1, x1, x2
//#define ARM64_CODE "\x20\x74\x0b\xd5" // dc zva, x0
//#define ARM64_CODE "\xe1\x0b\x40\xb9" // ldr w1, [sp, #0x8]
#define ARM64_CODE "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9"
#endif
#ifdef CAPSTONE_PPC_SUPPORT
#ifdef CAPSTONE_HAS_PPC
#define PPC_CODE "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21"
#define PPC_CODE2 "\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f"
#endif
#ifdef CAPSTONE_SPARC_SUPPORT
#ifdef CAPSTONE_HAS_SPARC
#define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
#define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
#endif
#ifdef CAPSTONE_SYSZ_SUPPORT
#ifdef CAPSTONE_HAS_SYSZ
#define SYSZ_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
#endif
#ifdef CAPSTONE_XCORE_SUPPORT
#ifdef CAPSTONE_HAS_XCORE
#define XCORE_CODE "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10"
#endif
struct platform {
@ -82,7 +82,7 @@ static void test()
cs_opt_value opt_value;
};
struct platform platforms[] = {
#ifdef CAPSTONE_X86_SUPPORT
#ifdef CAPSTONE_HAS_X86
{
CS_ARCH_X86,
CS_MODE_16,
@ -114,7 +114,7 @@ static void test()
"X86 64 (Intel syntax)"
},
#endif
#ifdef CAPSTONE_ARM_SUPPORT
#ifdef CAPSTONE_HAS_ARM
{
CS_ARCH_ARM,
CS_MODE_ARM,
@ -158,7 +158,7 @@ static void test()
"Arm-V8"
},
#endif
#ifdef CAPSTONE_MIPS_SUPPORT
#ifdef CAPSTONE_HAS_MIPS
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
@ -188,7 +188,7 @@ static void test()
"MIPS-32R6 (Big-endian)"
},
#endif
#ifdef CAPSTONE_ARM64_SUPPORT
#ifdef CAPSTONE_HAS_ARM64
{
CS_ARCH_ARM64,
CS_MODE_ARM,
@ -197,7 +197,7 @@ static void test()
"ARM-64"
},
#endif
#ifdef CAPSTONE_PPC_SUPPORT
#ifdef CAPSTONE_HAS_PPC
{
CS_ARCH_PPC,
CS_MODE_BIG_ENDIAN,
@ -222,7 +222,7 @@ static void test()
"PPC-64 + QPX",
},
#endif
#ifdef CAPSTONE_SPARC_SUPPORT
#ifdef CAPSTONE_HAS_SPARC
{
CS_ARCH_SPARC,
CS_MODE_BIG_ENDIAN,
@ -238,7 +238,7 @@ static void test()
"SparcV9"
},
#endif
#ifdef CAPSTONE_SYSZ_SUPPORT
#ifdef CAPSTONE_HAS_SYSZ
{
CS_ARCH_SYSZ,
(cs_mode)0,
@ -247,7 +247,7 @@ static void test()
"SystemZ"
},
#endif
#ifdef CAPSTONE_XCORE_SUPPORT
#ifdef CAPSTONE_HAS_XCORE
{
CS_ARCH_XCORE,
(cs_mode)0,

32
tests/test_detail.c
View File

@ -30,13 +30,13 @@ static void print_string_hex(unsigned char *str, size_t len)
static void test()
{
#ifdef CAPSTONE_X86_SUPPORT
#ifdef CAPSTONE_HAS_X86
#define X86_CODE16 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
#define X86_CODE32 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
//#define X86_CODE32 "\x0f\xa7\xc0" // xstorerng
#define X86_CODE64 "\x55\x48\x8b\x05\xb8\x13\x00\x00"
#endif
#ifdef CAPSTONE_ARM_SUPPORT
#ifdef CAPSTONE_HAS_ARM
//#define ARM_CODE "\x04\xe0\x2d\xe5"
#define ARM_CODE "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
#define ARM_CODE2 "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3"
@ -45,7 +45,7 @@ static void test()
#define THUMB_MCLASS "\xef\xf3\x02\x80"
#define ARMV8 "\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5"
#endif
#ifdef CAPSTONE_MIPS_SUPPORT
#ifdef CAPSTONE_HAS_MIPS
#define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56\x00\x80\x04\x08"
//#define MIPS_CODE "\x21\x38\x00\x01"
//#define MIPS_CODE "\x21\x30\xe6\x70"
@ -54,7 +54,7 @@ static void test()
#define MIPS_32R6M "\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0"
#define MIPS_32R6 "\xec\x80\x00\x19\x7c\x43\x22\xa0"
#endif
#ifdef CAPSTONE_ARM64_SUPPORT
#ifdef CAPSTONE_HAS_ARM64
//#define ARM64_CODE "\xe1\x0b\x40\xb9" // ldr w1, [sp, #0x8]
//#define ARM64_CODE "\x00\x40\x21\x4b" // sub w0, w0, w1, uxtw
//#define ARM64_CODE "\x21\x7c\x02\x9b" // mul x1, x1, x2
@ -66,23 +66,23 @@ static void test()
#endif
//#define THUMB_CODE "\x0a\xbf" // itet eq
//#define X86_CODE32 "\x77\x04" // ja +6
#ifdef CAPSTONE_PPC_SUPPORT
#ifdef CAPSTONE_HAS_PPC
#define PPC_CODE "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21\x40\x82\x00\x14"
#define PPC_CODE2 "\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f"
#endif
#ifdef CAPSTONE_SPARC_SUPPORT
#ifdef CAPSTONE_HAS_SPARC
#define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
#define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
#endif
#ifdef CAPSTONE_SYSZ_SUPPORT
#ifdef CAPSTONE_HAS_SYSZ
#define SYSZ_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
#endif
#ifdef CAPSTONE_XCORE_SUPPORT
#ifdef CAPSTONE_HAS_XCORE
#define XCORE_CODE "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10"
#endif
struct platform platforms[] = {
#ifdef CAPSTONE_X86_SUPPORT
#ifdef CAPSTONE_HAS_X86
{
CS_ARCH_X86,
CS_MODE_16,
@ -114,7 +114,7 @@ static void test()
"X86 64 (Intel syntax)"
},
#endif
#ifdef CAPSTONE_ARM_SUPPORT
#ifdef CAPSTONE_HAS_ARM
{
CS_ARCH_ARM,
CS_MODE_ARM,
@ -158,7 +158,7 @@ static void test()
"Arm-V8"
},
#endif
#ifdef CAPSTONE_MIPS_SUPPORT
#ifdef CAPSTONE_HAS_MIPS
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
@ -188,7 +188,7 @@ static void test()
"MIPS-32R6 (Big-endian)"
},
#endif
#ifdef CAPSTONE_ARM64_SUPPORT
#ifdef CAPSTONE_HAS_ARM64
{
CS_ARCH_ARM64,
CS_MODE_ARM,
@ -197,7 +197,7 @@ static void test()
"ARM-64"
},
#endif
#ifdef CAPSTONE_PPC_SUPPORT
#ifdef CAPSTONE_HAS_PPC
{
CS_ARCH_PPC,
CS_MODE_BIG_ENDIAN,
@ -213,7 +213,7 @@ static void test()
"PPC-64 + QPX",
},
#endif
#ifdef CAPSTONE_SPARC_SUPPORT
#ifdef CAPSTONE_HAS_SPARC
{
CS_ARCH_SPARC,
CS_MODE_BIG_ENDIAN,
@ -229,7 +229,7 @@ static void test()
"SparcV9"
},
#endif
#ifdef CAPSTONE_SYSZ_SUPPORT
#ifdef CAPSTONE_HAS_SYSZ
{
CS_ARCH_SYSZ,
(cs_mode)0,
@ -238,7 +238,7 @@ static void test()
"SystemZ"
},
#endif
#ifdef CAPSTONE_XCORE_SUPPORT
#ifdef CAPSTONE_HAS_XCORE
{
CS_ARCH_XCORE,
(cs_mode)0,

32
tests/test_iter.c
View File

@ -31,27 +31,27 @@ static void print_string_hex(unsigned char *str, size_t len)
static void test()
{
#ifdef CAPSTONE_X86_SUPPORT
#ifdef CAPSTONE_HAS_X86
#define X86_CODE16 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
#define X86_CODE32 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
//#define X86_CODE32 "\x0f\xa7\xc0" // xstorerng
#define X86_CODE64 "\x55\x48\x8b\x05\xb8\x13\x00\x00"
#endif
#ifdef CAPSTONE_ARM_SUPPORT
#ifdef CAPSTONE_HAS_ARM
//#define ARM_CODE "\x04\xe0\x2d\xe5"
#define ARM_CODE "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
#define ARM_CODE2 "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3"
#define THUMB_CODE "\x70\x47\xeb\x46\x83\xb0\xc9\x68"
#define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0"
#endif
#ifdef CAPSTONE_MIPS_SUPPORT
#ifdef CAPSTONE_HAS_MIPS
#define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56\x00\x80\x04\x08"
//#define MIPS_CODE "\x21\x38\x00\x01"
//#define MIPS_CODE "\x21\x30\xe6\x70"
//#define MIPS_CODE "\x1c\x00\x40\x14"
#define MIPS_CODE2 "\x56\x34\x21\x34\xc2\x17\x01\x00"
#endif
#ifdef CAPSTONE_ARM64_SUPPORT
#ifdef CAPSTONE_HAS_ARM64
//#define ARM64_CODE "\xe1\x0b\x40\xb9" // ldr w1, [sp, #0x8]
//#define ARM64_CODE "\x00\x40\x21\x4b" // sub w0, w0, w1, uxtw
//#define ARM64_CODE "\x21\x7c\x02\x9b" // mul x1, x1, x2
@ -63,22 +63,22 @@ static void test()
#endif
//#define THUMB_CODE "\x0a\xbf" // itet eq
//#define X86_CODE32 "\x77\x04" // ja +6
#ifdef CAPSTONE_PPC_SUPPORT
#ifdef CAPSTONE_HAS_PPC
#define PPC_CODE "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21\x40\x82\x00\x14"
#endif
#ifdef CAPSTONE_SPARC_SUPPORT
#ifdef CAPSTONE_HAS_SPARC
#define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
#define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
#endif
#ifdef CAPSTONE_SYSZ_SUPPORT
#ifdef CAPSTONE_HAS_SYSZ
#define SYSZ_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
#endif
#ifdef CAPSTONE_XCORE_SUPPORT
#ifdef CAPSTONE_HAS_XCORE
#define XCORE_CODE "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10"
#endif
struct platform platforms[] = {
#ifdef CAPSTONE_X86_SUPPORT
#ifdef CAPSTONE_HAS_X86
{
CS_ARCH_X86,
CS_MODE_16,
@ -110,7 +110,7 @@ static void test()
"X86 64 (Intel syntax)"
},
#endif
#ifdef CAPSTONE_ARM_SUPPORT
#ifdef CAPSTONE_HAS_ARM
{
CS_ARCH_ARM,
CS_MODE_ARM,
@ -140,7 +140,7 @@ static void test()
"THUMB"
},
#endif
#ifdef CAPSTONE_MIPS_SUPPORT
#ifdef CAPSTONE_HAS_MIPS
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
@ -156,7 +156,7 @@ static void test()
"MIPS-64-EL (Little-endian)"
},
#endif
#ifdef CAPSTONE_ARM64_SUPPORT
#ifdef CAPSTONE_HAS_ARM64
{
CS_ARCH_ARM64,
CS_MODE_ARM,
@ -165,7 +165,7 @@ static void test()
"ARM-64"
},
#endif
#ifdef CAPSTONE_PPC_SUPPORT
#ifdef CAPSTONE_HAS_PPC
{
CS_ARCH_PPC,
CS_MODE_BIG_ENDIAN,
@ -174,7 +174,7 @@ static void test()
"PPC-64"
},
#endif
#ifdef CAPSTONE_SPARC_SUPPORT
#ifdef CAPSTONE_HAS_SPARC
{
CS_ARCH_SPARC,
CS_MODE_BIG_ENDIAN,
@ -190,7 +190,7 @@ static void test()
"SparcV9"
},
#endif
#ifdef CAPSTONE_SYSZ_SUPPORT
#ifdef CAPSTONE_HAS_SYSZ
{
CS_ARCH_SYSZ,
(cs_mode)0,
@ -199,7 +199,7 @@ static void test()
"SystemZ"
},
#endif
#ifdef CAPSTONE_XCORE_SUPPORT
#ifdef CAPSTONE_HAS_XCORE
{
CS_ARCH_XCORE,
(cs_mode)0,

12
tests/test_skipdata.c
View File

@ -30,7 +30,7 @@ static void print_string_hex(unsigned char *str, size_t len)
printf("\n");
}
#ifdef CAPSTONE_ARM_SUPPORT
#ifdef CAPSTONE_HAS_ARM
static size_t mycallback(const uint8_t *buffer, size_t buffer_size, size_t offset, void *p)
{
// always skip 2 bytes when encountering data
@ -40,19 +40,19 @@ static size_t mycallback(const uint8_t *buffer, size_t buffer_size, size_t offse
static void test()
{
#ifdef CAPSTONE_X86_SUPPORT
#ifdef CAPSTONE_HAS_X86
#define X86_CODE32 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x00\x91\x92"
#endif
#define RANDOM_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
#if defined(CAPSTONE_X86_SUPPORT) || defined(CAPSTONE_ARM_SUPPORT)
#if defined(CAPSTONE_HAS_X86) || defined(CAPSTONE_HAS_ARM)
cs_opt_skipdata skipdata = {
// rename default "data" instruction from ".byte" to "db"
"db",
};
#endif
#ifdef CAPSTONE_ARM_SUPPORT
#ifdef CAPSTONE_HAS_ARM
cs_opt_skipdata skipdata_callback = {
"db",
&mycallback,
@ -60,7 +60,7 @@ static void test()
#endif
struct platform platforms[] = {
#ifdef CAPSTONE_X86_SUPPORT
#ifdef CAPSTONE_HAS_X86
{
CS_ARCH_X86,
CS_MODE_32,
@ -79,7 +79,7 @@ static void test()
(size_t) &skipdata,
},
#endif
#ifdef CAPSTONE_ARM_SUPPORT
#ifdef CAPSTONE_HAS_ARM
{
CS_ARCH_ARM,
CS_MODE_ARM,