diff --git a/arch/AArch64/AArch64MappingInsn.inc b/arch/AArch64/AArch64MappingInsn.inc
index 0e60942c..f7acc958 100644
--- a/arch/AArch64/AArch64MappingInsn.inc
+++ b/arch/AArch64/AArch64MappingInsn.inc
@@ -6436,19 +6436,19 @@
 {
 	AArch64_MRS, ARM64_INS_MRS,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM64_GRP_PRIVILEGE, 0 }, 0, 0
 #endif
 },
 {
 	AArch64_MSR, ARM64_INS_MSR,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM64_GRP_PRIVILEGE, 0 }, 0, 0
 #endif
 },
 {
 	AArch64_MSRpstate, ARM64_INS_MSR,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+	{ 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_PRIVILEGE, 0 }, 0, 0
 #endif
 },
 {
diff --git a/arch/ARM/ARMMappingInsn.inc b/arch/ARM/ARMMappingInsn.inc
index 99a25e0c..a5eb37a3 100644
--- a/arch/ARM/ARMMappingInsn.inc
+++ b/arch/ARM/ARMMappingInsn.inc
@@ -208,13 +208,13 @@
 {
 	ARM_CDP, ARM_INS_CDP,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
 	ARM_CDP2, ARM_INS_CDP2,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
@@ -880,25 +880,25 @@
 {
 	ARM_MCR, ARM_INS_MCR,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_ARM, 0 }, 0, 0
 #endif
 },
 {
 	ARM_MCR2, ARM_INS_MCR2,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
 	ARM_MCRR, ARM_INS_MCRR,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_ARM, 0 }, 0, 0
 #endif
 },
 {
 	ARM_MCRR2, ARM_INS_MCRR2,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
@@ -964,13 +964,13 @@
 {
 	ARM_MRC, ARM_INS_MRC,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_ARM, 0 }, 0, 0
 #endif
 },
 {
 	ARM_MRC2, ARM_INS_MRC2,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
@@ -1468,7 +1468,7 @@
 {
 	ARM_SMC, ARM_INS_SMC,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_TRUSTZONE, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_ARM, ARM_GRP_TRUSTZONE, 0 }, 0, 0
 #endif
 },
 {
@@ -10780,13 +10780,13 @@
 {
 	ARM_t2CDP, ARM_INS_CDP,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
 	ARM_t2CDP2, ARM_INS_CDP2,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
@@ -11410,25 +11410,25 @@
 {
 	ARM_t2MCR, ARM_INS_MCR,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, 0 }, 0, 0
 #endif
 },
 {
 	ARM_t2MCR2, ARM_INS_MCR2,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
 	ARM_t2MCRR, ARM_INS_MCRR,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, 0 }, 0, 0
 #endif
 },
 {
 	ARM_t2MCRR2, ARM_INS_MCRR2,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
@@ -11482,13 +11482,13 @@
 {
 	ARM_t2MRC, ARM_INS_MRC,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, 0 }, 0, 0
 #endif
 },
 {
 	ARM_t2MRC2, ARM_INS_MRC2,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
 #endif
 },
 {
@@ -11920,7 +11920,7 @@
 {
 	ARM_t2SMC, ARM_INS_SMC,
 #ifndef CAPSTONE_DIET
-	{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_TRUSTZONE, 0 }, 0, 0
+	{ 0 }, { 0 }, { ARM_GRP_PRIVILEGE, ARM_GRP_THUMB2, ARM_GRP_TRUSTZONE, 0 }, 0, 0
 #endif
 },
 {
diff --git a/include/capstone/arm.h b/include/capstone/arm.h
index 01a234fe..3c2134d4 100644
--- a/include/capstone/arm.h
+++ b/include/capstone/arm.h
@@ -878,6 +878,7 @@ typedef enum arm_insn_group {
 	//> Generic groups
 	// all jump instructions (conditional+direct+indirect jumps)
 	ARM_GRP_JUMP,	// = CS_GRP_JUMP
+	ARM_GRP_PRIVILEGE = 6, // = CS_GRP_PRIVILEGE
 
 	//> Architecture-specific groups
 	ARM_GRP_CRYPTO = 128,
diff --git a/include/capstone/arm64.h b/include/capstone/arm64.h
index 9182f9d3..5854a949 100644
--- a/include/capstone/arm64.h
+++ b/include/capstone/arm64.h
@@ -1134,6 +1134,7 @@ typedef enum arm64_insn_group {
 	//> Generic groups
 	// all jump instructions (conditional+direct+indirect jumps)
 	ARM64_GRP_JUMP,	// = CS_GRP_JUMP
+	ARM64_GRP_PRIVILEGE = 6, // = CS_GRP_PRIVILEGE
 
 	//> Architecture-specific groups
 	ARM64_GRP_CRYPTO = 128,