diff --git a/arch/X86/X86Disassembler.c b/arch/X86/X86Disassembler.c index c7dedb79..95193a36 100644 --- a/arch/X86/X86Disassembler.c +++ b/arch/X86/X86Disassembler.c @@ -211,6 +211,7 @@ static void translateImmediate(MCInst *mcInst, uint64_t immediate, break; } } else if (type == TYPE_IMM3) { +#ifndef CAPSTONE_X86_REDUCE // Check for immediates that printSSECC can't handle. if (immediate >= 8) { unsigned NewOpc = 0; @@ -229,7 +230,9 @@ static void translateImmediate(MCInst *mcInst, uint64_t immediate, // Switch opcode to the one that doesn't get special printing. MCInst_setOpcode(mcInst, NewOpc); } +#endif } else if (type == TYPE_IMM5) { +#ifndef CAPSTONE_X86_REDUCE // Check for immediates that printAVXCC can't handle. if (immediate >= 32) { unsigned NewOpc = 0; @@ -260,6 +263,7 @@ static void translateImmediate(MCInst *mcInst, uint64_t immediate, // Switch opcode to the one that doesn't get special printing. MCInst_setOpcode(mcInst, NewOpc); } +#endif } switch (type) { diff --git a/arch/X86/X86DisassemblerDecoder.c b/arch/X86/X86DisassemblerDecoder.c index 15f995e5..64b80f42 100644 --- a/arch/X86/X86DisassemblerDecoder.c +++ b/arch/X86/X86DisassemblerDecoder.c @@ -951,10 +951,8 @@ static int readOpcode(struct InternalInstruction *insn) } // Hacky for FEMMS +#ifndef CAPSTONE_X86_REDUCE #define GET_INSTRINFO_ENUM -#ifdef CAPSTONE_X86_REDUCE -#include "X86GenInstrInfo_reduce.inc" -#else #include "X86GenInstrInfo.inc" #endif @@ -978,11 +976,13 @@ static int getIDWithAttrMask(uint16_t *instructionID, InstructionContext instructionClass; +#ifndef CAPSTONE_X86_REDUCE // HACK for femms. to be handled properly in next version 3.x if (insn->opcode == 0x0e && insn->opcodeType == T3DNOW_MAP) { *instructionID = X86_FEMMS; return 0; } +#endif if (insn->opcodeType == T3DNOW_MAP) instructionClass = IC_OF; diff --git a/arch/X86/X86GenAsmWriter1_reduce.inc b/arch/X86/X86GenAsmWriter1_reduce.inc index 94dfd333..2302b80b 100644 --- a/arch/X86/X86GenAsmWriter1_reduce.inc +++ b/arch/X86/X86GenAsmWriter1_reduce.inc @@ -69,8 +69,10 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 8532099U, // ADC64rm 2240643U, // ADC64rr 2232451U, // ADC64rr_REV + 2240643U, // ADC82_8ri8 5384U, // ADC8i8 155779U, // ADC8mi + 155779U, // ADC8mi8 155779U, // ADC8mr 2240643U, // ADC8ri 10629251U, // ADC8rm @@ -116,11 +118,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 2240699U, // ADD64rr 0U, // ADD64rr_DB 2232507U, // ADD64rr_REV + 155835U, // ADD82_8mi8 + 2240699U, // ADD82_8ri8 5393U, // ADD8i8 155835U, // ADD8mi 155835U, // ADD8mr 2240699U, // ADD8ri - 2240699U, // ADD8ri8 10629307U, // ADD8rm 2240699U, // ADD8rr 2232507U, // ADD8rr_REV @@ -159,11 +162,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 8532204U, // AND64rm 2240748U, // AND64rr 2232556U, // AND64rr_REV + 155884U, // AND82_8mi8 + 2240748U, // AND82_8ri8 5402U, // AND8i8 155884U, // AND8mi 155884U, // AND8mr 2240748U, // AND8ri - 2240748U, // AND8ri8 10629356U, // AND8rm 2240748U, // AND8rr 2232556U, // AND8rr_REV @@ -448,8 +452,10 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 16913109U, // CMP64rm 14815957U, // CMP64rr 14815957U, // CMP64rr_REV + 14815957U, // CMP82_8ri8 5419U, // CMP8i8 156373U, // CMP8mi + 156373U, // CMP8mi8 156373U, // CMP8mr 14815957U, // CMP8ri 21107413U, // CMP8rm @@ -993,11 +999,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 8532834U, // OR64rm 2241378U, // OR64rr 2233186U, // OR64rr_REV + 156514U, // OR82_8mi8 + 2241378U, // OR82_8ri8 5429U, // OR8i8 156514U, // OR8mi 156514U, // OR8mr 2241378U, // OR8ri - 2241378U, // OR8ri8 10629986U, // OR8rm 2241378U, // OR8rr 2233186U, // OR8rr_REV @@ -1302,8 +1309,10 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 8532045U, // SBB64rm 2240589U, // SBB64rr 2232397U, // SBB64rr_REV + 2240589U, // SBB82_8ri8 5344U, // SBB8i8 155725U, // SBB8mi + 155725U, // SBB8mi8 155725U, // SBB8mr 2240589U, // SBB8ri 10629197U, // SBB8rm @@ -1495,11 +1504,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 8532087U, // SUB64rm 2240631U, // SUB64rr 2232439U, // SUB64rr_REV + 155767U, // SUB82_8mi8 + 2240631U, // SUB82_8ri8 5375U, // SUB8i8 155767U, // SUB8mi 155767U, // SUB8mr 2240631U, // SUB8ri - 2240631U, // SUB8ri8 10629239U, // SUB8rm 2240631U, // SUB8rr 2232439U, // SUB8rr_REV @@ -1667,11 +1677,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 8532846U, // XOR64rm 2241390U, // XOR64rr 2233198U, // XOR64rr_REV + 156526U, // XOR82_8mi8 + 2241390U, // XOR82_8ri8 5428U, // XOR8i8 156526U, // XOR8mi 156526U, // XOR8mr 2241390U, // XOR8ri - 2241390U, // XOR8ri8 10629998U, // XOR8rm 2241390U, // XOR8rr 2233198U, // XOR8rr_REV @@ -2146,7 +2157,7 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) printi64mem(MI, 0, O); break; case 6: - // ADC8mi, ADC8mr, ADD8mi, ADD8mr, AND8mi, AND8mr, CMP8mi, CMP8mr, CMPXCH... + // ADC8mi, ADC8mi8, ADC8mr, ADD82_8mi8, ADD8mi, ADD8mr, AND82_8mi8, AND8m... printi8mem(MI, 0, O); break; case 7: diff --git a/arch/X86/X86GenAsmWriter_reduce.inc b/arch/X86/X86GenAsmWriter_reduce.inc index 8ca674d6..e344e497 100644 --- a/arch/X86/X86GenAsmWriter_reduce.inc +++ b/arch/X86/X86GenAsmWriter_reduce.inc @@ -69,8 +69,10 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 1623380U, // ADC64rm 1598804U, // ADC64rr 2123092U, // ADC64rr_REV + 1597486U, // ADC82_8ri8 4726830U, // ADC8i8 5259310U, // ADC8mi + 5259310U, // ADC8mi8 5259310U, // ADC8mr 1597486U, // ADC8ri 57390U, // ADC8rm @@ -116,11 +118,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 1598838U, // ADD64rr 0U, // ADD64rr_DB 2123126U, // ADD64rr_REV + 5259329U, // ADD82_8mi8 + 1597505U, // ADD82_8ri8 4726849U, // ADD8i8 5259329U, // ADD8mi 5259329U, // ADD8mr 1597505U, // ADD8ri - 1597505U, // ADD8ri8 57409U, // ADD8rm 1597505U, // ADD8rr 2121793U, // ADD8rr_REV @@ -159,11 +162,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 1623439U, // AND64rm 1598863U, // AND64rr 2123151U, // AND64rr_REV + 5259335U, // AND82_8mi8 + 1597511U, // AND82_8ri8 4726855U, // AND8i8 5259335U, // AND8mi 5259335U, // AND8mr 1597511U, // AND8ri - 1597511U, // AND8ri8 57415U, // AND8rm 1597511U, // AND8rr 2121799U, // AND8rr_REV @@ -448,8 +452,10 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 83630U, // CMP64rm 22619822U, // CMP64rr 22619822U, // CMP64rr_REV + 22618245U, // CMP82_8ri8 4726917U, // CMP8i8 5259397U, // CMP8mi + 5259397U, // CMP8mi8 5259397U, // CMP8mr 22618245U, // CMP8ri 139397U, // CMP8rm @@ -993,11 +999,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 1623780U, // OR64rm 1599204U, // OR64rr 2123492U, // OR64rr_REV + 5259422U, // OR82_8mi8 + 1597598U, // OR82_8ri8 4726942U, // OR8i8 5259422U, // OR8mi 5259422U, // OR8mr 1597598U, // OR8ri - 1597598U, // OR8ri8 57502U, // OR8rm 1597598U, // OR8rr 2121886U, // OR8rr_REV @@ -1302,8 +1309,10 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 1623344U, // SBB64rm 1598768U, // SBB64rr 2123056U, // SBB64rr_REV + 1597474U, // SBB82_8ri8 4726818U, // SBB8i8 5259298U, // SBB8mi + 5259298U, // SBB8mi8 5259298U, // SBB8mr 1597474U, // SBB8ri 57378U, // SBB8rm @@ -1495,11 +1504,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 1623358U, // SUB64rm 1598782U, // SUB64rr 2123070U, // SUB64rr_REV + 5259304U, // SUB82_8mi8 + 1597480U, // SUB82_8ri8 4726824U, // SUB8i8 5259304U, // SUB8mi 5259304U, // SUB8mr 1597480U, // SUB8ri - 1597480U, // SUB8ri8 57384U, // SUB8rm 1597480U, // SUB8rr 2121768U, // SUB8rr_REV @@ -1667,11 +1677,12 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 1623794U, // XOR64rm 1599218U, // XOR64rr 2123506U, // XOR64rr_REV + 5259427U, // XOR82_8mi8 + 1597603U, // XOR82_8ri8 4726947U, // XOR8i8 5259427U, // XOR8mi 5259427U, // XOR8mr 1597603U, // XOR8ri - 1597603U, // XOR8ri8 57507U, // XOR8rm 1597603U, // XOR8rr 2121891U, // XOR8rr_REV @@ -2615,7 +2626,7 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) return; break; case 10: - // ADC8mi, ADC8mr, ADD8mi, ADD8mr, AND8mi, AND8mr, CMP8mi, CMP8mr, CMPXCH... + // ADC8mi, ADC8mi8, ADC8mr, ADD82_8mi8, ADD8mi, ADD8mr, AND82_8mi8, AND8m... printi8mem(MI, 0, O); break; case 11: @@ -3064,7 +3075,6 @@ static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) const char *AsmString; char *tmp, *AsmMnem, *AsmOps, *c; int OpIdx, PrintMethodIdx; - MCRegisterInfo *MRI = (MCRegisterInfo *)info; switch (MCInst_getOpcode(MI)) { default: return NULL; case X86_AAD8i8: diff --git a/arch/X86/X86GenDisassemblerTables_reduce.inc b/arch/X86/X86GenDisassemblerTables_reduce.inc index f1c39163..988b6c2b 100644 --- a/arch/X86/X86GenDisassemblerTables_reduce.inc +++ b/arch/X86/X86GenDisassemblerTables_reduce.inc @@ -1473,25 +1473,25 @@ static const struct OperandSpecifier x86OperandSets[][6] = { { ENCODING_NONE, TYPE_NONE }, }, { /* 22 */ - { ENCODING_RM, TYPE_M8 }, + { ENCODING_DUP, TYPE_DUP1 }, + { ENCODING_RM, TYPE_R8 }, { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, - { ENCODING_NONE, TYPE_NONE }, }, { /* 23 */ { ENCODING_RM, TYPE_M8 }, - { ENCODING_REG, TYPE_R8 }, + { ENCODING_IB, TYPE_IMM8 }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, }, { /* 24 */ - { ENCODING_DUP, TYPE_DUP1 }, - { ENCODING_RM, TYPE_R8 }, - { ENCODING_IB, TYPE_IMM8 }, + { ENCODING_RM, TYPE_M8 }, + { ENCODING_REG, TYPE_R8 }, + { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, { ENCODING_NONE, TYPE_NONE }, @@ -2610,7 +2610,7 @@ static const struct OperandSpecifier x86OperandSets[][6] = { }, }; -static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = { +static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1682] = { { /* 0 */ 0, /* */ @@ -2832,1361 +2832,1361 @@ static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = /* ADC64rr_REV */ }, { /* 55 */ + 22, + /* ADC82_8ri8 */ + }, + { /* 56 */ 1, /* ADC8i8 */ }, - { /* 56 */ - 22, - /* ADC8mi */ - }, { /* 57 */ 23, - /* ADC8mr */ + /* ADC8mi */ }, { /* 58 */ - 24, - /* ADC8ri */ + 23, + /* ADC8mi8 */ }, { /* 59 */ + 24, + /* ADC8mr */ + }, + { /* 60 */ + 22, + /* ADC8ri */ + }, + { /* 61 */ 25, /* ADC8rm */ }, - { /* 60 */ + { /* 62 */ 26, /* ADC8rr */ }, - { /* 61 */ + { /* 63 */ 27, /* ADC8rr_REV */ }, - { /* 62 */ + { /* 64 */ 28, /* ADCX32rm */ }, - { /* 63 */ + { /* 65 */ 29, /* ADCX32rr */ }, - { /* 64 */ + { /* 66 */ 19, /* ADCX64rm */ }, - { /* 65 */ + { /* 67 */ 21, /* ADCX64rr */ }, - { /* 66 */ + { /* 68 */ 2, /* ADD16i16 */ }, - { /* 67 */ + { /* 69 */ 3, /* ADD16mi */ }, - { /* 68 */ + { /* 70 */ 4, /* ADD16mi8 */ }, - { /* 69 */ + { /* 71 */ 5, /* ADD16mr */ }, - { /* 70 */ + { /* 72 */ 6, /* ADD16ri */ }, - { /* 71 */ + { /* 73 */ 7, /* ADD16ri8 */ }, - { /* 72 */ - 0, - /* */ - }, - { /* 73 */ - 0, - /* */ - }, { /* 74 */ + 0, + /* */ + }, + { /* 75 */ + 0, + /* */ + }, + { /* 76 */ 8, /* ADD16rm */ }, - { /* 75 */ + { /* 77 */ 9, /* ADD16rr */ }, - { /* 76 */ + { /* 78 */ 0, /* */ }, - { /* 77 */ + { /* 79 */ 10, /* ADD16rr_REV */ }, - { /* 78 */ + { /* 80 */ 2, /* ADD32i32 */ }, - { /* 79 */ + { /* 81 */ 3, /* ADD32mi */ }, - { /* 80 */ + { /* 82 */ 11, /* ADD32mi8 */ }, - { /* 81 */ + { /* 83 */ 5, /* ADD32mr */ }, - { /* 82 */ + { /* 84 */ 6, /* ADD32ri */ }, - { /* 83 */ + { /* 85 */ 12, /* ADD32ri8 */ }, - { /* 84 */ - 0, - /* */ - }, - { /* 85 */ - 0, - /* */ - }, { /* 86 */ + 0, + /* */ + }, + { /* 87 */ + 0, + /* */ + }, + { /* 88 */ 8, /* ADD32rm */ }, - { /* 87 */ + { /* 89 */ 9, /* ADD32rr */ }, - { /* 88 */ + { /* 90 */ 0, /* */ }, - { /* 89 */ + { /* 91 */ 10, /* ADD32rr_REV */ }, - { /* 90 */ + { /* 92 */ 13, /* ADD64i32 */ }, - { /* 91 */ + { /* 93 */ 14, /* ADD64mi32 */ }, - { /* 92 */ + { /* 94 */ 15, /* ADD64mi8 */ }, - { /* 93 */ + { /* 95 */ 16, /* ADD64mr */ }, - { /* 94 */ + { /* 96 */ 17, /* ADD64ri32 */ }, - { /* 95 */ - 0, - /* */ - }, - { /* 96 */ - 18, - /* ADD64ri8 */ - }, { /* 97 */ 0, /* */ }, { /* 98 */ + 18, + /* ADD64ri8 */ + }, + { /* 99 */ + 0, + /* */ + }, + { /* 100 */ 19, /* ADD64rm */ }, - { /* 99 */ + { /* 101 */ 20, /* ADD64rr */ }, - { /* 100 */ + { /* 102 */ 0, /* */ }, - { /* 101 */ + { /* 103 */ 21, /* ADD64rr_REV */ }, - { /* 102 */ + { /* 104 */ + 23, + /* ADD82_8mi8 */ + }, + { /* 105 */ + 22, + /* ADD82_8ri8 */ + }, + { /* 106 */ 1, /* ADD8i8 */ }, - { /* 103 */ - 22, + { /* 107 */ + 23, /* ADD8mi */ }, - { /* 104 */ - 23, + { /* 108 */ + 24, /* ADD8mr */ }, - { /* 105 */ - 24, + { /* 109 */ + 22, /* ADD8ri */ }, - { /* 106 */ - 24, - /* ADD8ri8 */ - }, - { /* 107 */ + { /* 110 */ 25, /* ADD8rm */ }, - { /* 108 */ + { /* 111 */ 26, /* ADD8rr */ }, - { /* 109 */ + { /* 112 */ 27, /* ADD8rr_REV */ }, - { /* 110 */ - 0, - /* */ - }, - { /* 111 */ - 0, - /* */ - }, - { /* 112 */ - 0, - /* */ - }, { /* 113 */ 0, /* */ }, { /* 114 */ + 0, + /* */ + }, + { /* 115 */ + 0, + /* */ + }, + { /* 116 */ + 0, + /* */ + }, + { /* 117 */ 30, /* ADOX32rm */ }, - { /* 115 */ + { /* 118 */ 31, /* ADOX32rr */ }, - { /* 116 */ + { /* 119 */ 32, /* ADOX64rm */ }, - { /* 117 */ + { /* 120 */ 33, /* ADOX64rr */ }, - { /* 118 */ + { /* 121 */ 2, /* AND16i16 */ }, - { /* 119 */ + { /* 122 */ 3, /* AND16mi */ }, - { /* 120 */ + { /* 123 */ 4, /* AND16mi8 */ }, - { /* 121 */ + { /* 124 */ 5, /* AND16mr */ }, - { /* 122 */ + { /* 125 */ 6, /* AND16ri */ }, - { /* 123 */ + { /* 126 */ 7, /* AND16ri8 */ }, - { /* 124 */ + { /* 127 */ 8, /* AND16rm */ }, - { /* 125 */ + { /* 128 */ 9, /* AND16rr */ }, - { /* 126 */ + { /* 129 */ 10, /* AND16rr_REV */ }, - { /* 127 */ + { /* 130 */ 2, /* AND32i32 */ }, - { /* 128 */ + { /* 131 */ 3, /* AND32mi */ }, - { /* 129 */ + { /* 132 */ 11, /* AND32mi8 */ }, - { /* 130 */ + { /* 133 */ 5, /* AND32mr */ }, - { /* 131 */ + { /* 134 */ 6, /* AND32ri */ }, - { /* 132 */ + { /* 135 */ 12, /* AND32ri8 */ }, - { /* 133 */ + { /* 136 */ 8, /* AND32rm */ }, - { /* 134 */ + { /* 137 */ 9, /* AND32rr */ }, - { /* 135 */ + { /* 138 */ 10, /* AND32rr_REV */ }, - { /* 136 */ + { /* 139 */ 13, /* AND64i32 */ }, - { /* 137 */ + { /* 140 */ 14, /* AND64mi32 */ }, - { /* 138 */ + { /* 141 */ 15, /* AND64mi8 */ }, - { /* 139 */ + { /* 142 */ 16, /* AND64mr */ }, - { /* 140 */ + { /* 143 */ 17, /* AND64ri32 */ }, - { /* 141 */ + { /* 144 */ 18, /* AND64ri8 */ }, - { /* 142 */ + { /* 145 */ 19, /* AND64rm */ }, - { /* 143 */ + { /* 146 */ 20, /* AND64rr */ }, - { /* 144 */ + { /* 147 */ 21, /* AND64rr_REV */ }, - { /* 145 */ + { /* 148 */ + 23, + /* AND82_8mi8 */ + }, + { /* 149 */ + 22, + /* AND82_8ri8 */ + }, + { /* 150 */ 1, /* AND8i8 */ }, - { /* 146 */ - 22, + { /* 151 */ + 23, /* AND8mi */ }, - { /* 147 */ - 23, + { /* 152 */ + 24, /* AND8mr */ }, - { /* 148 */ - 24, + { /* 153 */ + 22, /* AND8ri */ }, - { /* 149 */ - 24, - /* AND8ri8 */ - }, - { /* 150 */ + { /* 154 */ 25, /* AND8rm */ }, - { /* 151 */ + { /* 155 */ 26, /* AND8rr */ }, - { /* 152 */ + { /* 156 */ 27, /* AND8rr_REV */ }, - { /* 153 */ + { /* 157 */ 34, /* ANDN32rm */ }, - { /* 154 */ + { /* 158 */ 35, /* ANDN32rr */ }, - { /* 155 */ + { /* 159 */ 36, /* ANDN64rm */ }, - { /* 156 */ + { /* 160 */ 37, /* ANDN64rr */ }, - { /* 157 */ + { /* 161 */ 38, /* ARPL16mr */ }, - { /* 158 */ + { /* 162 */ 39, /* ARPL16rr */ }, - { /* 159 */ + { /* 163 */ 40, /* BEXTR32rm */ }, - { /* 160 */ + { /* 164 */ 41, /* BEXTR32rr */ }, - { /* 161 */ + { /* 165 */ 42, /* BEXTR64rm */ }, - { /* 162 */ + { /* 166 */ 43, /* BEXTR64rr */ }, - { /* 163 */ + { /* 167 */ 44, /* BEXTRI32mi */ }, - { /* 164 */ + { /* 168 */ 45, /* BEXTRI32ri */ }, - { /* 165 */ + { /* 169 */ 46, /* BEXTRI64mi */ }, - { /* 166 */ + { /* 170 */ 47, /* BEXTRI64ri */ }, - { /* 167 */ + { /* 171 */ 48, /* BLCFILL32rm */ }, - { /* 168 */ + { /* 172 */ 49, /* BLCFILL32rr */ }, - { /* 169 */ + { /* 173 */ 50, /* BLCFILL64rm */ }, - { /* 170 */ + { /* 174 */ 51, /* BLCFILL64rr */ }, - { /* 171 */ + { /* 175 */ 48, /* BLCI32rm */ }, - { /* 172 */ + { /* 176 */ 49, /* BLCI32rr */ }, - { /* 173 */ + { /* 177 */ 50, /* BLCI64rm */ }, - { /* 174 */ + { /* 178 */ 51, /* BLCI64rr */ }, - { /* 175 */ + { /* 179 */ 48, /* BLCIC32rm */ }, - { /* 176 */ + { /* 180 */ 49, /* BLCIC32rr */ }, - { /* 177 */ + { /* 181 */ 50, /* BLCIC64rm */ }, - { /* 178 */ + { /* 182 */ 51, /* BLCIC64rr */ }, - { /* 179 */ + { /* 183 */ 48, /* BLCMSK32rm */ }, - { /* 180 */ + { /* 184 */ 49, /* BLCMSK32rr */ }, - { /* 181 */ + { /* 185 */ 50, /* BLCMSK64rm */ }, - { /* 182 */ + { /* 186 */ 51, /* BLCMSK64rr */ }, - { /* 183 */ + { /* 187 */ 48, /* BLCS32rm */ }, - { /* 184 */ + { /* 188 */ 49, /* BLCS32rr */ }, - { /* 185 */ + { /* 189 */ 50, /* BLCS64rm */ }, - { /* 186 */ + { /* 190 */ 51, /* BLCS64rr */ }, - { /* 187 */ + { /* 191 */ 48, /* BLSFILL32rm */ }, - { /* 188 */ + { /* 192 */ 49, /* BLSFILL32rr */ }, - { /* 189 */ + { /* 193 */ 50, /* BLSFILL64rm */ }, - { /* 190 */ + { /* 194 */ 51, /* BLSFILL64rr */ }, - { /* 191 */ + { /* 195 */ 48, /* BLSI32rm */ }, - { /* 192 */ + { /* 196 */ 49, /* BLSI32rr */ }, - { /* 193 */ + { /* 197 */ 50, /* BLSI64rm */ }, - { /* 194 */ + { /* 198 */ 51, /* BLSI64rr */ }, - { /* 195 */ + { /* 199 */ 48, /* BLSIC32rm */ }, - { /* 196 */ + { /* 200 */ 49, /* BLSIC32rr */ }, - { /* 197 */ + { /* 201 */ 50, /* BLSIC64rm */ }, - { /* 198 */ + { /* 202 */ 51, /* BLSIC64rr */ }, - { /* 199 */ + { /* 203 */ 48, /* BLSMSK32rm */ }, - { /* 200 */ + { /* 204 */ 49, /* BLSMSK32rr */ }, - { /* 201 */ + { /* 205 */ 50, /* BLSMSK64rm */ }, - { /* 202 */ + { /* 206 */ 51, /* BLSMSK64rr */ }, - { /* 203 */ + { /* 207 */ 48, /* BLSR32rm */ }, - { /* 204 */ + { /* 208 */ 49, /* BLSR32rr */ }, - { /* 205 */ + { /* 209 */ 50, /* BLSR64rm */ }, - { /* 206 */ + { /* 210 */ 51, /* BLSR64rr */ }, - { /* 207 */ + { /* 211 */ 52, /* BOUNDS16rm */ }, - { /* 208 */ + { /* 212 */ 52, /* BOUNDS32rm */ }, - { /* 209 */ + { /* 213 */ 52, /* BSF16rm */ }, - { /* 210 */ + { /* 214 */ 53, /* BSF16rr */ }, - { /* 211 */ + { /* 215 */ 52, /* BSF32rm */ }, - { /* 212 */ + { /* 216 */ 53, /* BSF32rr */ }, - { /* 213 */ + { /* 217 */ 32, /* BSF64rm */ }, - { /* 214 */ + { /* 218 */ 33, /* BSF64rr */ }, - { /* 215 */ + { /* 219 */ 52, /* BSR16rm */ }, - { /* 216 */ + { /* 220 */ 53, /* BSR16rr */ }, - { /* 217 */ + { /* 221 */ 52, /* BSR32rm */ }, - { /* 218 */ + { /* 222 */ 53, /* BSR32rr */ }, - { /* 219 */ + { /* 223 */ 32, /* BSR64rm */ }, - { /* 220 */ + { /* 224 */ 33, /* BSR64rr */ }, - { /* 221 */ + { /* 225 */ 54, /* BSWAP32r */ }, - { /* 222 */ + { /* 226 */ 55, /* BSWAP64r */ }, - { /* 223 */ + { /* 227 */ 4, /* BT16mi8 */ }, - { /* 224 */ + { /* 228 */ 5, /* BT16mr */ }, - { /* 225 */ + { /* 229 */ 56, /* BT16ri8 */ }, - { /* 226 */ + { /* 230 */ 57, /* BT16rr */ }, - { /* 227 */ + { /* 231 */ 11, /* BT32mi8 */ }, - { /* 228 */ + { /* 232 */ 5, /* BT32mr */ }, - { /* 229 */ + { /* 233 */ 58, /* BT32ri8 */ }, - { /* 230 */ + { /* 234 */ 57, /* BT32rr */ }, - { /* 231 */ + { /* 235 */ 15, /* BT64mi8 */ }, - { /* 232 */ + { /* 236 */ 16, /* BT64mr */ }, - { /* 233 */ + { /* 237 */ 59, /* BT64ri8 */ }, - { /* 234 */ + { /* 238 */ 60, /* BT64rr */ }, - { /* 235 */ + { /* 239 */ 4, /* BTC16mi8 */ }, - { /* 236 */ + { /* 240 */ 5, /* BTC16mr */ }, - { /* 237 */ + { /* 241 */ 56, /* BTC16ri8 */ }, - { /* 238 */ + { /* 242 */ 57, /* BTC16rr */ }, - { /* 239 */ + { /* 243 */ 11, /* BTC32mi8 */ }, - { /* 240 */ + { /* 244 */ 5, /* BTC32mr */ }, - { /* 241 */ + { /* 245 */ 58, /* BTC32ri8 */ }, - { /* 242 */ + { /* 246 */ 57, /* BTC32rr */ }, - { /* 243 */ + { /* 247 */ 15, /* BTC64mi8 */ }, - { /* 244 */ + { /* 248 */ 16, /* BTC64mr */ }, - { /* 245 */ + { /* 249 */ 59, /* BTC64ri8 */ }, - { /* 246 */ + { /* 250 */ 60, /* BTC64rr */ }, - { /* 247 */ + { /* 251 */ 4, /* BTR16mi8 */ }, - { /* 248 */ + { /* 252 */ 5, /* BTR16mr */ }, - { /* 249 */ + { /* 253 */ 56, /* BTR16ri8 */ }, - { /* 250 */ + { /* 254 */ 57, /* BTR16rr */ }, - { /* 251 */ + { /* 255 */ 11, /* BTR32mi8 */ }, - { /* 252 */ + { /* 256 */ 5, /* BTR32mr */ }, - { /* 253 */ + { /* 257 */ 58, /* BTR32ri8 */ }, - { /* 254 */ + { /* 258 */ 57, /* BTR32rr */ }, - { /* 255 */ + { /* 259 */ 15, /* BTR64mi8 */ }, - { /* 256 */ + { /* 260 */ 16, /* BTR64mr */ }, - { /* 257 */ + { /* 261 */ 59, /* BTR64ri8 */ }, - { /* 258 */ + { /* 262 */ 60, /* BTR64rr */ }, - { /* 259 */ + { /* 263 */ 4, /* BTS16mi8 */ }, - { /* 260 */ + { /* 264 */ 5, /* BTS16mr */ }, - { /* 261 */ + { /* 265 */ 56, /* BTS16ri8 */ }, - { /* 262 */ + { /* 266 */ 57, /* BTS16rr */ }, - { /* 263 */ + { /* 267 */ 11, /* BTS32mi8 */ }, - { /* 264 */ + { /* 268 */ 5, /* BTS32mr */ }, - { /* 265 */ + { /* 269 */ 58, /* BTS32ri8 */ }, - { /* 266 */ + { /* 270 */ 57, /* BTS32rr */ }, - { /* 267 */ + { /* 271 */ 15, /* BTS64mi8 */ }, - { /* 268 */ + { /* 272 */ 16, /* BTS64mr */ }, - { /* 269 */ + { /* 273 */ 59, /* BTS64ri8 */ }, - { /* 270 */ + { /* 274 */ 60, /* BTS64rr */ }, - { /* 271 */ + { /* 275 */ 40, /* BZHI32rm */ }, - { /* 272 */ + { /* 276 */ 41, /* BZHI32rr */ }, - { /* 273 */ + { /* 277 */ 42, /* BZHI64rm */ }, - { /* 274 */ + { /* 278 */ 43, /* BZHI64rr */ }, - { /* 275 */ + { /* 279 */ 61, /* CALL16m */ }, - { /* 276 */ + { /* 280 */ 62, /* CALL16r */ }, - { /* 277 */ + { /* 281 */ 61, /* CALL32m */ }, - { /* 278 */ + { /* 282 */ 62, /* CALL32r */ }, - { /* 279 */ + { /* 283 */ 61, /* CALL64m */ }, - { /* 280 */ + { /* 284 */ 63, /* CALL64pcrel32 */ }, - { /* 281 */ + { /* 285 */ 64, /* CALL64r */ }, - { /* 282 */ + { /* 286 */ 65, /* CALLpcrel16 */ }, - { /* 283 */ + { /* 287 */ 66, /* CALLpcrel32 */ }, - { /* 284 */ + { /* 288 */ 0, /* CBW */ }, - { /* 285 */ + { /* 289 */ 0, /* CDQ */ }, - { /* 286 */ + { /* 290 */ 0, /* CDQE */ }, - { /* 287 */ + { /* 291 */ 0, /* CLAC */ }, - { /* 288 */ + { /* 292 */ 0, /* CLC */ }, - { /* 289 */ + { /* 293 */ 0, /* CLD */ }, - { /* 290 */ + { /* 294 */ 0, /* CLGI */ }, - { /* 291 */ + { /* 295 */ 0, /* CLI */ }, - { /* 292 */ + { /* 296 */ 0, /* CLTS */ }, - { /* 293 */ + { /* 297 */ 0, /* CMC */ }, - { /* 294 */ + { /* 298 */ 8, /* CMOVA16rm */ }, - { /* 295 */ + { /* 299 */ 10, /* CMOVA16rr */ }, - { /* 296 */ + { /* 300 */ 8, /* CMOVA32rm */ }, - { /* 297 */ + { /* 301 */ 10, /* CMOVA32rr */ }, - { /* 298 */ + { /* 302 */ 19, /* CMOVA64rm */ }, - { /* 299 */ + { /* 303 */ 21, /* CMOVA64rr */ }, - { /* 300 */ + { /* 304 */ 8, /* CMOVAE16rm */ }, - { /* 301 */ + { /* 305 */ 10, /* CMOVAE16rr */ }, - { /* 302 */ + { /* 306 */ 8, /* CMOVAE32rm */ }, - { /* 303 */ + { /* 307 */ 10, /* CMOVAE32rr */ }, - { /* 304 */ + { /* 308 */ 19, /* CMOVAE64rm */ }, - { /* 305 */ + { /* 309 */ 21, /* CMOVAE64rr */ }, - { /* 306 */ + { /* 310 */ 8, /* CMOVB16rm */ }, - { /* 307 */ + { /* 311 */ 10, /* CMOVB16rr */ }, - { /* 308 */ + { /* 312 */ 8, /* CMOVB32rm */ }, - { /* 309 */ + { /* 313 */ 10, /* CMOVB32rr */ }, - { /* 310 */ + { /* 314 */ 19, /* CMOVB64rm */ }, - { /* 311 */ + { /* 315 */ 21, /* CMOVB64rr */ }, - { /* 312 */ + { /* 316 */ 8, /* CMOVBE16rm */ }, - { /* 313 */ + { /* 317 */ 10, /* CMOVBE16rr */ }, - { /* 314 */ + { /* 318 */ 8, /* CMOVBE32rm */ }, - { /* 315 */ + { /* 319 */ 10, /* CMOVBE32rr */ }, - { /* 316 */ + { /* 320 */ 19, /* CMOVBE64rm */ }, - { /* 317 */ + { /* 321 */ 21, /* CMOVBE64rr */ }, - { /* 318 */ + { /* 322 */ 8, /* CMOVE16rm */ }, - { /* 319 */ + { /* 323 */ 10, /* CMOVE16rr */ }, - { /* 320 */ + { /* 324 */ 8, /* CMOVE32rm */ }, - { /* 321 */ + { /* 325 */ 10, /* CMOVE32rr */ }, - { /* 322 */ + { /* 326 */ 19, /* CMOVE64rm */ }, - { /* 323 */ + { /* 327 */ 21, /* CMOVE64rr */ }, - { /* 324 */ + { /* 328 */ 8, /* CMOVG16rm */ }, - { /* 325 */ + { /* 329 */ 10, /* CMOVG16rr */ }, - { /* 326 */ + { /* 330 */ 8, /* CMOVG32rm */ }, - { /* 327 */ + { /* 331 */ 10, /* CMOVG32rr */ }, - { /* 328 */ + { /* 332 */ 19, /* CMOVG64rm */ }, - { /* 329 */ + { /* 333 */ 21, /* CMOVG64rr */ }, - { /* 330 */ + { /* 334 */ 8, /* CMOVGE16rm */ }, - { /* 331 */ + { /* 335 */ 10, /* CMOVGE16rr */ }, - { /* 332 */ + { /* 336 */ 8, /* CMOVGE32rm */ }, - { /* 333 */ + { /* 337 */ 10, /* CMOVGE32rr */ }, - { /* 334 */ + { /* 338 */ 19, /* CMOVGE64rm */ }, - { /* 335 */ + { /* 339 */ 21, /* CMOVGE64rr */ }, - { /* 336 */ + { /* 340 */ 8, /* CMOVL16rm */ }, - { /* 337 */ + { /* 341 */ 10, /* CMOVL16rr */ }, - { /* 338 */ + { /* 342 */ 8, /* CMOVL32rm */ }, - { /* 339 */ + { /* 343 */ 10, /* CMOVL32rr */ }, - { /* 340 */ + { /* 344 */ 19, /* CMOVL64rm */ }, - { /* 341 */ + { /* 345 */ 21, /* CMOVL64rr */ }, - { /* 342 */ + { /* 346 */ 8, /* CMOVLE16rm */ }, - { /* 343 */ + { /* 347 */ 10, /* CMOVLE16rr */ }, - { /* 344 */ + { /* 348 */ 8, /* CMOVLE32rm */ }, - { /* 345 */ + { /* 349 */ 10, /* CMOVLE32rr */ }, - { /* 346 */ + { /* 350 */ 19, /* CMOVLE64rm */ }, - { /* 347 */ + { /* 351 */ 21, /* CMOVLE64rr */ }, - { /* 348 */ + { /* 352 */ 8, /* CMOVNE16rm */ }, - { /* 349 */ + { /* 353 */ 10, /* CMOVNE16rr */ }, - { /* 350 */ + { /* 354 */ 8, /* CMOVNE32rm */ }, - { /* 351 */ + { /* 355 */ 10, /* CMOVNE32rr */ }, - { /* 352 */ + { /* 356 */ 19, /* CMOVNE64rm */ }, - { /* 353 */ + { /* 357 */ 21, /* CMOVNE64rr */ }, - { /* 354 */ + { /* 358 */ 8, /* CMOVNO16rm */ }, - { /* 355 */ + { /* 359 */ 10, /* CMOVNO16rr */ }, - { /* 356 */ + { /* 360 */ 8, /* CMOVNO32rm */ }, - { /* 357 */ + { /* 361 */ 10, /* CMOVNO32rr */ }, - { /* 358 */ + { /* 362 */ 19, /* CMOVNO64rm */ }, - { /* 359 */ + { /* 363 */ 21, /* CMOVNO64rr */ }, - { /* 360 */ + { /* 364 */ 8, /* CMOVNP16rm */ }, - { /* 361 */ + { /* 365 */ 10, /* CMOVNP16rr */ }, - { /* 362 */ + { /* 366 */ 8, /* CMOVNP32rm */ }, - { /* 363 */ + { /* 367 */ 10, /* CMOVNP32rr */ }, - { /* 364 */ + { /* 368 */ 19, /* CMOVNP64rm */ }, - { /* 365 */ + { /* 369 */ 21, /* CMOVNP64rr */ }, - { /* 366 */ + { /* 370 */ 8, /* CMOVNS16rm */ }, - { /* 367 */ + { /* 371 */ 10, /* CMOVNS16rr */ }, - { /* 368 */ + { /* 372 */ 8, /* CMOVNS32rm */ }, - { /* 369 */ + { /* 373 */ 10, /* CMOVNS32rr */ }, - { /* 370 */ + { /* 374 */ 19, /* CMOVNS64rm */ }, - { /* 371 */ + { /* 375 */ 21, /* CMOVNS64rr */ }, - { /* 372 */ + { /* 376 */ 8, /* CMOVO16rm */ }, - { /* 373 */ + { /* 377 */ 10, /* CMOVO16rr */ }, - { /* 374 */ + { /* 378 */ 8, /* CMOVO32rm */ }, - { /* 375 */ + { /* 379 */ 10, /* CMOVO32rr */ }, - { /* 376 */ + { /* 380 */ 19, /* CMOVO64rm */ }, - { /* 377 */ + { /* 381 */ 21, /* CMOVO64rr */ }, - { /* 378 */ + { /* 382 */ 8, /* CMOVP16rm */ }, - { /* 379 */ + { /* 383 */ 10, /* CMOVP16rr */ }, - { /* 380 */ + { /* 384 */ 8, /* CMOVP32rm */ }, - { /* 381 */ + { /* 385 */ 10, /* CMOVP32rr */ }, - { /* 382 */ + { /* 386 */ 19, /* CMOVP64rm */ }, - { /* 383 */ + { /* 387 */ 21, /* CMOVP64rr */ }, - { /* 384 */ + { /* 388 */ 8, /* CMOVS16rm */ }, - { /* 385 */ + { /* 389 */ 10, /* CMOVS16rr */ }, - { /* 386 */ + { /* 390 */ 8, /* CMOVS32rm */ }, - { /* 387 */ + { /* 391 */ 10, /* CMOVS32rr */ }, - { /* 388 */ + { /* 392 */ 19, /* CMOVS64rm */ }, - { /* 389 */ + { /* 393 */ 21, /* CMOVS64rr */ }, - { /* 390 */ - 0, - /* */ - }, - { /* 391 */ - 0, - /* */ - }, - { /* 392 */ - 0, - /* */ - }, - { /* 393 */ - 0, - /* */ - }, { /* 394 */ 0, /* */ @@ -4240,1125 +4240,1125 @@ static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = /* */ }, { /* 407 */ + 0, + /* */ + }, + { /* 408 */ + 0, + /* */ + }, + { /* 409 */ + 0, + /* */ + }, + { /* 410 */ + 0, + /* */ + }, + { /* 411 */ 2, /* CMP16i16 */ }, - { /* 408 */ + { /* 412 */ 3, /* CMP16mi */ }, - { /* 409 */ + { /* 413 */ 4, /* CMP16mi8 */ }, - { /* 410 */ + { /* 414 */ 5, /* CMP16mr */ }, - { /* 411 */ + { /* 415 */ 67, /* CMP16ri */ }, - { /* 412 */ + { /* 416 */ 56, /* CMP16ri8 */ }, - { /* 413 */ + { /* 417 */ 52, /* CMP16rm */ }, - { /* 414 */ + { /* 418 */ 57, /* CMP16rr */ }, - { /* 415 */ + { /* 419 */ 53, /* CMP16rr_REV */ }, - { /* 416 */ + { /* 420 */ 2, /* CMP32i32 */ }, - { /* 417 */ + { /* 421 */ 3, /* CMP32mi */ }, - { /* 418 */ + { /* 422 */ 11, /* CMP32mi8 */ }, - { /* 419 */ + { /* 423 */ 5, /* CMP32mr */ }, - { /* 420 */ + { /* 424 */ 67, /* CMP32ri */ }, - { /* 421 */ + { /* 425 */ 58, /* CMP32ri8 */ }, - { /* 422 */ + { /* 426 */ 52, /* CMP32rm */ }, - { /* 423 */ + { /* 427 */ 57, /* CMP32rr */ }, - { /* 424 */ + { /* 428 */ 53, /* CMP32rr_REV */ }, - { /* 425 */ + { /* 429 */ 13, /* CMP64i32 */ }, - { /* 426 */ + { /* 430 */ 14, /* CMP64mi32 */ }, - { /* 427 */ + { /* 431 */ 15, /* CMP64mi8 */ }, - { /* 428 */ + { /* 432 */ 16, /* CMP64mr */ }, - { /* 429 */ + { /* 433 */ 68, /* CMP64ri32 */ }, - { /* 430 */ + { /* 434 */ 59, /* CMP64ri8 */ }, - { /* 431 */ + { /* 435 */ 32, /* CMP64rm */ }, - { /* 432 */ + { /* 436 */ 60, /* CMP64rr */ }, - { /* 433 */ + { /* 437 */ 33, /* CMP64rr_REV */ }, - { /* 434 */ + { /* 438 */ + 69, + /* CMP82_8ri8 */ + }, + { /* 439 */ 1, /* CMP8i8 */ }, - { /* 435 */ - 22, + { /* 440 */ + 23, /* CMP8mi */ }, - { /* 436 */ + { /* 441 */ 23, + /* CMP8mi8 */ + }, + { /* 442 */ + 24, /* CMP8mr */ }, - { /* 437 */ + { /* 443 */ 69, /* CMP8ri */ }, - { /* 438 */ + { /* 444 */ 70, /* CMP8rm */ }, - { /* 439 */ + { /* 445 */ 71, /* CMP8rr */ }, - { /* 440 */ + { /* 446 */ 72, /* CMP8rr_REV */ }, - { /* 441 */ + { /* 447 */ 73, /* CMPSB */ }, - { /* 442 */ + { /* 448 */ 74, /* CMPSL */ }, - { /* 443 */ + { /* 449 */ 75, /* CMPSQ */ }, - { /* 444 */ + { /* 450 */ 76, /* CMPSW */ }, - { /* 445 */ + { /* 451 */ 77, /* CMPXCHG16B */ }, - { /* 446 */ + { /* 452 */ 5, /* CMPXCHG16rm */ }, - { /* 447 */ + { /* 453 */ 57, /* CMPXCHG16rr */ }, - { /* 448 */ + { /* 454 */ 5, /* CMPXCHG32rm */ }, - { /* 449 */ + { /* 455 */ 57, /* CMPXCHG32rr */ }, - { /* 450 */ + { /* 456 */ 16, /* CMPXCHG64rm */ }, - { /* 451 */ + { /* 457 */ 60, /* CMPXCHG64rr */ }, - { /* 452 */ + { /* 458 */ 61, /* CMPXCHG8B */ }, - { /* 453 */ - 23, + { /* 459 */ + 24, /* CMPXCHG8rm */ }, - { /* 454 */ + { /* 460 */ 71, /* CMPXCHG8rr */ }, - { /* 455 */ + { /* 461 */ 0, /* CPUID32 */ }, - { /* 456 */ + { /* 462 */ 0, /* CPUID64 */ }, - { /* 457 */ + { /* 463 */ 0, /* CQO */ }, - { /* 458 */ + { /* 464 */ 0, /* CWD */ }, - { /* 459 */ + { /* 465 */ 0, /* CWDE */ }, - { /* 460 */ + { /* 466 */ 0, /* DAA */ }, - { /* 461 */ + { /* 467 */ 0, /* DAS */ }, - { /* 462 */ + { /* 468 */ 0, /* DATA16_PREFIX */ }, - { /* 463 */ + { /* 469 */ 61, /* DEC16m */ }, - { /* 464 */ + { /* 470 */ 54, /* DEC16r */ }, - { /* 465 */ + { /* 471 */ 78, /* DEC32_16r */ }, - { /* 466 */ + { /* 472 */ 78, /* DEC32_32r */ }, - { /* 467 */ + { /* 473 */ 61, /* DEC32m */ }, - { /* 468 */ + { /* 474 */ 54, /* DEC32r */ }, - { /* 469 */ + { /* 475 */ 61, /* DEC64_16m */ }, - { /* 470 */ + { /* 476 */ 78, /* DEC64_16r */ }, - { /* 471 */ + { /* 477 */ 61, /* DEC64_32m */ }, - { /* 472 */ + { /* 478 */ 78, /* DEC64_32r */ }, - { /* 473 */ + { /* 479 */ 61, /* DEC64m */ }, - { /* 474 */ + { /* 480 */ 79, /* DEC64r */ }, - { /* 475 */ + { /* 481 */ 80, /* DEC8m */ }, - { /* 476 */ + { /* 482 */ 81, /* DEC8r */ }, - { /* 477 */ + { /* 483 */ 61, /* DIV16m */ }, - { /* 478 */ + { /* 484 */ 62, /* DIV16r */ }, - { /* 479 */ + { /* 485 */ 61, /* DIV32m */ }, - { /* 480 */ + { /* 486 */ 62, /* DIV32r */ }, - { /* 481 */ + { /* 487 */ 61, /* DIV64m */ }, - { /* 482 */ + { /* 488 */ 64, /* DIV64r */ }, - { /* 483 */ + { /* 489 */ 80, /* DIV8m */ }, - { /* 484 */ + { /* 490 */ 82, /* DIV8r */ }, - { /* 485 */ - 0, - /* */ - }, - { /* 486 */ - 0, - /* */ - }, - { /* 487 */ - 0, - /* */ - }, - { /* 488 */ - 0, - /* */ - }, - { /* 489 */ - 0, - /* */ - }, - { /* 490 */ - 0, - /* */ - }, { /* 491 */ 0, /* */ }, { /* 492 */ + 0, + /* */ + }, + { /* 493 */ + 0, + /* */ + }, + { /* 494 */ + 0, + /* */ + }, + { /* 495 */ + 0, + /* */ + }, + { /* 496 */ + 0, + /* */ + }, + { /* 497 */ + 0, + /* */ + }, + { /* 498 */ 83, /* ENTER */ }, - { /* 493 */ + { /* 499 */ 84, /* FARCALL16i */ }, - { /* 494 */ + { /* 500 */ 85, /* FARCALL16m */ }, - { /* 495 */ + { /* 501 */ 86, /* FARCALL32i */ }, - { /* 496 */ + { /* 502 */ 87, /* FARCALL32m */ }, - { /* 497 */ + { /* 503 */ 88, /* FARCALL64 */ }, - { /* 498 */ + { /* 504 */ 84, /* FARJMP16i */ }, - { /* 499 */ + { /* 505 */ 85, /* FARJMP16m */ }, - { /* 500 */ + { /* 506 */ 86, /* FARJMP32i */ }, - { /* 501 */ + { /* 507 */ 87, /* FARJMP32m */ }, - { /* 502 */ + { /* 508 */ 88, /* FARJMP64 */ }, - { /* 503 */ + { /* 509 */ 0, /* FSETPM */ }, - { /* 504 */ + { /* 510 */ 0, /* GETSEC */ }, - { /* 505 */ + { /* 511 */ 0, /* HLT */ }, - { /* 506 */ + { /* 512 */ 61, /* IDIV16m */ }, - { /* 507 */ + { /* 513 */ 62, /* IDIV16r */ }, - { /* 508 */ + { /* 514 */ 61, /* IDIV32m */ }, - { /* 509 */ + { /* 515 */ 62, /* IDIV32r */ }, - { /* 510 */ + { /* 516 */ 61, /* IDIV64m */ }, - { /* 511 */ + { /* 517 */ 64, /* IDIV64r */ }, - { /* 512 */ + { /* 518 */ 80, /* IDIV8m */ }, - { /* 513 */ + { /* 519 */ 82, /* IDIV8r */ }, - { /* 514 */ + { /* 520 */ 61, /* IMUL16m */ }, - { /* 515 */ + { /* 521 */ 62, /* IMUL16r */ }, - { /* 516 */ + { /* 522 */ 8, /* IMUL16rm */ }, - { /* 517 */ + { /* 523 */ 89, /* IMUL16rmi */ }, - { /* 518 */ + { /* 524 */ 90, /* IMUL16rmi8 */ }, - { /* 519 */ + { /* 525 */ 10, /* IMUL16rr */ }, - { /* 520 */ + { /* 526 */ 91, /* IMUL16rri */ }, - { /* 521 */ + { /* 527 */ 92, /* IMUL16rri8 */ }, - { /* 522 */ + { /* 528 */ 61, /* IMUL32m */ }, - { /* 523 */ + { /* 529 */ 62, /* IMUL32r */ }, - { /* 524 */ + { /* 530 */ 8, /* IMUL32rm */ }, - { /* 525 */ + { /* 531 */ 89, /* IMUL32rmi */ }, - { /* 526 */ + { /* 532 */ 93, /* IMUL32rmi8 */ }, - { /* 527 */ + { /* 533 */ 10, /* IMUL32rr */ }, - { /* 528 */ + { /* 534 */ 91, /* IMUL32rri */ }, - { /* 529 */ + { /* 535 */ 94, /* IMUL32rri8 */ }, - { /* 530 */ + { /* 536 */ 61, /* IMUL64m */ }, - { /* 531 */ + { /* 537 */ 64, /* IMUL64r */ }, - { /* 532 */ + { /* 538 */ 19, /* IMUL64rm */ }, - { /* 533 */ + { /* 539 */ 46, /* IMUL64rmi32 */ }, - { /* 534 */ + { /* 540 */ 95, /* IMUL64rmi8 */ }, - { /* 535 */ + { /* 541 */ 21, /* IMUL64rr */ }, - { /* 536 */ + { /* 542 */ 47, /* IMUL64rri32 */ }, - { /* 537 */ + { /* 543 */ 96, /* IMUL64rri8 */ }, - { /* 538 */ + { /* 544 */ 80, /* IMUL8m */ }, - { /* 539 */ + { /* 545 */ 82, /* IMUL8r */ }, - { /* 540 */ + { /* 546 */ 1, /* IN16ri */ }, - { /* 541 */ + { /* 547 */ 0, /* IN16rr */ }, - { /* 542 */ + { /* 548 */ 1, /* IN32ri */ }, - { /* 543 */ + { /* 549 */ 0, /* IN32rr */ }, - { /* 544 */ + { /* 550 */ 1, /* IN8ri */ }, - { /* 545 */ + { /* 551 */ 0, /* IN8rr */ }, - { /* 546 */ + { /* 552 */ 61, /* INC16m */ }, - { /* 547 */ + { /* 553 */ 54, /* INC16r */ }, - { /* 548 */ + { /* 554 */ 78, /* INC32_16r */ }, - { /* 549 */ + { /* 555 */ 78, /* INC32_32r */ }, - { /* 550 */ + { /* 556 */ 61, /* INC32m */ }, - { /* 551 */ + { /* 557 */ 54, /* INC32r */ }, - { /* 552 */ + { /* 558 */ 61, /* INC64_16m */ }, - { /* 553 */ + { /* 559 */ 78, /* INC64_16r */ }, - { /* 554 */ + { /* 560 */ 61, /* INC64_32m */ }, - { /* 555 */ + { /* 561 */ 78, /* INC64_32r */ }, - { /* 556 */ + { /* 562 */ 61, /* INC64m */ }, - { /* 557 */ + { /* 563 */ 79, /* INC64r */ }, - { /* 558 */ + { /* 564 */ 80, /* INC8m */ }, - { /* 559 */ + { /* 565 */ 81, /* INC8r */ }, - { /* 560 */ + { /* 566 */ 97, /* INSB */ }, - { /* 561 */ + { /* 567 */ 98, /* INSL */ }, - { /* 562 */ + { /* 568 */ 99, /* INSW */ }, - { /* 563 */ + { /* 569 */ 1, /* INT */ }, - { /* 564 */ + { /* 570 */ 0, /* INT1 */ }, - { /* 565 */ + { /* 571 */ 0, /* INT3 */ }, - { /* 566 */ + { /* 572 */ 0, /* INTO */ }, - { /* 567 */ + { /* 573 */ 0, /* INVD */ }, - { /* 568 */ + { /* 574 */ 100, /* INVEPT32 */ }, - { /* 569 */ + { /* 575 */ 101, /* INVEPT64 */ }, - { /* 570 */ + { /* 576 */ 80, /* INVLPG */ }, - { /* 571 */ + { /* 577 */ 0, /* INVLPGA32 */ }, - { /* 572 */ + { /* 578 */ 0, /* INVLPGA64 */ }, - { /* 573 */ + { /* 579 */ 100, /* INVPCID32 */ }, - { /* 574 */ + { /* 580 */ 101, /* INVPCID64 */ }, - { /* 575 */ + { /* 581 */ 100, /* INVVPID32 */ }, - { /* 576 */ + { /* 582 */ 101, /* INVVPID64 */ }, - { /* 577 */ + { /* 583 */ 0, /* IRET16 */ }, - { /* 578 */ + { /* 584 */ 0, /* IRET32 */ }, - { /* 579 */ + { /* 585 */ 0, /* IRET64 */ }, - { /* 580 */ + { /* 586 */ 0, /* */ }, - { /* 581 */ - 102, - /* JAE_1 */ - }, - { /* 582 */ - 103, - /* JAE_2 */ - }, - { /* 583 */ - 103, - /* JAE_4 */ - }, - { /* 584 */ - 102, - /* JA_1 */ - }, - { /* 585 */ - 103, - /* JA_2 */ - }, - { /* 586 */ - 103, - /* JA_4 */ - }, { /* 587 */ 102, - /* JBE_1 */ + /* JAE_1 */ }, { /* 588 */ 103, - /* JBE_2 */ + /* JAE_2 */ }, { /* 589 */ 103, - /* JBE_4 */ + /* JAE_4 */ }, { /* 590 */ 102, - /* JB_1 */ + /* JA_1 */ }, { /* 591 */ 103, - /* JB_2 */ + /* JA_2 */ }, { /* 592 */ 103, - /* JB_4 */ + /* JA_4 */ }, { /* 593 */ 102, - /* JCXZ */ + /* JBE_1 */ }, { /* 594 */ - 102, - /* JECXZ_32 */ + 103, + /* JBE_2 */ }, { /* 595 */ - 102, - /* JECXZ_64 */ + 103, + /* JBE_4 */ }, { /* 596 */ 102, - /* JE_1 */ + /* JB_1 */ }, { /* 597 */ 103, - /* JE_2 */ + /* JB_2 */ }, { /* 598 */ 103, - /* JE_4 */ + /* JB_4 */ }, { /* 599 */ 102, - /* JGE_1 */ + /* JCXZ */ }, { /* 600 */ - 103, - /* JGE_2 */ + 102, + /* JECXZ_32 */ }, { /* 601 */ - 103, - /* JGE_4 */ + 102, + /* JECXZ_64 */ }, { /* 602 */ 102, - /* JG_1 */ + /* JE_1 */ }, { /* 603 */ 103, - /* JG_2 */ + /* JE_2 */ }, { /* 604 */ 103, - /* JG_4 */ + /* JE_4 */ }, { /* 605 */ 102, - /* JLE_1 */ + /* JGE_1 */ }, { /* 606 */ 103, - /* JLE_2 */ + /* JGE_2 */ }, { /* 607 */ 103, - /* JLE_4 */ + /* JGE_4 */ }, { /* 608 */ 102, - /* JL_1 */ + /* JG_1 */ }, { /* 609 */ 103, - /* JL_2 */ + /* JG_2 */ }, { /* 610 */ 103, - /* JL_4 */ + /* JG_4 */ }, { /* 611 */ + 102, + /* JLE_1 */ + }, + { /* 612 */ + 103, + /* JLE_2 */ + }, + { /* 613 */ + 103, + /* JLE_4 */ + }, + { /* 614 */ + 102, + /* JL_1 */ + }, + { /* 615 */ + 103, + /* JL_2 */ + }, + { /* 616 */ + 103, + /* JL_4 */ + }, + { /* 617 */ 61, /* JMP16m */ }, - { /* 612 */ + { /* 618 */ 62, /* JMP16r */ }, - { /* 613 */ + { /* 619 */ 61, /* JMP32m */ }, - { /* 614 */ + { /* 620 */ 62, /* JMP32r */ }, - { /* 615 */ + { /* 621 */ 61, /* JMP64m */ }, - { /* 616 */ + { /* 622 */ 64, /* JMP64r */ }, - { /* 617 */ + { /* 623 */ 102, /* JMP_1 */ }, - { /* 618 */ + { /* 624 */ 103, /* JMP_2 */ }, - { /* 619 */ + { /* 625 */ 103, /* JMP_4 */ }, - { /* 620 */ + { /* 626 */ 102, /* JNE_1 */ }, - { /* 621 */ + { /* 627 */ 103, /* JNE_2 */ }, - { /* 622 */ + { /* 628 */ 103, /* JNE_4 */ }, - { /* 623 */ + { /* 629 */ 102, /* JNO_1 */ }, - { /* 624 */ + { /* 630 */ 103, /* JNO_2 */ }, - { /* 625 */ + { /* 631 */ 103, /* JNO_4 */ }, - { /* 626 */ + { /* 632 */ 102, /* JNP_1 */ }, - { /* 627 */ + { /* 633 */ 103, /* JNP_2 */ }, - { /* 628 */ + { /* 634 */ 103, /* JNP_4 */ }, - { /* 629 */ + { /* 635 */ 102, /* JNS_1 */ }, - { /* 630 */ + { /* 636 */ 103, /* JNS_2 */ }, - { /* 631 */ + { /* 637 */ 103, /* JNS_4 */ }, - { /* 632 */ + { /* 638 */ 102, /* JO_1 */ }, - { /* 633 */ + { /* 639 */ 103, /* JO_2 */ }, - { /* 634 */ + { /* 640 */ 103, /* JO_4 */ }, - { /* 635 */ + { /* 641 */ 102, /* JP_1 */ }, - { /* 636 */ + { /* 642 */ 103, /* JP_2 */ }, - { /* 637 */ + { /* 643 */ 103, /* JP_4 */ }, - { /* 638 */ + { /* 644 */ 102, /* JRCXZ */ }, - { /* 639 */ + { /* 645 */ 102, /* JS_1 */ }, - { /* 640 */ + { /* 646 */ 103, /* JS_2 */ }, - { /* 641 */ + { /* 647 */ 103, /* JS_4 */ }, - { /* 642 */ + { /* 648 */ 0, /* LAHF */ }, - { /* 643 */ + { /* 649 */ 52, /* LAR16rm */ }, - { /* 644 */ + { /* 650 */ 53, /* LAR16rr */ }, - { /* 645 */ + { /* 651 */ 52, /* LAR32rm */ }, - { /* 646 */ + { /* 652 */ 53, /* LAR32rr */ }, - { /* 647 */ + { /* 653 */ 32, /* LAR64rm */ }, - { /* 648 */ + { /* 654 */ 104, /* LAR64rr */ }, - { /* 649 */ - 0, - /* */ - }, - { /* 650 */ - 0, - /* */ - }, - { /* 651 */ - 0, - /* */ - }, - { /* 652 */ - 0, - /* */ - }, - { /* 653 */ - 0, - /* */ - }, - { /* 654 */ - 0, - /* */ - }, { /* 655 */ + 0, + /* */ + }, + { /* 656 */ + 0, + /* */ + }, + { /* 657 */ + 0, + /* */ + }, + { /* 658 */ + 0, + /* */ + }, + { /* 659 */ + 0, + /* */ + }, + { /* 660 */ + 0, + /* */ + }, + { /* 661 */ 105, /* LDS16rm */ }, - { /* 656 */ + { /* 662 */ 106, /* LDS32rm */ }, - { /* 657 */ + { /* 663 */ 52, /* LEA16r */ }, - { /* 658 */ + { /* 664 */ 52, /* LEA32r */ }, - { /* 659 */ + { /* 665 */ 107, /* LEA64_32r */ }, - { /* 660 */ + { /* 666 */ 108, /* LEA64r */ }, - { /* 661 */ + { /* 667 */ 0, /* LEAVE */ }, - { /* 662 */ + { /* 668 */ 0, /* LEAVE64 */ }, - { /* 663 */ + { /* 669 */ 105, /* LES16rm */ }, - { /* 664 */ + { /* 670 */ 106, /* LES32rm */ }, - { /* 665 */ + { /* 671 */ 105, /* LFS16rm */ }, - { /* 666 */ + { /* 672 */ 106, /* LFS32rm */ }, - { /* 667 */ + { /* 673 */ 109, /* LFS64rm */ }, - { /* 668 */ + { /* 674 */ 87, /* LGDT16m */ }, - { /* 669 */ + { /* 675 */ 87, /* LGDT32m */ }, - { /* 670 */ + { /* 676 */ 88, /* LGDT64m */ }, - { /* 671 */ + { /* 677 */ 105, /* LGS16rm */ }, - { /* 672 */ + { /* 678 */ 106, /* LGS32rm */ }, - { /* 673 */ + { /* 679 */ 109, /* LGS64rm */ }, - { /* 674 */ + { /* 680 */ 87, /* LIDT16m */ }, - { /* 675 */ + { /* 681 */ 87, /* LIDT32m */ }, - { /* 676 */ + { /* 682 */ 88, /* LIDT64m */ }, - { /* 677 */ + { /* 683 */ 61, /* LLDT16m */ }, - { /* 678 */ + { /* 684 */ 110, /* LLDT16r */ }, - { /* 679 */ + { /* 685 */ 61, /* LMSW16m */ }, - { /* 680 */ + { /* 686 */ 110, /* LMSW16r */ }, - { /* 681 */ - 0, - /* */ - }, - { /* 682 */ - 0, - /* */ - }, - { /* 683 */ - 0, - /* */ - }, - { /* 684 */ - 0, - /* */ - }, - { /* 685 */ - 0, - /* */ - }, - { /* 686 */ - 0, - /* */ - }, { /* 687 */ 0, /* */ @@ -5501,7 +5501,7 @@ static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = }, { /* 722 */ 0, - /* LOCK_PREFIX */ + /* */ }, { /* 723 */ 0, @@ -5525,7 +5525,7 @@ static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = }, { /* 728 */ 0, - /* */ + /* LOCK_PREFIX */ }, { /* 729 */ 0, @@ -5592,1560 +5592,1560 @@ static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = /* */ }, { /* 745 */ + 0, + /* */ + }, + { /* 746 */ + 0, + /* */ + }, + { /* 747 */ + 0, + /* */ + }, + { /* 748 */ + 0, + /* */ + }, + { /* 749 */ + 0, + /* */ + }, + { /* 750 */ + 0, + /* */ + }, + { /* 751 */ 111, /* LODSB */ }, - { /* 746 */ + { /* 752 */ 112, /* LODSL */ }, - { /* 747 */ + { /* 753 */ 113, /* LODSQ */ }, - { /* 748 */ + { /* 754 */ 114, /* LODSW */ }, - { /* 749 */ + { /* 755 */ 102, /* LOOP */ }, - { /* 750 */ + { /* 756 */ 102, /* LOOPE */ }, - { /* 751 */ + { /* 757 */ 102, /* LOOPNE */ }, - { /* 752 */ + { /* 758 */ 115, /* LRETIL */ }, - { /* 753 */ + { /* 759 */ 115, /* LRETIQ */ }, - { /* 754 */ + { /* 760 */ 2, /* LRETIW */ }, - { /* 755 */ + { /* 761 */ 0, /* LRETL */ }, - { /* 756 */ + { /* 762 */ 0, /* LRETQ */ }, - { /* 757 */ + { /* 763 */ 0, /* LRETW */ }, - { /* 758 */ + { /* 764 */ 52, /* LSL16rm */ }, - { /* 759 */ + { /* 765 */ 53, /* LSL16rr */ }, - { /* 760 */ + { /* 766 */ 52, /* LSL32rm */ }, - { /* 761 */ + { /* 767 */ 53, /* LSL32rr */ }, - { /* 762 */ + { /* 768 */ 32, /* LSL64rm */ }, - { /* 763 */ + { /* 769 */ 33, /* LSL64rr */ }, - { /* 764 */ + { /* 770 */ 105, /* LSS16rm */ }, - { /* 765 */ + { /* 771 */ 106, /* LSS32rm */ }, - { /* 766 */ + { /* 772 */ 109, /* LSS64rm */ }, - { /* 767 */ + { /* 773 */ 61, /* LTRm */ }, - { /* 768 */ + { /* 774 */ 110, /* LTRr */ }, - { /* 769 */ + { /* 775 */ 0, /* */ }, - { /* 770 */ + { /* 776 */ 0, /* */ }, - { /* 771 */ + { /* 777 */ 0, /* */ }, - { /* 772 */ + { /* 778 */ 0, /* */ }, - { /* 773 */ + { /* 779 */ 52, /* LZCNT16rm */ }, - { /* 774 */ + { /* 780 */ 53, /* LZCNT16rr */ }, - { /* 775 */ + { /* 781 */ 52, /* LZCNT32rm */ }, - { /* 776 */ + { /* 782 */ 53, /* LZCNT32rr */ }, - { /* 777 */ + { /* 783 */ 32, /* LZCNT64rm */ }, - { /* 778 */ + { /* 784 */ 33, /* LZCNT64rr */ }, - { /* 779 */ + { /* 785 */ 0, /* MONTMUL */ }, - { /* 780 */ - 0, - /* */ - }, - { /* 781 */ - 0, - /* */ - }, - { /* 782 */ - 116, - /* MOV16ao16 */ - }, - { /* 783 */ - 116, - /* MOV16ao16_16 */ - }, - { /* 784 */ - 3, - /* MOV16mi */ - }, - { /* 785 */ - 5, - /* MOV16mr */ - }, { /* 786 */ - 117, - /* MOV16ms */ + 0, + /* */ }, { /* 787 */ - 116, - /* MOV16o16a */ + 0, + /* */ }, { /* 788 */ 116, - /* MOV16o16a_16 */ + /* MOV16ao16 */ }, { /* 789 */ + 116, + /* MOV16ao16_16 */ + }, + { /* 790 */ + 3, + /* MOV16mi */ + }, + { /* 791 */ + 5, + /* MOV16mr */ + }, + { /* 792 */ + 117, + /* MOV16ms */ + }, + { /* 793 */ + 116, + /* MOV16o16a */ + }, + { /* 794 */ + 116, + /* MOV16o16a_16 */ + }, + { /* 795 */ 118, /* MOV16ri */ }, - { /* 790 */ + { /* 796 */ 67, /* MOV16ri_alt */ }, - { /* 791 */ + { /* 797 */ 52, /* MOV16rm */ }, - { /* 792 */ + { /* 798 */ 57, /* MOV16rr */ }, - { /* 793 */ + { /* 799 */ 53, /* MOV16rr_REV */ }, - { /* 794 */ + { /* 800 */ 119, /* MOV16rs */ }, - { /* 795 */ + { /* 801 */ 120, /* MOV16sm */ }, - { /* 796 */ + { /* 802 */ 121, /* MOV16sr */ }, - { /* 797 */ + { /* 803 */ 122, /* MOV32ao32 */ }, - { /* 798 */ + { /* 804 */ 122, /* MOV32ao32_16 */ }, - { /* 799 */ + { /* 805 */ 123, /* MOV32cr */ }, - { /* 800 */ + { /* 806 */ 124, /* MOV32dr */ }, - { /* 801 */ + { /* 807 */ 3, /* MOV32mi */ }, - { /* 802 */ + { /* 808 */ 5, /* MOV32mr */ }, - { /* 803 */ + { /* 809 */ 117, /* MOV32ms */ }, - { /* 804 */ + { /* 810 */ 122, /* MOV32o32a */ }, - { /* 805 */ + { /* 811 */ 122, /* MOV32o32a_16 */ }, - { /* 806 */ + { /* 812 */ 0, /* */ }, - { /* 807 */ + { /* 813 */ 125, /* MOV32rc */ }, - { /* 808 */ + { /* 814 */ 126, /* MOV32rd */ }, - { /* 809 */ + { /* 815 */ 118, /* MOV32ri */ }, - { /* 810 */ + { /* 816 */ 0, /* */ }, - { /* 811 */ + { /* 817 */ 67, /* MOV32ri_alt */ }, - { /* 812 */ + { /* 818 */ 52, /* MOV32rm */ }, - { /* 813 */ + { /* 819 */ 57, /* MOV32rr */ }, - { /* 814 */ + { /* 820 */ 53, /* MOV32rr_REV */ }, - { /* 815 */ + { /* 821 */ 119, /* MOV32rs */ }, - { /* 816 */ + { /* 822 */ 120, /* MOV32sm */ }, - { /* 817 */ + { /* 823 */ 121, /* MOV32sr */ }, - { /* 818 */ + { /* 824 */ 116, /* MOV64ao16 */ }, - { /* 819 */ + { /* 825 */ 122, /* MOV64ao32 */ }, - { /* 820 */ + { /* 826 */ 127, /* MOV64ao64 */ }, - { /* 821 */ + { /* 827 */ 128, /* MOV64ao8 */ }, - { /* 822 */ + { /* 828 */ 129, /* MOV64cr */ }, - { /* 823 */ + { /* 829 */ 130, /* MOV64dr */ }, - { /* 824 */ + { /* 830 */ 14, /* MOV64mi32 */ }, - { /* 825 */ + { /* 831 */ 16, /* MOV64mr */ }, - { /* 826 */ + { /* 832 */ 117, /* MOV64ms */ }, - { /* 827 */ + { /* 833 */ 116, /* MOV64o16a */ }, - { /* 828 */ + { /* 834 */ 122, /* MOV64o32a */ }, - { /* 829 */ + { /* 835 */ 127, /* MOV64o64a */ }, - { /* 830 */ + { /* 836 */ 128, /* MOV64o8a */ }, - { /* 831 */ + { /* 837 */ 131, /* MOV64rc */ }, - { /* 832 */ + { /* 838 */ 132, /* MOV64rd */ }, - { /* 833 */ + { /* 839 */ 133, /* MOV64ri */ }, - { /* 834 */ + { /* 840 */ 68, /* MOV64ri32 */ }, - { /* 835 */ + { /* 841 */ 32, /* MOV64rm */ }, - { /* 836 */ + { /* 842 */ 60, /* MOV64rr */ }, - { /* 837 */ + { /* 843 */ 33, /* MOV64rr_REV */ }, - { /* 838 */ + { /* 844 */ 134, /* MOV64rs */ }, - { /* 839 */ + { /* 845 */ 120, /* MOV64sm */ }, - { /* 840 */ + { /* 846 */ 135, /* MOV64sr */ }, - { /* 841 */ + { /* 847 */ 128, /* MOV8ao8 */ }, - { /* 842 */ + { /* 848 */ 128, /* MOV8ao8_16 */ }, - { /* 843 */ - 22, + { /* 849 */ + 23, /* MOV8mi */ }, - { /* 844 */ - 23, - /* MOV8mr */ - }, - { /* 845 */ - 0, - /* */ - }, - { /* 846 */ - 128, - /* MOV8o8a */ - }, - { /* 847 */ - 128, - /* MOV8o8a_16 */ - }, - { /* 848 */ - 136, - /* MOV8ri */ - }, - { /* 849 */ - 69, - /* MOV8ri_alt */ - }, { /* 850 */ - 70, - /* MOV8rm */ + 24, + /* MOV8mr */ }, { /* 851 */ 0, /* */ }, { /* 852 */ + 128, + /* MOV8o8a */ + }, + { /* 853 */ + 128, + /* MOV8o8a_16 */ + }, + { /* 854 */ + 136, + /* MOV8ri */ + }, + { /* 855 */ + 69, + /* MOV8ri_alt */ + }, + { /* 856 */ + 70, + /* MOV8rm */ + }, + { /* 857 */ + 0, + /* */ + }, + { /* 858 */ 71, /* MOV8rr */ }, - { /* 853 */ + { /* 859 */ 0, /* */ }, - { /* 854 */ + { /* 860 */ 72, /* MOV8rr_REV */ }, - { /* 855 */ + { /* 861 */ 5, /* MOVBE16mr */ }, - { /* 856 */ + { /* 862 */ 52, /* MOVBE16rm */ }, - { /* 857 */ + { /* 863 */ 5, /* MOVBE32mr */ }, - { /* 858 */ + { /* 864 */ 52, /* MOVBE32rm */ }, - { /* 859 */ + { /* 865 */ 16, /* MOVBE64mr */ }, - { /* 860 */ + { /* 866 */ 32, /* MOVBE64rm */ }, - { /* 861 */ + { /* 867 */ 0, /* */ }, - { /* 862 */ + { /* 868 */ 73, /* MOVSB */ }, - { /* 863 */ + { /* 869 */ 74, /* MOVSL */ }, - { /* 864 */ + { /* 870 */ 75, /* MOVSQ */ }, - { /* 865 */ + { /* 871 */ 76, /* MOVSW */ }, - { /* 866 */ + { /* 872 */ 137, /* MOVSX16rm8 */ }, - { /* 867 */ + { /* 873 */ 138, /* MOVSX16rr8 */ }, - { /* 868 */ + { /* 874 */ 52, /* MOVSX32rm16 */ }, - { /* 869 */ + { /* 875 */ 137, /* MOVSX32rm8 */ }, - { /* 870 */ + { /* 876 */ 139, /* MOVSX32rr16 */ }, - { /* 871 */ + { /* 877 */ 138, /* MOVSX32rr8 */ }, - { /* 872 */ + { /* 878 */ 104, /* MOVSX64_NOREXrr32 */ }, - { /* 873 */ + { /* 879 */ 32, /* MOVSX64rm16 */ }, - { /* 874 */ + { /* 880 */ 32, /* MOVSX64rm32 */ }, - { /* 875 */ + { /* 881 */ 140, /* MOVSX64rm8 */ }, - { /* 876 */ + { /* 882 */ 141, /* MOVSX64rr16 */ }, - { /* 877 */ + { /* 883 */ 104, /* MOVSX64rr32 */ }, - { /* 878 */ + { /* 884 */ 142, /* MOVSX64rr8 */ }, - { /* 879 */ + { /* 885 */ 137, /* MOVZX16rm8 */ }, - { /* 880 */ + { /* 886 */ 138, /* MOVZX16rr8 */ }, - { /* 881 */ + { /* 887 */ 0, /* */ }, - { /* 882 */ + { /* 888 */ 0, /* */ }, - { /* 883 */ + { /* 889 */ 52, /* MOVZX32rm16 */ }, - { /* 884 */ + { /* 890 */ 137, /* MOVZX32rm8 */ }, - { /* 885 */ + { /* 891 */ 139, /* MOVZX32rr16 */ }, - { /* 886 */ + { /* 892 */ 138, /* MOVZX32rr8 */ }, - { /* 887 */ + { /* 893 */ 32, /* MOVZX64rm16_Q */ }, - { /* 888 */ + { /* 894 */ 140, /* MOVZX64rm8_Q */ }, - { /* 889 */ + { /* 895 */ 141, /* MOVZX64rr16_Q */ }, - { /* 890 */ + { /* 896 */ 142, /* MOVZX64rr8_Q */ }, - { /* 891 */ + { /* 897 */ 61, /* MUL16m */ }, - { /* 892 */ + { /* 898 */ 62, /* MUL16r */ }, - { /* 893 */ + { /* 899 */ 61, /* MUL32m */ }, - { /* 894 */ + { /* 900 */ 62, /* MUL32r */ }, - { /* 895 */ + { /* 901 */ 61, /* MUL64m */ }, - { /* 896 */ + { /* 902 */ 64, /* MUL64r */ }, - { /* 897 */ + { /* 903 */ 80, /* MUL8m */ }, - { /* 898 */ + { /* 904 */ 82, /* MUL8r */ }, - { /* 899 */ + { /* 905 */ 34, /* MULX32rm */ }, - { /* 900 */ + { /* 906 */ 35, /* MULX32rr */ }, - { /* 901 */ + { /* 907 */ 36, /* MULX64rm */ }, - { /* 902 */ + { /* 908 */ 37, /* MULX64rr */ }, - { /* 903 */ + { /* 909 */ 61, /* NEG16m */ }, - { /* 904 */ + { /* 910 */ 78, /* NEG16r */ }, - { /* 905 */ + { /* 911 */ 61, /* NEG32m */ }, - { /* 906 */ + { /* 912 */ 78, /* NEG32r */ }, - { /* 907 */ + { /* 913 */ 61, /* NEG64m */ }, - { /* 908 */ + { /* 914 */ 79, /* NEG64r */ }, - { /* 909 */ + { /* 915 */ 80, /* NEG8m */ }, - { /* 910 */ + { /* 916 */ 81, /* NEG8r */ }, - { /* 911 */ + { /* 917 */ 0, /* NOOP */ }, - { /* 912 */ + { /* 918 */ 61, /* NOOP18_16m4 */ }, - { /* 913 */ + { /* 919 */ 61, /* NOOP18_16m5 */ }, - { /* 914 */ + { /* 920 */ 61, /* NOOP18_16m6 */ }, - { /* 915 */ + { /* 921 */ 61, /* NOOP18_16m7 */ }, - { /* 916 */ + { /* 922 */ 62, /* NOOP18_16r4 */ }, - { /* 917 */ + { /* 923 */ 62, /* NOOP18_16r5 */ }, - { /* 918 */ + { /* 924 */ 62, /* NOOP18_16r6 */ }, - { /* 919 */ + { /* 925 */ 62, /* NOOP18_16r7 */ }, - { /* 920 */ + { /* 926 */ 61, /* NOOP18_m4 */ }, - { /* 921 */ + { /* 927 */ 61, /* NOOP18_m5 */ }, - { /* 922 */ + { /* 928 */ 61, /* NOOP18_m6 */ }, - { /* 923 */ + { /* 929 */ 61, /* NOOP18_m7 */ }, - { /* 924 */ + { /* 930 */ 62, /* NOOP18_r4 */ }, - { /* 925 */ + { /* 931 */ 62, /* NOOP18_r5 */ }, - { /* 926 */ + { /* 932 */ 62, /* NOOP18_r6 */ }, - { /* 927 */ + { /* 933 */ 62, /* NOOP18_r7 */ }, - { /* 928 */ + { /* 934 */ 53, /* NOOP19rr */ }, - { /* 929 */ + { /* 935 */ 61, /* NOOPL */ }, - { /* 930 */ + { /* 936 */ 61, /* NOOPL_19 */ }, - { /* 931 */ + { /* 937 */ 61, /* NOOPL_1a */ }, - { /* 932 */ + { /* 938 */ 61, /* NOOPL_1b */ }, - { /* 933 */ + { /* 939 */ 61, /* NOOPL_1c */ }, - { /* 934 */ + { /* 940 */ 61, /* NOOPL_1d */ }, - { /* 935 */ + { /* 941 */ 61, /* NOOPL_1e */ }, - { /* 936 */ + { /* 942 */ 61, /* NOOPW */ }, - { /* 937 */ + { /* 943 */ 61, /* NOOPW_19 */ }, - { /* 938 */ + { /* 944 */ 61, /* NOOPW_1a */ }, - { /* 939 */ + { /* 945 */ 61, /* NOOPW_1b */ }, - { /* 940 */ + { /* 946 */ 61, /* NOOPW_1c */ }, - { /* 941 */ + { /* 947 */ 61, /* NOOPW_1d */ }, - { /* 942 */ + { /* 948 */ 61, /* NOOPW_1e */ }, - { /* 943 */ + { /* 949 */ 61, /* NOT16m */ }, - { /* 944 */ + { /* 950 */ 78, /* NOT16r */ }, - { /* 945 */ + { /* 951 */ 61, /* NOT32m */ }, - { /* 946 */ + { /* 952 */ 78, /* NOT32r */ }, - { /* 947 */ + { /* 953 */ 61, /* NOT64m */ }, - { /* 948 */ + { /* 954 */ 79, /* NOT64r */ }, - { /* 949 */ + { /* 955 */ 80, /* NOT8m */ }, - { /* 950 */ + { /* 956 */ 81, /* NOT8r */ }, - { /* 951 */ + { /* 957 */ 2, /* OR16i16 */ }, - { /* 952 */ + { /* 958 */ 3, /* OR16mi */ }, - { /* 953 */ + { /* 959 */ 4, /* OR16mi8 */ }, - { /* 954 */ + { /* 960 */ 5, /* OR16mr */ }, - { /* 955 */ + { /* 961 */ 6, /* OR16ri */ }, - { /* 956 */ + { /* 962 */ 7, /* OR16ri8 */ }, - { /* 957 */ + { /* 963 */ 8, /* OR16rm */ }, - { /* 958 */ + { /* 964 */ 9, /* OR16rr */ }, - { /* 959 */ + { /* 965 */ 10, /* OR16rr_REV */ }, - { /* 960 */ + { /* 966 */ 2, /* OR32i32 */ }, - { /* 961 */ + { /* 967 */ 3, /* OR32mi */ }, - { /* 962 */ + { /* 968 */ 11, /* OR32mi8 */ }, - { /* 963 */ + { /* 969 */ 5, /* OR32mr */ }, - { /* 964 */ + { /* 970 */ 0, /* */ }, - { /* 965 */ + { /* 971 */ 6, /* OR32ri */ }, - { /* 966 */ + { /* 972 */ 12, /* OR32ri8 */ }, - { /* 967 */ + { /* 973 */ 8, /* OR32rm */ }, - { /* 968 */ + { /* 974 */ 9, /* OR32rr */ }, - { /* 969 */ + { /* 975 */ 10, /* OR32rr_REV */ }, - { /* 970 */ + { /* 976 */ 13, /* OR64i32 */ }, - { /* 971 */ + { /* 977 */ 14, /* OR64mi32 */ }, - { /* 972 */ + { /* 978 */ 15, /* OR64mi8 */ }, - { /* 973 */ + { /* 979 */ 16, /* OR64mr */ }, - { /* 974 */ + { /* 980 */ 17, /* OR64ri32 */ }, - { /* 975 */ + { /* 981 */ 18, /* OR64ri8 */ }, - { /* 976 */ + { /* 982 */ 19, /* OR64rm */ }, - { /* 977 */ + { /* 983 */ 20, /* OR64rr */ }, - { /* 978 */ + { /* 984 */ 21, /* OR64rr_REV */ }, - { /* 979 */ - 1, - /* OR8i8 */ - }, - { /* 980 */ - 22, - /* OR8mi */ - }, - { /* 981 */ - 23, - /* OR8mr */ - }, - { /* 982 */ - 24, - /* OR8ri */ - }, - { /* 983 */ - 24, - /* OR8ri8 */ - }, - { /* 984 */ - 25, - /* OR8rm */ - }, { /* 985 */ - 26, - /* OR8rr */ + 23, + /* OR82_8mi8 */ }, { /* 986 */ - 27, - /* OR8rr_REV */ + 22, + /* OR82_8ri8 */ }, { /* 987 */ 1, - /* OUT16ir */ + /* OR8i8 */ }, { /* 988 */ + 23, + /* OR8mi */ + }, + { /* 989 */ + 24, + /* OR8mr */ + }, + { /* 990 */ + 22, + /* OR8ri */ + }, + { /* 991 */ + 25, + /* OR8rm */ + }, + { /* 992 */ + 26, + /* OR8rr */ + }, + { /* 993 */ + 27, + /* OR8rr_REV */ + }, + { /* 994 */ + 1, + /* OUT16ir */ + }, + { /* 995 */ 0, /* OUT16rr */ }, - { /* 989 */ + { /* 996 */ 1, /* OUT32ir */ }, - { /* 990 */ + { /* 997 */ 0, /* OUT32rr */ }, - { /* 991 */ + { /* 998 */ 1, /* OUT8ir */ }, - { /* 992 */ + { /* 999 */ 0, /* OUT8rr */ }, - { /* 993 */ + { /* 1000 */ 111, /* OUTSB */ }, - { /* 994 */ + { /* 1001 */ 112, /* OUTSL */ }, - { /* 995 */ + { /* 1002 */ 114, /* OUTSW */ }, - { /* 996 */ + { /* 1003 */ 34, /* PDEP32rm */ }, - { /* 997 */ + { /* 1004 */ 35, /* PDEP32rr */ }, - { /* 998 */ + { /* 1005 */ 36, /* PDEP64rm */ }, - { /* 999 */ + { /* 1006 */ 37, /* PDEP64rr */ }, - { /* 1000 */ + { /* 1007 */ 34, /* PEXT32rm */ }, - { /* 1001 */ + { /* 1008 */ 35, /* PEXT32rr */ }, - { /* 1002 */ + { /* 1009 */ 36, /* PEXT64rm */ }, - { /* 1003 */ + { /* 1010 */ 37, /* PEXT64rr */ }, - { /* 1004 */ + { /* 1011 */ 143, /* POP16r */ }, - { /* 1005 */ + { /* 1012 */ 61, /* POP16rmm */ }, - { /* 1006 */ + { /* 1013 */ 62, /* POP16rmr */ }, - { /* 1007 */ + { /* 1014 */ 143, /* POP32r */ }, - { /* 1008 */ + { /* 1015 */ 61, /* POP32rmm */ }, - { /* 1009 */ + { /* 1016 */ 62, /* POP32rmr */ }, - { /* 1010 */ + { /* 1017 */ 144, /* POP64r */ }, - { /* 1011 */ + { /* 1018 */ 61, /* POP64rmm */ }, - { /* 1012 */ + { /* 1019 */ 64, /* POP64rmr */ }, - { /* 1013 */ + { /* 1020 */ 0, /* POPA16 */ }, - { /* 1014 */ + { /* 1021 */ 0, /* POPA32 */ }, - { /* 1015 */ + { /* 1022 */ 0, /* POPDS16 */ }, - { /* 1016 */ + { /* 1023 */ 0, /* POPDS32 */ }, - { /* 1017 */ + { /* 1024 */ 0, /* POPES16 */ }, - { /* 1018 */ + { /* 1025 */ 0, /* POPES32 */ }, - { /* 1019 */ + { /* 1026 */ 0, /* POPF16 */ }, - { /* 1020 */ + { /* 1027 */ 0, /* POPF32 */ }, - { /* 1021 */ + { /* 1028 */ 0, /* POPF64 */ }, - { /* 1022 */ + { /* 1029 */ 0, /* POPFS16 */ }, - { /* 1023 */ + { /* 1030 */ 0, /* POPFS32 */ }, - { /* 1024 */ + { /* 1031 */ 0, /* POPFS64 */ }, - { /* 1025 */ + { /* 1032 */ 0, /* POPGS16 */ }, - { /* 1026 */ + { /* 1033 */ 0, /* POPGS32 */ }, - { /* 1027 */ + { /* 1034 */ 0, /* POPGS64 */ }, - { /* 1028 */ + { /* 1035 */ 0, /* POPSS16 */ }, - { /* 1029 */ + { /* 1036 */ 0, /* POPSS32 */ }, - { /* 1030 */ + { /* 1037 */ 145, /* PUSH16i8 */ }, - { /* 1031 */ + { /* 1038 */ 143, /* PUSH16r */ }, - { /* 1032 */ + { /* 1039 */ 61, /* PUSH16rmm */ }, - { /* 1033 */ + { /* 1040 */ 62, /* PUSH16rmr */ }, - { /* 1034 */ + { /* 1041 */ 146, /* PUSH32i8 */ }, - { /* 1035 */ + { /* 1042 */ 143, /* PUSH32r */ }, - { /* 1036 */ + { /* 1043 */ 61, /* PUSH32rmm */ }, - { /* 1037 */ + { /* 1044 */ 62, /* PUSH32rmr */ }, - { /* 1038 */ + { /* 1045 */ 2, /* PUSH64i16 */ }, - { /* 1039 */ + { /* 1046 */ 13, /* PUSH64i32 */ }, - { /* 1040 */ + { /* 1047 */ 147, /* PUSH64i8 */ }, - { /* 1041 */ + { /* 1048 */ 144, /* PUSH64r */ }, - { /* 1042 */ + { /* 1049 */ 61, /* PUSH64rmm */ }, - { /* 1043 */ + { /* 1050 */ 64, /* PUSH64rmr */ }, - { /* 1044 */ + { /* 1051 */ 0, /* PUSHA16 */ }, - { /* 1045 */ + { /* 1052 */ 0, /* PUSHA32 */ }, - { /* 1046 */ + { /* 1053 */ 0, /* PUSHCS16 */ }, - { /* 1047 */ + { /* 1054 */ 0, /* PUSHCS32 */ }, - { /* 1048 */ + { /* 1055 */ 0, /* PUSHDS16 */ }, - { /* 1049 */ + { /* 1056 */ 0, /* PUSHDS32 */ }, - { /* 1050 */ + { /* 1057 */ 0, /* PUSHES16 */ }, - { /* 1051 */ + { /* 1058 */ 0, /* PUSHES32 */ }, - { /* 1052 */ + { /* 1059 */ 0, /* PUSHF16 */ }, - { /* 1053 */ + { /* 1060 */ 0, /* PUSHF32 */ }, - { /* 1054 */ + { /* 1061 */ 0, /* PUSHF64 */ }, - { /* 1055 */ + { /* 1062 */ 0, /* PUSHFS16 */ }, - { /* 1056 */ + { /* 1063 */ 0, /* PUSHFS32 */ }, - { /* 1057 */ + { /* 1064 */ 0, /* PUSHFS64 */ }, - { /* 1058 */ + { /* 1065 */ 0, /* PUSHGS16 */ }, - { /* 1059 */ + { /* 1066 */ 0, /* PUSHGS32 */ }, - { /* 1060 */ + { /* 1067 */ 0, /* PUSHGS64 */ }, - { /* 1061 */ + { /* 1068 */ 0, /* PUSHSS16 */ }, - { /* 1062 */ + { /* 1069 */ 0, /* PUSHSS32 */ }, - { /* 1063 */ + { /* 1070 */ 2, /* PUSHi16 */ }, - { /* 1064 */ + { /* 1071 */ 2, /* PUSHi32 */ }, - { /* 1065 */ + { /* 1072 */ 61, /* RCL16m1 */ }, - { /* 1066 */ + { /* 1073 */ 61, /* RCL16mCL */ }, - { /* 1067 */ + { /* 1074 */ 148, /* RCL16mi */ }, - { /* 1068 */ + { /* 1075 */ 78, /* RCL16r1 */ }, - { /* 1069 */ + { /* 1076 */ 78, /* RCL16rCL */ }, - { /* 1070 */ + { /* 1077 */ 149, /* RCL16ri */ }, - { /* 1071 */ + { /* 1078 */ 61, /* RCL32m1 */ }, - { /* 1072 */ + { /* 1079 */ 61, /* RCL32mCL */ }, - { /* 1073 */ + { /* 1080 */ 148, /* RCL32mi */ }, - { /* 1074 */ + { /* 1081 */ 78, /* RCL32r1 */ }, - { /* 1075 */ + { /* 1082 */ 78, /* RCL32rCL */ }, - { /* 1076 */ + { /* 1083 */ 149, /* RCL32ri */ }, - { /* 1077 */ + { /* 1084 */ 61, /* RCL64m1 */ }, - { /* 1078 */ + { /* 1085 */ 61, /* RCL64mCL */ }, - { /* 1079 */ + { /* 1086 */ 148, /* RCL64mi */ }, - { /* 1080 */ + { /* 1087 */ 79, /* RCL64r1 */ }, - { /* 1081 */ + { /* 1088 */ 79, /* RCL64rCL */ }, - { /* 1082 */ + { /* 1089 */ 150, /* RCL64ri */ }, - { /* 1083 */ + { /* 1090 */ 80, /* RCL8m1 */ }, - { /* 1084 */ + { /* 1091 */ 80, /* RCL8mCL */ }, - { /* 1085 */ - 22, + { /* 1092 */ + 23, /* RCL8mi */ }, - { /* 1086 */ + { /* 1093 */ 81, /* RCL8r1 */ }, - { /* 1087 */ + { /* 1094 */ 81, /* RCL8rCL */ }, - { /* 1088 */ - 24, - /* RCL8ri */ - }, - { /* 1089 */ - 61, - /* RCR16m1 */ - }, - { /* 1090 */ - 61, - /* RCR16mCL */ - }, - { /* 1091 */ - 148, - /* RCR16mi */ - }, - { /* 1092 */ - 78, - /* RCR16r1 */ - }, - { /* 1093 */ - 78, - /* RCR16rCL */ - }, - { /* 1094 */ - 149, - /* RCR16ri */ - }, { /* 1095 */ - 61, - /* RCR32m1 */ + 22, + /* RCL8ri */ }, { /* 1096 */ 61, - /* RCR32mCL */ + /* RCR16m1 */ }, { /* 1097 */ - 148, - /* RCR32mi */ + 61, + /* RCR16mCL */ }, { /* 1098 */ - 78, - /* RCR32r1 */ + 148, + /* RCR16mi */ }, { /* 1099 */ 78, - /* RCR32rCL */ + /* RCR16r1 */ }, { /* 1100 */ - 149, - /* RCR32ri */ + 78, + /* RCR16rCL */ }, { /* 1101 */ - 61, - /* RCR64m1 */ + 149, + /* RCR16ri */ }, { /* 1102 */ 61, - /* RCR64mCL */ + /* RCR32m1 */ }, { /* 1103 */ + 61, + /* RCR32mCL */ + }, + { /* 1104 */ + 148, + /* RCR32mi */ + }, + { /* 1105 */ + 78, + /* RCR32r1 */ + }, + { /* 1106 */ + 78, + /* RCR32rCL */ + }, + { /* 1107 */ + 149, + /* RCR32ri */ + }, + { /* 1108 */ + 61, + /* RCR64m1 */ + }, + { /* 1109 */ + 61, + /* RCR64mCL */ + }, + { /* 1110 */ 148, /* RCR64mi */ }, - { /* 1104 */ + { /* 1111 */ 79, /* RCR64r1 */ }, - { /* 1105 */ + { /* 1112 */ 79, /* RCR64rCL */ }, - { /* 1106 */ + { /* 1113 */ 150, /* RCR64ri */ }, - { /* 1107 */ + { /* 1114 */ 80, /* RCR8m1 */ }, - { /* 1108 */ + { /* 1115 */ 80, /* RCR8mCL */ }, - { /* 1109 */ - 22, + { /* 1116 */ + 23, /* RCR8mi */ }, - { /* 1110 */ + { /* 1117 */ 81, /* RCR8r1 */ }, - { /* 1111 */ + { /* 1118 */ 81, /* RCR8rCL */ }, - { /* 1112 */ - 24, + { /* 1119 */ + 22, /* RCR8ri */ }, - { /* 1113 */ + { /* 1120 */ 151, /* RDFSBASE */ }, - { /* 1114 */ + { /* 1121 */ 64, /* RDFSBASE64 */ }, - { /* 1115 */ + { /* 1122 */ 151, /* RDGSBASE */ }, - { /* 1116 */ + { /* 1123 */ 64, /* RDGSBASE64 */ }, - { /* 1117 */ + { /* 1124 */ 0, /* RDMSR */ }, - { /* 1118 */ + { /* 1125 */ 0, /* RDPMC */ }, - { /* 1119 */ + { /* 1126 */ 62, /* RDRAND16r */ }, - { /* 1120 */ + { /* 1127 */ 62, /* RDRAND32r */ }, - { /* 1121 */ + { /* 1128 */ 64, /* RDRAND64r */ }, - { /* 1122 */ + { /* 1129 */ 62, /* RDSEED16r */ }, - { /* 1123 */ + { /* 1130 */ 62, /* RDSEED32r */ }, - { /* 1124 */ + { /* 1131 */ 64, /* RDSEED64r */ }, - { /* 1125 */ + { /* 1132 */ 0, /* RDTSC */ }, - { /* 1126 */ - 0, - /* RDTSCP */ - }, - { /* 1127 */ - 0, - /* */ - }, - { /* 1128 */ - 0, - /* */ - }, - { /* 1129 */ - 0, - /* */ - }, - { /* 1130 */ - 0, - /* */ - }, - { /* 1131 */ - 0, - /* REPNE_PREFIX */ - }, - { /* 1132 */ - 0, - /* */ - }, { /* 1133 */ 0, - /* */ + /* RDTSCP */ }, { /* 1134 */ 0, @@ -7165,11 +7165,11 @@ static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = }, { /* 1138 */ 0, - /* */ + /* REPNE_PREFIX */ }, { /* 1139 */ 0, - /* REP_PREFIX */ + /* */ }, { /* 1140 */ 0, @@ -7197,679 +7197,679 @@ static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = }, { /* 1146 */ 0, - /* */ + /* REP_PREFIX */ }, { /* 1147 */ - 115, - /* RETIL */ + 0, + /* */ }, { /* 1148 */ - 115, - /* RETIQ */ + 0, + /* */ }, { /* 1149 */ - 2, - /* RETIW */ + 0, + /* */ }, { /* 1150 */ 0, - /* RETL */ + /* */ }, { /* 1151 */ 0, - /* RETQ */ + /* */ }, { /* 1152 */ 0, - /* RETW */ + /* */ }, { /* 1153 */ 0, - /* REX64_PREFIX */ + /* */ }, { /* 1154 */ - 61, - /* ROL16m1 */ + 115, + /* RETIL */ }, { /* 1155 */ - 61, - /* ROL16mCL */ + 115, + /* RETIQ */ }, { /* 1156 */ - 148, - /* ROL16mi */ + 2, + /* RETIW */ }, { /* 1157 */ - 78, - /* ROL16r1 */ + 0, + /* RETL */ }, { /* 1158 */ - 78, - /* ROL16rCL */ + 0, + /* RETQ */ }, { /* 1159 */ - 149, - /* ROL16ri */ + 0, + /* RETW */ }, { /* 1160 */ - 61, - /* ROL32m1 */ + 0, + /* REX64_PREFIX */ }, { /* 1161 */ 61, - /* ROL32mCL */ + /* ROL16m1 */ }, { /* 1162 */ - 148, - /* ROL32mi */ + 61, + /* ROL16mCL */ }, { /* 1163 */ - 78, - /* ROL32r1 */ + 148, + /* ROL16mi */ }, { /* 1164 */ 78, - /* ROL32rCL */ + /* ROL16r1 */ }, { /* 1165 */ - 149, - /* ROL32ri */ + 78, + /* ROL16rCL */ }, { /* 1166 */ - 61, - /* ROL64m1 */ + 149, + /* ROL16ri */ }, { /* 1167 */ 61, - /* ROL64mCL */ + /* ROL32m1 */ }, { /* 1168 */ + 61, + /* ROL32mCL */ + }, + { /* 1169 */ + 148, + /* ROL32mi */ + }, + { /* 1170 */ + 78, + /* ROL32r1 */ + }, + { /* 1171 */ + 78, + /* ROL32rCL */ + }, + { /* 1172 */ + 149, + /* ROL32ri */ + }, + { /* 1173 */ + 61, + /* ROL64m1 */ + }, + { /* 1174 */ + 61, + /* ROL64mCL */ + }, + { /* 1175 */ 148, /* ROL64mi */ }, - { /* 1169 */ + { /* 1176 */ 79, /* ROL64r1 */ }, - { /* 1170 */ + { /* 1177 */ 79, /* ROL64rCL */ }, - { /* 1171 */ + { /* 1178 */ 150, /* ROL64ri */ }, - { /* 1172 */ + { /* 1179 */ 80, /* ROL8m1 */ }, - { /* 1173 */ + { /* 1180 */ 80, /* ROL8mCL */ }, - { /* 1174 */ - 22, + { /* 1181 */ + 23, /* ROL8mi */ }, - { /* 1175 */ + { /* 1182 */ 81, /* ROL8r1 */ }, - { /* 1176 */ + { /* 1183 */ 81, /* ROL8rCL */ }, - { /* 1177 */ - 24, - /* ROL8ri */ - }, - { /* 1178 */ - 61, - /* ROR16m1 */ - }, - { /* 1179 */ - 61, - /* ROR16mCL */ - }, - { /* 1180 */ - 148, - /* ROR16mi */ - }, - { /* 1181 */ - 78, - /* ROR16r1 */ - }, - { /* 1182 */ - 78, - /* ROR16rCL */ - }, - { /* 1183 */ - 149, - /* ROR16ri */ - }, { /* 1184 */ - 61, - /* ROR32m1 */ + 22, + /* ROL8ri */ }, { /* 1185 */ 61, - /* ROR32mCL */ + /* ROR16m1 */ }, { /* 1186 */ - 148, - /* ROR32mi */ + 61, + /* ROR16mCL */ }, { /* 1187 */ - 78, - /* ROR32r1 */ + 148, + /* ROR16mi */ }, { /* 1188 */ 78, - /* ROR32rCL */ + /* ROR16r1 */ }, { /* 1189 */ - 149, - /* ROR32ri */ + 78, + /* ROR16rCL */ }, { /* 1190 */ - 61, - /* ROR64m1 */ + 149, + /* ROR16ri */ }, { /* 1191 */ 61, - /* ROR64mCL */ + /* ROR32m1 */ }, { /* 1192 */ + 61, + /* ROR32mCL */ + }, + { /* 1193 */ + 148, + /* ROR32mi */ + }, + { /* 1194 */ + 78, + /* ROR32r1 */ + }, + { /* 1195 */ + 78, + /* ROR32rCL */ + }, + { /* 1196 */ + 149, + /* ROR32ri */ + }, + { /* 1197 */ + 61, + /* ROR64m1 */ + }, + { /* 1198 */ + 61, + /* ROR64mCL */ + }, + { /* 1199 */ 148, /* ROR64mi */ }, - { /* 1193 */ + { /* 1200 */ 79, /* ROR64r1 */ }, - { /* 1194 */ + { /* 1201 */ 79, /* ROR64rCL */ }, - { /* 1195 */ + { /* 1202 */ 150, /* ROR64ri */ }, - { /* 1196 */ + { /* 1203 */ 80, /* ROR8m1 */ }, - { /* 1197 */ + { /* 1204 */ 80, /* ROR8mCL */ }, - { /* 1198 */ - 22, + { /* 1205 */ + 23, /* ROR8mi */ }, - { /* 1199 */ + { /* 1206 */ 81, /* ROR8r1 */ }, - { /* 1200 */ + { /* 1207 */ 81, /* ROR8rCL */ }, - { /* 1201 */ - 24, + { /* 1208 */ + 22, /* ROR8ri */ }, - { /* 1202 */ + { /* 1209 */ 152, /* RORX32mi */ }, - { /* 1203 */ + { /* 1210 */ 153, /* RORX32ri */ }, - { /* 1204 */ + { /* 1211 */ 154, /* RORX64mi */ }, - { /* 1205 */ + { /* 1212 */ 155, /* RORX64ri */ }, - { /* 1206 */ + { /* 1213 */ 0, /* RSM */ }, - { /* 1207 */ + { /* 1214 */ 0, /* SAHF */ }, - { /* 1208 */ + { /* 1215 */ 61, /* SAL16m1 */ }, - { /* 1209 */ + { /* 1216 */ 61, /* SAL16mCL */ }, - { /* 1210 */ + { /* 1217 */ 148, /* SAL16mi */ }, - { /* 1211 */ + { /* 1218 */ 78, /* SAL16r1 */ }, - { /* 1212 */ + { /* 1219 */ 78, /* SAL16rCL */ }, - { /* 1213 */ + { /* 1220 */ 149, /* SAL16ri */ }, - { /* 1214 */ + { /* 1221 */ 61, /* SAL32m1 */ }, - { /* 1215 */ + { /* 1222 */ 61, /* SAL32mCL */ }, - { /* 1216 */ + { /* 1223 */ 148, /* SAL32mi */ }, - { /* 1217 */ + { /* 1224 */ 78, /* SAL32r1 */ }, - { /* 1218 */ + { /* 1225 */ 78, /* SAL32rCL */ }, - { /* 1219 */ + { /* 1226 */ 149, /* SAL32ri */ }, - { /* 1220 */ + { /* 1227 */ 61, /* SAL64m1 */ }, - { /* 1221 */ + { /* 1228 */ 61, /* SAL64mCL */ }, - { /* 1222 */ + { /* 1229 */ 148, /* SAL64mi */ }, - { /* 1223 */ + { /* 1230 */ 79, /* SAL64r1 */ }, - { /* 1224 */ + { /* 1231 */ 79, /* SAL64rCL */ }, - { /* 1225 */ + { /* 1232 */ 150, /* SAL64ri */ }, - { /* 1226 */ + { /* 1233 */ 80, /* SAL8m1 */ }, - { /* 1227 */ + { /* 1234 */ 80, /* SAL8mCL */ }, - { /* 1228 */ - 22, + { /* 1235 */ + 23, /* SAL8mi */ }, - { /* 1229 */ + { /* 1236 */ 81, /* SAL8r1 */ }, - { /* 1230 */ + { /* 1237 */ 81, /* SAL8rCL */ }, - { /* 1231 */ - 24, + { /* 1238 */ + 22, /* SAL8ri */ }, - { /* 1232 */ + { /* 1239 */ 0, /* SALC */ }, - { /* 1233 */ + { /* 1240 */ 61, /* SAR16m1 */ }, - { /* 1234 */ + { /* 1241 */ 61, /* SAR16mCL */ }, - { /* 1235 */ + { /* 1242 */ 148, /* SAR16mi */ }, - { /* 1236 */ + { /* 1243 */ 78, /* SAR16r1 */ }, - { /* 1237 */ + { /* 1244 */ 78, /* SAR16rCL */ }, - { /* 1238 */ + { /* 1245 */ 149, /* SAR16ri */ }, - { /* 1239 */ + { /* 1246 */ 61, /* SAR32m1 */ }, - { /* 1240 */ + { /* 1247 */ 61, /* SAR32mCL */ }, - { /* 1241 */ + { /* 1248 */ 148, /* SAR32mi */ }, - { /* 1242 */ + { /* 1249 */ 78, /* SAR32r1 */ }, - { /* 1243 */ + { /* 1250 */ 78, /* SAR32rCL */ }, - { /* 1244 */ + { /* 1251 */ 149, /* SAR32ri */ }, - { /* 1245 */ + { /* 1252 */ 61, /* SAR64m1 */ }, - { /* 1246 */ + { /* 1253 */ 61, /* SAR64mCL */ }, - { /* 1247 */ + { /* 1254 */ 148, /* SAR64mi */ }, - { /* 1248 */ + { /* 1255 */ 79, /* SAR64r1 */ }, - { /* 1249 */ + { /* 1256 */ 79, /* SAR64rCL */ }, - { /* 1250 */ + { /* 1257 */ 150, /* SAR64ri */ }, - { /* 1251 */ + { /* 1258 */ 80, /* SAR8m1 */ }, - { /* 1252 */ + { /* 1259 */ 80, /* SAR8mCL */ }, - { /* 1253 */ - 22, + { /* 1260 */ + 23, /* SAR8mi */ }, - { /* 1254 */ + { /* 1261 */ 81, /* SAR8r1 */ }, - { /* 1255 */ + { /* 1262 */ 81, /* SAR8rCL */ }, - { /* 1256 */ - 24, + { /* 1263 */ + 22, /* SAR8ri */ }, - { /* 1257 */ + { /* 1264 */ 40, /* SARX32rm */ }, - { /* 1258 */ + { /* 1265 */ 41, /* SARX32rr */ }, - { /* 1259 */ + { /* 1266 */ 42, /* SARX64rm */ }, - { /* 1260 */ + { /* 1267 */ 43, /* SARX64rr */ }, - { /* 1261 */ + { /* 1268 */ 2, /* SBB16i16 */ }, - { /* 1262 */ + { /* 1269 */ 3, /* SBB16mi */ }, - { /* 1263 */ + { /* 1270 */ 4, /* SBB16mi8 */ }, - { /* 1264 */ + { /* 1271 */ 5, /* SBB16mr */ }, - { /* 1265 */ + { /* 1272 */ 6, /* SBB16ri */ }, - { /* 1266 */ + { /* 1273 */ 7, /* SBB16ri8 */ }, - { /* 1267 */ + { /* 1274 */ 8, /* SBB16rm */ }, - { /* 1268 */ + { /* 1275 */ 9, /* SBB16rr */ }, - { /* 1269 */ + { /* 1276 */ 10, /* SBB16rr_REV */ }, - { /* 1270 */ + { /* 1277 */ 2, /* SBB32i32 */ }, - { /* 1271 */ + { /* 1278 */ 3, /* SBB32mi */ }, - { /* 1272 */ + { /* 1279 */ 11, /* SBB32mi8 */ }, - { /* 1273 */ + { /* 1280 */ 5, /* SBB32mr */ }, - { /* 1274 */ + { /* 1281 */ 6, /* SBB32ri */ }, - { /* 1275 */ + { /* 1282 */ 12, /* SBB32ri8 */ }, - { /* 1276 */ + { /* 1283 */ 8, /* SBB32rm */ }, - { /* 1277 */ + { /* 1284 */ 9, /* SBB32rr */ }, - { /* 1278 */ + { /* 1285 */ 10, /* SBB32rr_REV */ }, - { /* 1279 */ + { /* 1286 */ 13, /* SBB64i32 */ }, - { /* 1280 */ + { /* 1287 */ 14, /* SBB64mi32 */ }, - { /* 1281 */ + { /* 1288 */ 15, /* SBB64mi8 */ }, - { /* 1282 */ + { /* 1289 */ 16, /* SBB64mr */ }, - { /* 1283 */ + { /* 1290 */ 17, /* SBB64ri32 */ }, - { /* 1284 */ + { /* 1291 */ 18, /* SBB64ri8 */ }, - { /* 1285 */ + { /* 1292 */ 19, /* SBB64rm */ }, - { /* 1286 */ + { /* 1293 */ 20, /* SBB64rr */ }, - { /* 1287 */ + { /* 1294 */ 21, /* SBB64rr_REV */ }, - { /* 1288 */ + { /* 1295 */ + 22, + /* SBB82_8ri8 */ + }, + { /* 1296 */ 1, /* SBB8i8 */ }, - { /* 1289 */ - 22, + { /* 1297 */ + 23, /* SBB8mi */ }, - { /* 1290 */ + { /* 1298 */ 23, + /* SBB8mi8 */ + }, + { /* 1299 */ + 24, /* SBB8mr */ }, - { /* 1291 */ - 24, + { /* 1300 */ + 22, /* SBB8ri */ }, - { /* 1292 */ + { /* 1301 */ 25, /* SBB8rm */ }, - { /* 1293 */ + { /* 1302 */ 26, /* SBB8rr */ }, - { /* 1294 */ + { /* 1303 */ 27, /* SBB8rr_REV */ }, - { /* 1295 */ + { /* 1304 */ 97, /* SCASB */ }, - { /* 1296 */ + { /* 1305 */ 98, /* SCASL */ }, - { /* 1297 */ + { /* 1306 */ 156, /* SCASQ */ }, - { /* 1298 */ + { /* 1307 */ 99, /* SCASW */ }, - { /* 1299 */ - 0, - /* */ - }, - { /* 1300 */ - 0, - /* */ - }, - { /* 1301 */ - 0, - /* */ - }, - { /* 1302 */ - 0, - /* */ - }, - { /* 1303 */ - 0, - /* */ - }, - { /* 1304 */ - 0, - /* */ - }, - { /* 1305 */ - 0, - /* */ - }, - { /* 1306 */ - 0, - /* */ - }, - { /* 1307 */ - 0, - /* */ - }, { /* 1308 */ 0, /* */ }, { /* 1309 */ - 80, - /* SETAEm */ + 0, + /* */ }, { /* 1310 */ - 82, - /* SETAEr */ + 0, + /* */ }, { /* 1311 */ - 80, - /* SETAm */ + 0, + /* */ }, { /* 1312 */ - 82, - /* SETAr */ + 0, + /* */ }, { /* 1313 */ - 80, - /* SETBEm */ + 0, + /* */ }, { /* 1314 */ - 82, - /* SETBEr */ + 0, + /* */ }, { /* 1315 */ 0, @@ -7884,773 +7884,773 @@ static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = /* */ }, { /* 1318 */ + 80, + /* SETAEm */ + }, + { /* 1319 */ + 82, + /* SETAEr */ + }, + { /* 1320 */ + 80, + /* SETAm */ + }, + { /* 1321 */ + 82, + /* SETAr */ + }, + { /* 1322 */ + 80, + /* SETBEm */ + }, + { /* 1323 */ + 82, + /* SETBEr */ + }, + { /* 1324 */ 0, /* */ }, - { /* 1319 */ + { /* 1325 */ + 0, + /* */ + }, + { /* 1326 */ + 0, + /* */ + }, + { /* 1327 */ + 0, + /* */ + }, + { /* 1328 */ 80, /* SETBm */ }, - { /* 1320 */ + { /* 1329 */ 82, /* SETBr */ }, - { /* 1321 */ + { /* 1330 */ 80, /* SETEm */ }, - { /* 1322 */ + { /* 1331 */ 82, /* SETEr */ }, - { /* 1323 */ + { /* 1332 */ 80, /* SETGEm */ }, - { /* 1324 */ + { /* 1333 */ 82, /* SETGEr */ }, - { /* 1325 */ + { /* 1334 */ 80, /* SETGm */ }, - { /* 1326 */ + { /* 1335 */ 82, /* SETGr */ }, - { /* 1327 */ + { /* 1336 */ 80, /* SETLEm */ }, - { /* 1328 */ + { /* 1337 */ 82, /* SETLEr */ }, - { /* 1329 */ + { /* 1338 */ 80, /* SETLm */ }, - { /* 1330 */ + { /* 1339 */ 82, /* SETLr */ }, - { /* 1331 */ + { /* 1340 */ 80, /* SETNEm */ }, - { /* 1332 */ + { /* 1341 */ 82, /* SETNEr */ }, - { /* 1333 */ + { /* 1342 */ 80, /* SETNOm */ }, - { /* 1334 */ + { /* 1343 */ 82, /* SETNOr */ }, - { /* 1335 */ + { /* 1344 */ 80, /* SETNPm */ }, - { /* 1336 */ + { /* 1345 */ 82, /* SETNPr */ }, - { /* 1337 */ + { /* 1346 */ 80, /* SETNSm */ }, - { /* 1338 */ + { /* 1347 */ 82, /* SETNSr */ }, - { /* 1339 */ + { /* 1348 */ 80, /* SETOm */ }, - { /* 1340 */ + { /* 1349 */ 82, /* SETOr */ }, - { /* 1341 */ + { /* 1350 */ 80, /* SETPm */ }, - { /* 1342 */ + { /* 1351 */ 82, /* SETPr */ }, - { /* 1343 */ + { /* 1352 */ 80, /* SETSm */ }, - { /* 1344 */ + { /* 1353 */ 82, /* SETSr */ }, - { /* 1345 */ + { /* 1354 */ 87, /* SGDT16m */ }, - { /* 1346 */ + { /* 1355 */ 87, /* SGDT32m */ }, - { /* 1347 */ + { /* 1356 */ 88, /* SGDT64m */ }, - { /* 1348 */ + { /* 1357 */ 61, /* SHL16m1 */ }, - { /* 1349 */ + { /* 1358 */ 61, /* SHL16mCL */ }, - { /* 1350 */ + { /* 1359 */ 148, /* SHL16mi */ }, - { /* 1351 */ + { /* 1360 */ 78, /* SHL16r1 */ }, - { /* 1352 */ + { /* 1361 */ 78, /* SHL16rCL */ }, - { /* 1353 */ + { /* 1362 */ 149, /* SHL16ri */ }, - { /* 1354 */ + { /* 1363 */ 61, /* SHL32m1 */ }, - { /* 1355 */ + { /* 1364 */ 61, /* SHL32mCL */ }, - { /* 1356 */ + { /* 1365 */ 148, /* SHL32mi */ }, - { /* 1357 */ + { /* 1366 */ 78, /* SHL32r1 */ }, - { /* 1358 */ + { /* 1367 */ 78, /* SHL32rCL */ }, - { /* 1359 */ + { /* 1368 */ 149, /* SHL32ri */ }, - { /* 1360 */ + { /* 1369 */ 61, /* SHL64m1 */ }, - { /* 1361 */ + { /* 1370 */ 61, /* SHL64mCL */ }, - { /* 1362 */ + { /* 1371 */ 148, /* SHL64mi */ }, - { /* 1363 */ + { /* 1372 */ 79, /* SHL64r1 */ }, - { /* 1364 */ + { /* 1373 */ 79, /* SHL64rCL */ }, - { /* 1365 */ + { /* 1374 */ 150, /* SHL64ri */ }, - { /* 1366 */ + { /* 1375 */ 80, /* SHL8m1 */ }, - { /* 1367 */ + { /* 1376 */ 80, /* SHL8mCL */ }, - { /* 1368 */ - 22, + { /* 1377 */ + 23, /* SHL8mi */ }, - { /* 1369 */ + { /* 1378 */ 81, /* SHL8r1 */ }, - { /* 1370 */ + { /* 1379 */ 81, /* SHL8rCL */ }, - { /* 1371 */ - 24, + { /* 1380 */ + 22, /* SHL8ri */ }, - { /* 1372 */ + { /* 1381 */ 5, /* SHLD16mrCL */ }, - { /* 1373 */ + { /* 1382 */ 157, /* SHLD16mri8 */ }, - { /* 1374 */ + { /* 1383 */ 9, /* SHLD16rrCL */ }, - { /* 1375 */ + { /* 1384 */ 158, /* SHLD16rri8 */ }, - { /* 1376 */ + { /* 1385 */ 5, /* SHLD32mrCL */ }, - { /* 1377 */ + { /* 1386 */ 157, /* SHLD32mri8 */ }, - { /* 1378 */ + { /* 1387 */ 9, /* SHLD32rrCL */ }, - { /* 1379 */ + { /* 1388 */ 158, /* SHLD32rri8 */ }, - { /* 1380 */ + { /* 1389 */ 16, /* SHLD64mrCL */ }, - { /* 1381 */ + { /* 1390 */ 159, /* SHLD64mri8 */ }, - { /* 1382 */ + { /* 1391 */ 20, /* SHLD64rrCL */ }, - { /* 1383 */ + { /* 1392 */ 160, /* SHLD64rri8 */ }, - { /* 1384 */ + { /* 1393 */ 40, /* SHLX32rm */ }, - { /* 1385 */ + { /* 1394 */ 41, /* SHLX32rr */ }, - { /* 1386 */ + { /* 1395 */ 42, /* SHLX64rm */ }, - { /* 1387 */ + { /* 1396 */ 43, /* SHLX64rr */ }, - { /* 1388 */ + { /* 1397 */ 61, /* SHR16m1 */ }, - { /* 1389 */ + { /* 1398 */ 61, /* SHR16mCL */ }, - { /* 1390 */ + { /* 1399 */ 148, /* SHR16mi */ }, - { /* 1391 */ + { /* 1400 */ 78, /* SHR16r1 */ }, - { /* 1392 */ + { /* 1401 */ 78, /* SHR16rCL */ }, - { /* 1393 */ + { /* 1402 */ 149, /* SHR16ri */ }, - { /* 1394 */ + { /* 1403 */ 61, /* SHR32m1 */ }, - { /* 1395 */ + { /* 1404 */ 61, /* SHR32mCL */ }, - { /* 1396 */ + { /* 1405 */ 148, /* SHR32mi */ }, - { /* 1397 */ + { /* 1406 */ 78, /* SHR32r1 */ }, - { /* 1398 */ + { /* 1407 */ 78, /* SHR32rCL */ }, - { /* 1399 */ + { /* 1408 */ 149, /* SHR32ri */ }, - { /* 1400 */ + { /* 1409 */ 61, /* SHR64m1 */ }, - { /* 1401 */ + { /* 1410 */ 61, /* SHR64mCL */ }, - { /* 1402 */ + { /* 1411 */ 148, /* SHR64mi */ }, - { /* 1403 */ + { /* 1412 */ 79, /* SHR64r1 */ }, - { /* 1404 */ + { /* 1413 */ 79, /* SHR64rCL */ }, - { /* 1405 */ + { /* 1414 */ 150, /* SHR64ri */ }, - { /* 1406 */ + { /* 1415 */ 80, /* SHR8m1 */ }, - { /* 1407 */ + { /* 1416 */ 80, /* SHR8mCL */ }, - { /* 1408 */ - 22, + { /* 1417 */ + 23, /* SHR8mi */ }, - { /* 1409 */ + { /* 1418 */ 81, /* SHR8r1 */ }, - { /* 1410 */ + { /* 1419 */ 81, /* SHR8rCL */ }, - { /* 1411 */ - 24, + { /* 1420 */ + 22, /* SHR8ri */ }, - { /* 1412 */ + { /* 1421 */ 5, /* SHRD16mrCL */ }, - { /* 1413 */ + { /* 1422 */ 157, /* SHRD16mri8 */ }, - { /* 1414 */ + { /* 1423 */ 9, /* SHRD16rrCL */ }, - { /* 1415 */ + { /* 1424 */ 158, /* SHRD16rri8 */ }, - { /* 1416 */ + { /* 1425 */ 5, /* SHRD32mrCL */ }, - { /* 1417 */ + { /* 1426 */ 157, /* SHRD32mri8 */ }, - { /* 1418 */ + { /* 1427 */ 9, /* SHRD32rrCL */ }, - { /* 1419 */ + { /* 1428 */ 158, /* SHRD32rri8 */ }, - { /* 1420 */ + { /* 1429 */ 16, /* SHRD64mrCL */ }, - { /* 1421 */ + { /* 1430 */ 159, /* SHRD64mri8 */ }, - { /* 1422 */ + { /* 1431 */ 20, /* SHRD64rrCL */ }, - { /* 1423 */ + { /* 1432 */ 160, /* SHRD64rri8 */ }, - { /* 1424 */ + { /* 1433 */ 40, /* SHRX32rm */ }, - { /* 1425 */ + { /* 1434 */ 41, /* SHRX32rr */ }, - { /* 1426 */ + { /* 1435 */ 42, /* SHRX64rm */ }, - { /* 1427 */ + { /* 1436 */ 43, /* SHRX64rr */ }, - { /* 1428 */ + { /* 1437 */ 87, /* SIDT16m */ }, - { /* 1429 */ + { /* 1438 */ 87, /* SIDT32m */ }, - { /* 1430 */ + { /* 1439 */ 88, /* SIDT64m */ }, - { /* 1431 */ + { /* 1440 */ 0, /* SKINIT */ }, - { /* 1432 */ + { /* 1441 */ 61, /* SLDT16m */ }, - { /* 1433 */ + { /* 1442 */ 62, /* SLDT16r */ }, - { /* 1434 */ + { /* 1443 */ 62, /* SLDT32r */ }, - { /* 1435 */ + { /* 1444 */ 61, /* SLDT64m */ }, - { /* 1436 */ + { /* 1445 */ 64, /* SLDT64r */ }, - { /* 1437 */ + { /* 1446 */ 61, /* SMSW16m */ }, - { /* 1438 */ + { /* 1447 */ 62, /* SMSW16r */ }, - { /* 1439 */ + { /* 1448 */ 62, /* SMSW32r */ }, - { /* 1440 */ + { /* 1449 */ 64, /* SMSW64r */ }, - { /* 1441 */ + { /* 1450 */ 0, /* STAC */ }, - { /* 1442 */ + { /* 1451 */ 0, /* STC */ }, - { /* 1443 */ + { /* 1452 */ 0, /* STD */ }, - { /* 1444 */ + { /* 1453 */ 0, /* STGI */ }, - { /* 1445 */ + { /* 1454 */ 0, /* STI */ }, - { /* 1446 */ + { /* 1455 */ 97, /* STOSB */ }, - { /* 1447 */ + { /* 1456 */ 98, /* STOSL */ }, - { /* 1448 */ + { /* 1457 */ 156, /* STOSQ */ }, - { /* 1449 */ + { /* 1458 */ 99, /* STOSW */ }, - { /* 1450 */ + { /* 1459 */ 62, /* STR16r */ }, - { /* 1451 */ + { /* 1460 */ 62, /* STR32r */ }, - { /* 1452 */ + { /* 1461 */ 64, /* STR64r */ }, - { /* 1453 */ + { /* 1462 */ 61, /* STRm */ }, - { /* 1454 */ + { /* 1463 */ 2, /* SUB16i16 */ }, - { /* 1455 */ + { /* 1464 */ 3, /* SUB16mi */ }, - { /* 1456 */ + { /* 1465 */ 4, /* SUB16mi8 */ }, - { /* 1457 */ + { /* 1466 */ 5, /* SUB16mr */ }, - { /* 1458 */ + { /* 1467 */ 6, /* SUB16ri */ }, - { /* 1459 */ + { /* 1468 */ 7, /* SUB16ri8 */ }, - { /* 1460 */ + { /* 1469 */ 8, /* SUB16rm */ }, - { /* 1461 */ + { /* 1470 */ 9, /* SUB16rr */ }, - { /* 1462 */ + { /* 1471 */ 10, /* SUB16rr_REV */ }, - { /* 1463 */ + { /* 1472 */ 2, /* SUB32i32 */ }, - { /* 1464 */ + { /* 1473 */ 3, /* SUB32mi */ }, - { /* 1465 */ + { /* 1474 */ 11, /* SUB32mi8 */ }, - { /* 1466 */ + { /* 1475 */ 5, /* SUB32mr */ }, - { /* 1467 */ + { /* 1476 */ 6, /* SUB32ri */ }, - { /* 1468 */ + { /* 1477 */ 12, /* SUB32ri8 */ }, - { /* 1469 */ + { /* 1478 */ 8, /* SUB32rm */ }, - { /* 1470 */ + { /* 1479 */ 9, /* SUB32rr */ }, - { /* 1471 */ + { /* 1480 */ 10, /* SUB32rr_REV */ }, - { /* 1472 */ + { /* 1481 */ 13, /* SUB64i32 */ }, - { /* 1473 */ + { /* 1482 */ 14, /* SUB64mi32 */ }, - { /* 1474 */ + { /* 1483 */ 15, /* SUB64mi8 */ }, - { /* 1475 */ + { /* 1484 */ 16, /* SUB64mr */ }, - { /* 1476 */ + { /* 1485 */ 17, /* SUB64ri32 */ }, - { /* 1477 */ + { /* 1486 */ 18, /* SUB64ri8 */ }, - { /* 1478 */ + { /* 1487 */ 19, /* SUB64rm */ }, - { /* 1479 */ + { /* 1488 */ 20, /* SUB64rr */ }, - { /* 1480 */ + { /* 1489 */ 21, /* SUB64rr_REV */ }, - { /* 1481 */ + { /* 1490 */ + 23, + /* SUB82_8mi8 */ + }, + { /* 1491 */ + 22, + /* SUB82_8ri8 */ + }, + { /* 1492 */ 1, /* SUB8i8 */ }, - { /* 1482 */ - 22, + { /* 1493 */ + 23, /* SUB8mi */ }, - { /* 1483 */ - 23, + { /* 1494 */ + 24, /* SUB8mr */ }, - { /* 1484 */ - 24, + { /* 1495 */ + 22, /* SUB8ri */ }, - { /* 1485 */ - 24, - /* SUB8ri8 */ - }, - { /* 1486 */ + { /* 1496 */ 25, /* SUB8rm */ }, - { /* 1487 */ + { /* 1497 */ 26, /* SUB8rr */ }, - { /* 1488 */ + { /* 1498 */ 27, /* SUB8rr_REV */ }, - { /* 1489 */ + { /* 1499 */ 0, /* SWAPGS */ }, - { /* 1490 */ + { /* 1500 */ 0, /* SYSCALL */ }, - { /* 1491 */ + { /* 1501 */ 0, /* SYSENTER */ }, - { /* 1492 */ + { /* 1502 */ 0, /* SYSEXIT */ }, - { /* 1493 */ + { /* 1503 */ 0, /* SYSEXIT64 */ }, - { /* 1494 */ + { /* 1504 */ 0, /* SYSRET */ }, - { /* 1495 */ + { /* 1505 */ 0, /* SYSRET64 */ }, - { /* 1496 */ + { /* 1506 */ 48, /* T1MSKC32rm */ }, - { /* 1497 */ + { /* 1507 */ 49, /* T1MSKC32rr */ }, - { /* 1498 */ + { /* 1508 */ 50, /* T1MSKC64rm */ }, - { /* 1499 */ + { /* 1509 */ 51, /* T1MSKC64rr */ }, - { /* 1500 */ - 0, - /* */ - }, - { /* 1501 */ - 0, - /* */ - }, - { /* 1502 */ - 0, - /* */ - }, - { /* 1503 */ - 0, - /* */ - }, - { /* 1504 */ - 0, - /* */ - }, - { /* 1505 */ - 0, - /* */ - }, - { /* 1506 */ - 0, - /* */ - }, - { /* 1507 */ - 0, - /* */ - }, - { /* 1508 */ - 0, - /* */ - }, - { /* 1509 */ - 0, - /* */ - }, { /* 1510 */ 0, /* */ @@ -8660,638 +8660,682 @@ static const struct InstructionSpecifier x86DisassemblerInstrSpecifiers[1671] = /* */ }, { /* 1512 */ + 0, + /* */ + }, + { /* 1513 */ + 0, + /* */ + }, + { /* 1514 */ + 0, + /* */ + }, + { /* 1515 */ + 0, + /* */ + }, + { /* 1516 */ + 0, + /* */ + }, + { /* 1517 */ + 0, + /* */ + }, + { /* 1518 */ + 0, + /* */ + }, + { /* 1519 */ + 0, + /* */ + }, + { /* 1520 */ + 0, + /* */ + }, + { /* 1521 */ + 0, + /* */ + }, + { /* 1522 */ 2, /* TEST16i16 */ }, - { /* 1513 */ + { /* 1523 */ 3, /* TEST16mi */ }, - { /* 1514 */ + { /* 1524 */ 3, /* TEST16mi_alt */ }, - { /* 1515 */ + { /* 1525 */ 67, /* TEST16ri */ }, - { /* 1516 */ + { /* 1526 */ 67, /* TEST16ri_alt */ }, - { /* 1517 */ + { /* 1527 */ 5, /* TEST16rm */ }, - { /* 1518 */ + { /* 1528 */ 53, /* TEST16rr */ }, - { /* 1519 */ + { /* 1529 */ 2, /* TEST32i32 */ }, - { /* 1520 */ + { /* 1530 */ 3, /* TEST32mi */ }, - { /* 1521 */ + { /* 1531 */ 3, /* TEST32mi_alt */ }, - { /* 1522 */ + { /* 1532 */ 67, /* TEST32ri */ }, - { /* 1523 */ + { /* 1533 */ 67, /* TEST32ri_alt */ }, - { /* 1524 */ + { /* 1534 */ 5, /* TEST32rm */ }, - { /* 1525 */ + { /* 1535 */ 53, /* TEST32rr */ }, - { /* 1526 */ + { /* 1536 */ 13, /* TEST64i32 */ }, - { /* 1527 */ + { /* 1537 */ 14, /* TEST64mi32 */ }, - { /* 1528 */ + { /* 1538 */ 14, /* TEST64mi32_alt */ }, - { /* 1529 */ + { /* 1539 */ 68, /* TEST64ri32 */ }, - { /* 1530 */ + { /* 1540 */ 68, /* TEST64ri32_alt */ }, - { /* 1531 */ + { /* 1541 */ 16, /* TEST64rm */ }, - { /* 1532 */ + { /* 1542 */ 33, /* TEST64rr */ }, - { /* 1533 */ + { /* 1543 */ 1, /* TEST8i8 */ }, - { /* 1534 */ - 22, + { /* 1544 */ + 23, /* TEST8mi */ }, - { /* 1535 */ - 22, + { /* 1545 */ + 23, /* TEST8mi_alt */ }, - { /* 1536 */ + { /* 1546 */ 69, /* TEST8ri */ }, - { /* 1537 */ + { /* 1547 */ 0, /* */ }, - { /* 1538 */ + { /* 1548 */ 69, /* TEST8ri_alt */ }, - { /* 1539 */ - 23, + { /* 1549 */ + 24, /* TEST8rm */ }, - { /* 1540 */ + { /* 1550 */ 72, /* TEST8rr */ }, - { /* 1541 */ + { /* 1551 */ 0, /* */ }, - { /* 1542 */ + { /* 1552 */ 0, /* */ }, - { /* 1543 */ + { /* 1553 */ 0, /* */ }, - { /* 1544 */ + { /* 1554 */ 0, /* */ }, - { /* 1545 */ + { /* 1555 */ 0, /* */ }, - { /* 1546 */ + { /* 1556 */ 0, /* */ }, - { /* 1547 */ + { /* 1557 */ 0, /* TRAP */ }, - { /* 1548 */ + { /* 1558 */ 52, /* TZCNT16rm */ }, - { /* 1549 */ + { /* 1559 */ 53, /* TZCNT16rr */ }, - { /* 1550 */ + { /* 1560 */ 52, /* TZCNT32rm */ }, - { /* 1551 */ + { /* 1561 */ 53, /* TZCNT32rr */ }, - { /* 1552 */ + { /* 1562 */ 32, /* TZCNT64rm */ }, - { /* 1553 */ + { /* 1563 */ 33, /* TZCNT64rr */ }, - { /* 1554 */ + { /* 1564 */ 48, /* TZMSK32rm */ }, - { /* 1555 */ + { /* 1565 */ 49, /* TZMSK32rr */ }, - { /* 1556 */ + { /* 1566 */ 50, /* TZMSK64rm */ }, - { /* 1557 */ + { /* 1567 */ 51, /* TZMSK64rr */ }, - { /* 1558 */ + { /* 1568 */ 0, /* UD2B */ }, - { /* 1559 */ - 0, - /* */ - }, - { /* 1560 */ - 0, - /* */ - }, - { /* 1561 */ - 61, - /* VERRm */ - }, - { /* 1562 */ - 110, - /* VERRr */ - }, - { /* 1563 */ - 61, - /* VERWm */ - }, - { /* 1564 */ - 110, - /* VERWr */ - }, - { /* 1565 */ - 0, - /* VMCALL */ - }, - { /* 1566 */ - 61, - /* VMCLEARm */ - }, - { /* 1567 */ - 0, - /* VMFUNC */ - }, - { /* 1568 */ - 0, - /* VMLAUNCH */ - }, { /* 1569 */ 0, - /* VMLOAD32 */ + /* */ }, { /* 1570 */ 0, - /* VMLOAD64 */ + /* */ }, { /* 1571 */ - 0, - /* VMMCALL */ + 61, + /* VERRm */ }, { /* 1572 */ - 61, - /* VMPTRLDm */ + 110, + /* VERRr */ }, { /* 1573 */ 61, - /* VMPTRSTm */ + /* VERWm */ }, { /* 1574 */ - 161, - /* VMREAD32rm */ + 110, + /* VERWr */ }, { /* 1575 */ - 162, - /* VMREAD32rr */ + 0, + /* VMCALL */ }, { /* 1576 */ - 16, - /* VMREAD64rm */ + 61, + /* VMCLEARm */ }, { /* 1577 */ - 60, - /* VMREAD64rr */ + 0, + /* VMFUNC */ }, { /* 1578 */ 0, - /* VMRESUME */ + /* VMLAUNCH */ }, { /* 1579 */ 0, - /* VMRUN32 */ + /* VMLOAD32 */ }, { /* 1580 */ 0, - /* VMRUN64 */ + /* VMLOAD64 */ }, { /* 1581 */ 0, - /* VMSAVE32 */ + /* VMMCALL */ }, { /* 1582 */ - 0, - /* VMSAVE64 */ + 61, + /* VMPTRLDm */ }, { /* 1583 */ - 30, - /* VMWRITE32rm */ + 61, + /* VMPTRSTm */ }, { /* 1584 */ - 31, - /* VMWRITE32rr */ + 161, + /* VMREAD32rm */ }, { /* 1585 */ - 32, - /* VMWRITE64rm */ + 162, + /* VMREAD32rr */ }, { /* 1586 */ - 33, - /* VMWRITE64rr */ + 16, + /* VMREAD64rm */ }, { /* 1587 */ - 0, - /* VMXOFF */ + 60, + /* VMREAD64rr */ }, { /* 1588 */ - 61, - /* VMXON */ + 0, + /* VMRESUME */ }, { /* 1589 */ 0, - /* */ + /* VMRUN32 */ }, { /* 1590 */ 0, - /* WBINVD */ + /* VMRUN64 */ }, { /* 1591 */ 0, - /* */ + /* VMSAVE32 */ }, { /* 1592 */ 0, - /* */ + /* VMSAVE64 */ }, { /* 1593 */ + 30, + /* VMWRITE32rm */ + }, + { /* 1594 */ + 31, + /* VMWRITE32rr */ + }, + { /* 1595 */ + 32, + /* VMWRITE64rm */ + }, + { /* 1596 */ + 33, + /* VMWRITE64rr */ + }, + { /* 1597 */ + 0, + /* VMXOFF */ + }, + { /* 1598 */ + 61, + /* VMXON */ + }, + { /* 1599 */ 0, /* */ }, - { /* 1594 */ + { /* 1600 */ + 0, + /* WBINVD */ + }, + { /* 1601 */ + 0, + /* */ + }, + { /* 1602 */ + 0, + /* */ + }, + { /* 1603 */ + 0, + /* */ + }, + { /* 1604 */ 151, /* WRFSBASE */ }, - { /* 1595 */ + { /* 1605 */ 64, /* WRFSBASE64 */ }, - { /* 1596 */ + { /* 1606 */ 151, /* WRGSBASE */ }, - { /* 1597 */ + { /* 1607 */ 64, /* WRGSBASE64 */ }, - { /* 1598 */ + { /* 1608 */ 0, /* WRMSR */ }, - { /* 1599 */ + { /* 1609 */ 5, /* XADD16rm */ }, - { /* 1600 */ + { /* 1610 */ 57, /* XADD16rr */ }, - { /* 1601 */ + { /* 1611 */ 5, /* XADD32rm */ }, - { /* 1602 */ + { /* 1612 */ 57, /* XADD32rr */ }, - { /* 1603 */ + { /* 1613 */ 16, /* XADD64rm */ }, - { /* 1604 */ + { /* 1614 */ 60, /* XADD64rr */ }, - { /* 1605 */ - 23, + { /* 1615 */ + 24, /* XADD8rm */ }, - { /* 1606 */ + { /* 1616 */ 71, /* XADD8rr */ }, - { /* 1607 */ + { /* 1617 */ 143, /* XCHG16ar */ }, - { /* 1608 */ + { /* 1618 */ 8, /* XCHG16rm */ }, - { /* 1609 */ + { /* 1619 */ 10, /* XCHG16rr */ }, - { /* 1610 */ + { /* 1620 */ 143, /* XCHG32ar */ }, - { /* 1611 */ + { /* 1621 */ 143, /* XCHG32ar64 */ }, - { /* 1612 */ + { /* 1622 */ 8, /* XCHG32rm */ }, - { /* 1613 */ + { /* 1623 */ 10, /* XCHG32rr */ }, - { /* 1614 */ + { /* 1624 */ 144, /* XCHG64ar */ }, - { /* 1615 */ + { /* 1625 */ 19, /* XCHG64rm */ }, - { /* 1616 */ + { /* 1626 */ 21, /* XCHG64rr */ }, - { /* 1617 */ + { /* 1627 */ 25, /* XCHG8rm */ }, - { /* 1618 */ + { /* 1628 */ 27, /* XCHG8rr */ }, - { /* 1619 */ + { /* 1629 */ 0, /* XCRYPTCBC */ }, - { /* 1620 */ + { /* 1630 */ 0, /* XCRYPTCFB */ }, - { /* 1621 */ + { /* 1631 */ 0, /* XCRYPTCTR */ }, - { /* 1622 */ + { /* 1632 */ 0, /* XCRYPTECB */ }, - { /* 1623 */ + { /* 1633 */ 0, /* XCRYPTOFB */ }, - { /* 1624 */ + { /* 1634 */ 0, /* XGETBV */ }, - { /* 1625 */ + { /* 1635 */ 0, /* XLAT */ }, - { /* 1626 */ + { /* 1636 */ 2, /* XOR16i16 */ }, - { /* 1627 */ + { /* 1637 */ 3, /* XOR16mi */ }, - { /* 1628 */ + { /* 1638 */ 4, /* XOR16mi8 */ }, - { /* 1629 */ + { /* 1639 */ 5, /* XOR16mr */ }, - { /* 1630 */ + { /* 1640 */ 6, /* XOR16ri */ }, - { /* 1631 */ + { /* 1641 */ 7, /* XOR16ri8 */ }, - { /* 1632 */ + { /* 1642 */ 8, /* XOR16rm */ }, - { /* 1633 */ + { /* 1643 */ 9, /* XOR16rr */ }, - { /* 1634 */ + { /* 1644 */ 10, /* XOR16rr_REV */ }, - { /* 1635 */ + { /* 1645 */ 2, /* XOR32i32 */ }, - { /* 1636 */ + { /* 1646 */ 3, /* XOR32mi */ }, - { /* 1637 */ + { /* 1647 */ 11, /* XOR32mi8 */ }, - { /* 1638 */ + { /* 1648 */ 5, /* XOR32mr */ }, - { /* 1639 */ + { /* 1649 */ 6, /* XOR32ri */ }, - { /* 1640 */ + { /* 1650 */ 12, /* XOR32ri8 */ }, - { /* 1641 */ + { /* 1651 */ 8, /* XOR32rm */ }, - { /* 1642 */ + { /* 1652 */ 9, /* XOR32rr */ }, - { /* 1643 */ + { /* 1653 */ 10, /* XOR32rr_REV */ }, - { /* 1644 */ + { /* 1654 */ 13, /* XOR64i32 */ }, - { /* 1645 */ + { /* 1655 */ 14, /* XOR64mi32 */ }, - { /* 1646 */ + { /* 1656 */ 15, /* XOR64mi8 */ }, - { /* 1647 */ + { /* 1657 */ 16, /* XOR64mr */ }, - { /* 1648 */ + { /* 1658 */ 17, /* XOR64ri32 */ }, - { /* 1649 */ + { /* 1659 */ 18, /* XOR64ri8 */ }, - { /* 1650 */ + { /* 1660 */ 19, /* XOR64rm */ }, - { /* 1651 */ + { /* 1661 */ 20, /* XOR64rr */ }, - { /* 1652 */ + { /* 1662 */ 21, /* XOR64rr_REV */ }, - { /* 1653 */ + { /* 1663 */ + 23, + /* XOR82_8mi8 */ + }, + { /* 1664 */ + 22, + /* XOR82_8ri8 */ + }, + { /* 1665 */ 1, /* XOR8i8 */ }, - { /* 1654 */ - 22, + { /* 1666 */ + 23, /* XOR8mi */ }, - { /* 1655 */ - 23, + { /* 1667 */ + 24, /* XOR8mr */ }, - { /* 1656 */ - 24, + { /* 1668 */ + 22, /* XOR8ri */ }, - { /* 1657 */ - 24, - /* XOR8ri8 */ - }, - { /* 1658 */ + { /* 1669 */ 25, /* XOR8rm */ }, - { /* 1659 */ + { /* 1670 */ 26, /* XOR8rr */ }, - { /* 1660 */ + { /* 1671 */ 27, /* XOR8rr_REV */ }, - { /* 1661 */ + { /* 1672 */ 163, /* XRSTOR */ }, - { /* 1662 */ + { /* 1673 */ 163, /* XRSTOR64 */ }, - { /* 1663 */ + { /* 1674 */ 163, /* XSAVE */ }, - { /* 1664 */ + { /* 1675 */ 163, /* XSAVE64 */ }, - { /* 1665 */ + { /* 1676 */ 163, /* XSAVEOPT */ }, - { /* 1666 */ + { /* 1677 */ 163, /* XSAVEOPT64 */ }, - { /* 1667 */ + { /* 1678 */ 0, /* XSETBV */ }, - { /* 1668 */ + { /* 1679 */ 0, /* XSHA1 */ }, - { /* 1669 */ + { /* 1680 */ 0, /* XSHA256 */ }, - { /* 1670 */ + { /* 1681 */ 0, /* XSTORE */ } @@ -25688,328 +25732,328 @@ static const InstrUID modRMTable[] = { /* EmptyTable */ 0x0, /* Table1 */ - 0x68, /* ADD8mr */ - 0x6c, /* ADD8rr */ + 0x6c, /* ADD8mr */ + 0x6f, /* ADD8rr */ /* Table3 */ - 0x51, /* ADD32mr */ - 0x57, /* ADD32rr */ + 0x53, /* ADD32mr */ + 0x59, /* ADD32rr */ /* Table5 */ - 0x6b, /* ADD8rm */ - 0x6d, /* ADD8rr_REV */ + 0x6e, /* ADD8rm */ + 0x70, /* ADD8rr_REV */ /* Table7 */ - 0x56, /* ADD32rm */ - 0x59, /* ADD32rr_REV */ + 0x58, /* ADD32rm */ + 0x5b, /* ADD32rr_REV */ /* Table9 */ - 0x66, /* ADD8i8 */ + 0x6a, /* ADD8i8 */ /* Table10 */ - 0x4e, /* ADD32i32 */ + 0x50, /* ADD32i32 */ /* Table11 */ - 0x41b, /* PUSHES32 */ + 0x422, /* PUSHES32 */ /* Table12 */ - 0x3fa, /* POPES32 */ + 0x401, /* POPES32 */ /* Table13 */ - 0x3d5, /* OR8mr */ - 0x3d9, /* OR8rr */ + 0x3dd, /* OR8mr */ + 0x3e0, /* OR8rr */ /* Table15 */ - 0x3c3, /* OR32mr */ - 0x3c8, /* OR32rr */ + 0x3c9, /* OR32mr */ + 0x3ce, /* OR32rr */ /* Table17 */ - 0x3d8, /* OR8rm */ - 0x3da, /* OR8rr_REV */ + 0x3df, /* OR8rm */ + 0x3e1, /* OR8rr_REV */ /* Table19 */ - 0x3c7, /* OR32rm */ - 0x3c9, /* OR32rr_REV */ + 0x3cd, /* OR32rm */ + 0x3cf, /* OR32rr_REV */ /* Table21 */ - 0x3d3, /* OR8i8 */ + 0x3db, /* OR8i8 */ /* Table22 */ - 0x3c0, /* OR32i32 */ + 0x3c6, /* OR32i32 */ /* Table23 */ - 0x417, /* PUSHCS32 */ + 0x41e, /* PUSHCS32 */ /* Table24 */ - 0x39, /* ADC8mr */ - 0x3c, /* ADC8rr */ + 0x3b, /* ADC8mr */ + 0x3e, /* ADC8rr */ /* Table26 */ 0x28, /* ADC32mr */ 0x2c, /* ADC32rr */ /* Table28 */ - 0x3b, /* ADC8rm */ - 0x3d, /* ADC8rr_REV */ + 0x3d, /* ADC8rm */ + 0x3f, /* ADC8rr_REV */ /* Table30 */ 0x2b, /* ADC32rm */ 0x2d, /* ADC32rr_REV */ /* Table32 */ - 0x37, /* ADC8i8 */ + 0x38, /* ADC8i8 */ /* Table33 */ 0x25, /* ADC32i32 */ /* Table34 */ - 0x426, /* PUSHSS32 */ + 0x42d, /* PUSHSS32 */ /* Table35 */ - 0x405, /* POPSS32 */ + 0x40c, /* POPSS32 */ /* Table36 */ - 0x50a, /* SBB8mr */ - 0x50d, /* SBB8rr */ + 0x513, /* SBB8mr */ + 0x516, /* SBB8rr */ /* Table38 */ - 0x4f9, /* SBB32mr */ - 0x4fd, /* SBB32rr */ + 0x500, /* SBB32mr */ + 0x504, /* SBB32rr */ /* Table40 */ - 0x50c, /* SBB8rm */ - 0x50e, /* SBB8rr_REV */ + 0x515, /* SBB8rm */ + 0x517, /* SBB8rr_REV */ /* Table42 */ - 0x4fc, /* SBB32rm */ - 0x4fe, /* SBB32rr_REV */ + 0x503, /* SBB32rm */ + 0x505, /* SBB32rr_REV */ /* Table44 */ - 0x508, /* SBB8i8 */ + 0x510, /* SBB8i8 */ /* Table45 */ - 0x4f6, /* SBB32i32 */ + 0x4fd, /* SBB32i32 */ /* Table46 */ - 0x419, /* PUSHDS32 */ + 0x420, /* PUSHDS32 */ /* Table47 */ - 0x3f8, /* POPDS32 */ + 0x3ff, /* POPDS32 */ /* Table48 */ - 0x93, /* AND8mr */ - 0x97, /* AND8rr */ + 0x98, /* AND8mr */ + 0x9b, /* AND8rr */ /* Table50 */ - 0x82, /* AND32mr */ - 0x86, /* AND32rr */ + 0x85, /* AND32mr */ + 0x89, /* AND32rr */ /* Table52 */ - 0x96, /* AND8rm */ - 0x98, /* AND8rr_REV */ + 0x9a, /* AND8rm */ + 0x9c, /* AND8rr_REV */ /* Table54 */ - 0x85, /* AND32rm */ - 0x87, /* AND32rr_REV */ + 0x88, /* AND32rm */ + 0x8a, /* AND32rr_REV */ /* Table56 */ - 0x91, /* AND8i8 */ + 0x96, /* AND8i8 */ /* Table57 */ - 0x7f, /* AND32i32 */ + 0x82, /* AND32i32 */ /* Table58 */ - 0x1cc, /* DAA */ + 0x1d2, /* DAA */ /* Table59 */ - 0x5cb, /* SUB8mr */ - 0x5cf, /* SUB8rr */ + 0x5d6, /* SUB8mr */ + 0x5d9, /* SUB8rr */ /* Table61 */ - 0x5ba, /* SUB32mr */ - 0x5be, /* SUB32rr */ + 0x5c3, /* SUB32mr */ + 0x5c7, /* SUB32rr */ /* Table63 */ - 0x5ce, /* SUB8rm */ - 0x5d0, /* SUB8rr_REV */ + 0x5d8, /* SUB8rm */ + 0x5da, /* SUB8rr_REV */ /* Table65 */ - 0x5bd, /* SUB32rm */ - 0x5bf, /* SUB32rr_REV */ + 0x5c6, /* SUB32rm */ + 0x5c8, /* SUB32rr_REV */ /* Table67 */ - 0x5c9, /* SUB8i8 */ + 0x5d4, /* SUB8i8 */ /* Table68 */ - 0x5b7, /* SUB32i32 */ + 0x5c0, /* SUB32i32 */ /* Table69 */ - 0x1cd, /* DAS */ + 0x1d3, /* DAS */ /* Table70 */ - 0x677, /* XOR8mr */ - 0x67b, /* XOR8rr */ + 0x683, /* XOR8mr */ + 0x686, /* XOR8rr */ /* Table72 */ - 0x666, /* XOR32mr */ - 0x66a, /* XOR32rr */ + 0x670, /* XOR32mr */ + 0x674, /* XOR32rr */ /* Table74 */ - 0x67a, /* XOR8rm */ - 0x67c, /* XOR8rr_REV */ + 0x685, /* XOR8rm */ + 0x687, /* XOR8rr_REV */ /* Table76 */ - 0x669, /* XOR32rm */ - 0x66b, /* XOR32rr_REV */ + 0x673, /* XOR32rm */ + 0x675, /* XOR32rr_REV */ /* Table78 */ - 0x675, /* XOR8i8 */ + 0x681, /* XOR8i8 */ /* Table79 */ - 0x663, /* XOR32i32 */ + 0x66d, /* XOR32i32 */ /* Table80 */ 0x14, /* AAA */ /* Table81 */ - 0x1b4, /* CMP8mr */ - 0x1b7, /* CMP8rr */ + 0x1ba, /* CMP8mr */ + 0x1bd, /* CMP8rr */ /* Table83 */ - 0x1a3, /* CMP32mr */ - 0x1a7, /* CMP32rr */ + 0x1a7, /* CMP32mr */ + 0x1ab, /* CMP32rr */ /* Table85 */ - 0x1b6, /* CMP8rm */ - 0x1b8, /* CMP8rr_REV */ + 0x1bc, /* CMP8rm */ + 0x1be, /* CMP8rr_REV */ /* Table87 */ - 0x1a6, /* CMP32rm */ - 0x1a8, /* CMP32rr_REV */ + 0x1aa, /* CMP32rm */ + 0x1ac, /* CMP32rr_REV */ /* Table89 */ - 0x1b2, /* CMP8i8 */ + 0x1b7, /* CMP8i8 */ /* Table90 */ - 0x1a0, /* CMP32i32 */ + 0x1a4, /* CMP32i32 */ /* Table91 */ 0x17, /* AAS */ /* Table92 */ - 0x227, /* INC32r */ + 0x22d, /* INC32r */ /* Table93 */ - 0x1d4, /* DEC32r */ + 0x1da, /* DEC32r */ /* Table94 */ - 0x40b, /* PUSH32r */ + 0x412, /* PUSH32r */ /* Table95 */ - 0x3ef, /* POP32r */ + 0x3f6, /* POP32r */ /* Table96 */ - 0x415, /* PUSHA32 */ + 0x41c, /* PUSHA32 */ /* Table97 */ - 0x3f6, /* POPA32 */ + 0x3fd, /* POPA32 */ /* Table98 */ - 0xd0, /* BOUNDS32rm */ + 0xd4, /* BOUNDS32rm */ 0x0, /* */ /* Table100 */ - 0x9d, /* ARPL16mr */ - 0x9e, /* ARPL16rr */ + 0xa1, /* ARPL16mr */ + 0xa2, /* ARPL16rr */ /* Table102 */ - 0x1ce, /* DATA16_PREFIX */ + 0x1d4, /* DATA16_PREFIX */ /* Table103 */ - 0x428, /* PUSHi32 */ + 0x42f, /* PUSHi32 */ /* Table104 */ - 0x20d, /* IMUL32rmi */ - 0x210, /* IMUL32rri */ + 0x213, /* IMUL32rmi */ + 0x216, /* IMUL32rri */ /* Table106 */ - 0x40a, /* PUSH32i8 */ + 0x411, /* PUSH32i8 */ /* Table107 */ - 0x20e, /* IMUL32rmi8 */ - 0x211, /* IMUL32rri8 */ + 0x214, /* IMUL32rmi8 */ + 0x217, /* IMUL32rri8 */ /* Table109 */ - 0x230, /* INSB */ + 0x236, /* INSB */ /* Table110 */ - 0x231, /* INSL */ + 0x237, /* INSL */ /* Table111 */ - 0x3e1, /* OUTSB */ + 0x3e8, /* OUTSB */ /* Table112 */ - 0x3e2, /* OUTSL */ + 0x3e9, /* OUTSL */ /* Table113 */ - 0x278, /* JO_1 */ + 0x27e, /* JO_1 */ /* Table114 */ - 0x26f, /* JNO_1 */ + 0x275, /* JNO_1 */ /* Table115 */ - 0x24e, /* JB_1 */ + 0x254, /* JB_1 */ /* Table116 */ - 0x245, /* JAE_1 */ + 0x24b, /* JAE_1 */ /* Table117 */ - 0x254, /* JE_1 */ + 0x25a, /* JE_1 */ /* Table118 */ - 0x26c, /* JNE_1 */ + 0x272, /* JNE_1 */ /* Table119 */ - 0x24b, /* JBE_1 */ + 0x251, /* JBE_1 */ /* Table120 */ - 0x248, /* JA_1 */ + 0x24e, /* JA_1 */ /* Table121 */ - 0x27f, /* JS_1 */ + 0x285, /* JS_1 */ /* Table122 */ - 0x275, /* JNS_1 */ + 0x27b, /* JNS_1 */ /* Table123 */ - 0x27b, /* JP_1 */ + 0x281, /* JP_1 */ /* Table124 */ - 0x272, /* JNP_1 */ + 0x278, /* JNP_1 */ /* Table125 */ - 0x260, /* JL_1 */ + 0x266, /* JL_1 */ /* Table126 */ - 0x257, /* JGE_1 */ + 0x25d, /* JGE_1 */ /* Table127 */ - 0x25d, /* JLE_1 */ + 0x263, /* JLE_1 */ /* Table128 */ - 0x25a, /* JG_1 */ + 0x260, /* JG_1 */ /* Table129 */ - 0x67, /* ADD8mi */ - 0x3d4, /* OR8mi */ - 0x38, /* ADC8mi */ - 0x509, /* SBB8mi */ - 0x92, /* AND8mi */ - 0x5ca, /* SUB8mi */ - 0x676, /* XOR8mi */ - 0x1b3, /* CMP8mi */ - 0x69, /* ADD8ri */ - 0x3d6, /* OR8ri */ - 0x3a, /* ADC8ri */ - 0x50b, /* SBB8ri */ - 0x94, /* AND8ri */ - 0x5cc, /* SUB8ri */ - 0x678, /* XOR8ri */ - 0x1b5, /* CMP8ri */ + 0x6b, /* ADD8mi */ + 0x3dc, /* OR8mi */ + 0x39, /* ADC8mi */ + 0x511, /* SBB8mi */ + 0x97, /* AND8mi */ + 0x5d5, /* SUB8mi */ + 0x682, /* XOR8mi */ + 0x1b8, /* CMP8mi */ + 0x6d, /* ADD8ri */ + 0x3de, /* OR8ri */ + 0x3c, /* ADC8ri */ + 0x514, /* SBB8ri */ + 0x99, /* AND8ri */ + 0x5d7, /* SUB8ri */ + 0x684, /* XOR8ri */ + 0x1bb, /* CMP8ri */ /* Table145 */ - 0x4f, /* ADD32mi */ - 0x3c1, /* OR32mi */ + 0x51, /* ADD32mi */ + 0x3c7, /* OR32mi */ 0x26, /* ADC32mi */ - 0x4f7, /* SBB32mi */ - 0x80, /* AND32mi */ - 0x5b8, /* SUB32mi */ - 0x664, /* XOR32mi */ - 0x1a1, /* CMP32mi */ - 0x52, /* ADD32ri */ - 0x3c5, /* OR32ri */ + 0x4fe, /* SBB32mi */ + 0x83, /* AND32mi */ + 0x5c1, /* SUB32mi */ + 0x66e, /* XOR32mi */ + 0x1a5, /* CMP32mi */ + 0x54, /* ADD32ri */ + 0x3cb, /* OR32ri */ 0x29, /* ADC32ri */ - 0x4fa, /* SBB32ri */ - 0x83, /* AND32ri */ - 0x5bb, /* SUB32ri */ - 0x667, /* XOR32ri */ - 0x1a4, /* CMP32ri */ + 0x501, /* SBB32ri */ + 0x86, /* AND32ri */ + 0x5c4, /* SUB32ri */ + 0x671, /* XOR32ri */ + 0x1a8, /* CMP32ri */ /* Table161 */ - 0x0, /* */ - 0x0, /* */ - 0x0, /* */ - 0x0, /* */ - 0x0, /* */ - 0x0, /* */ - 0x0, /* */ - 0x0, /* */ - 0x6a, /* ADD8ri8 */ - 0x3d7, /* OR8ri8 */ - 0x0, /* */ - 0x0, /* */ - 0x95, /* AND8ri8 */ - 0x5cd, /* SUB8ri8 */ - 0x679, /* XOR8ri8 */ - 0x0, /* */ + 0x68, /* ADD82_8mi8 */ + 0x3d9, /* OR82_8mi8 */ + 0x3a, /* ADC8mi8 */ + 0x512, /* SBB8mi8 */ + 0x94, /* AND82_8mi8 */ + 0x5d2, /* SUB82_8mi8 */ + 0x67f, /* XOR82_8mi8 */ + 0x1b9, /* CMP8mi8 */ + 0x69, /* ADD82_8ri8 */ + 0x3da, /* OR82_8ri8 */ + 0x37, /* ADC82_8ri8 */ + 0x50f, /* SBB82_8ri8 */ + 0x95, /* AND82_8ri8 */ + 0x5d3, /* SUB82_8ri8 */ + 0x680, /* XOR82_8ri8 */ + 0x1b6, /* CMP82_8ri8 */ /* Table177 */ - 0x50, /* ADD32mi8 */ - 0x3c2, /* OR32mi8 */ + 0x52, /* ADD32mi8 */ + 0x3c8, /* OR32mi8 */ 0x27, /* ADC32mi8 */ - 0x4f8, /* SBB32mi8 */ - 0x81, /* AND32mi8 */ - 0x5b9, /* SUB32mi8 */ - 0x665, /* XOR32mi8 */ - 0x1a2, /* CMP32mi8 */ - 0x53, /* ADD32ri8 */ - 0x3c6, /* OR32ri8 */ + 0x4ff, /* SBB32mi8 */ + 0x84, /* AND32mi8 */ + 0x5c2, /* SUB32mi8 */ + 0x66f, /* XOR32mi8 */ + 0x1a6, /* CMP32mi8 */ + 0x55, /* ADD32ri8 */ + 0x3cc, /* OR32ri8 */ 0x2a, /* ADC32ri8 */ - 0x4fb, /* SBB32ri8 */ - 0x84, /* AND32ri8 */ - 0x5bc, /* SUB32ri8 */ - 0x668, /* XOR32ri8 */ - 0x1a5, /* CMP32ri8 */ + 0x502, /* SBB32ri8 */ + 0x87, /* AND32ri8 */ + 0x5c5, /* SUB32ri8 */ + 0x672, /* XOR32ri8 */ + 0x1a9, /* CMP32ri8 */ /* Table193 */ - 0x603, /* TEST8rm */ - 0x604, /* TEST8rr */ + 0x60d, /* TEST8rm */ + 0x60e, /* TEST8rr */ /* Table195 */ - 0x5f4, /* TEST32rm */ - 0x5f5, /* TEST32rr */ + 0x5fe, /* TEST32rm */ + 0x5ff, /* TEST32rr */ /* Table197 */ - 0x651, /* XCHG8rm */ - 0x652, /* XCHG8rr */ + 0x65b, /* XCHG8rm */ + 0x65c, /* XCHG8rr */ /* Table199 */ - 0x64c, /* XCHG32rm */ - 0x64d, /* XCHG32rr */ + 0x656, /* XCHG32rm */ + 0x657, /* XCHG32rr */ /* Table201 */ - 0x34c, /* MOV8mr */ - 0x354, /* MOV8rr */ + 0x352, /* MOV8mr */ + 0x35a, /* MOV8rr */ /* Table203 */ - 0x322, /* MOV32mr */ - 0x32d, /* MOV32rr */ + 0x328, /* MOV32mr */ + 0x333, /* MOV32rr */ /* Table205 */ - 0x352, /* MOV8rm */ - 0x356, /* MOV8rr_REV */ + 0x358, /* MOV8rm */ + 0x35c, /* MOV8rr_REV */ /* Table207 */ - 0x32c, /* MOV32rm */ - 0x32e, /* MOV32rr_REV */ + 0x332, /* MOV32rm */ + 0x334, /* MOV32rr_REV */ /* Table209 */ - 0x323, /* MOV32ms */ - 0x32f, /* MOV32rs */ + 0x329, /* MOV32ms */ + 0x335, /* MOV32rs */ /* Table211 */ - 0x292, /* LEA32r */ + 0x298, /* LEA32r */ 0x0, /* */ /* Table213 */ - 0x330, /* MOV32sm */ - 0x331, /* MOV32sr */ + 0x336, /* MOV32sm */ + 0x337, /* MOV32sr */ /* Table215 */ - 0x3f0, /* POP32rmm */ + 0x3f7, /* POP32rmm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26017,7 +26061,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x3f1, /* POP32rmr */ + 0x3f8, /* POP32rmr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26026,105 +26070,105 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table231 */ - 0x38f, /* NOOP */ + 0x395, /* NOOP */ /* Table232 */ - 0x64a, /* XCHG32ar */ + 0x654, /* XCHG32ar */ /* Table233 */ - 0x1cb, /* CWDE */ + 0x1d1, /* CWDE */ /* Table234 */ - 0x11d, /* CDQ */ + 0x121, /* CDQ */ /* Table235 */ - 0x1ef, /* FARCALL32i */ + 0x1f5, /* FARCALL32i */ /* Table236 */ - 0x41d, /* PUSHF32 */ + 0x424, /* PUSHF32 */ /* Table237 */ - 0x3fc, /* POPF32 */ + 0x403, /* POPF32 */ /* Table238 */ - 0x4b7, /* SAHF */ + 0x4be, /* SAHF */ /* Table239 */ - 0x282, /* LAHF */ + 0x288, /* LAHF */ /* Table240 */ - 0x34e, /* MOV8o8a */ + 0x354, /* MOV8o8a */ /* Table241 */ - 0x324, /* MOV32o32a */ + 0x32a, /* MOV32o32a */ /* Table242 */ - 0x349, /* MOV8ao8 */ + 0x34f, /* MOV8ao8 */ /* Table243 */ - 0x31d, /* MOV32ao32 */ + 0x323, /* MOV32ao32 */ /* Table244 */ - 0x35e, /* MOVSB */ + 0x364, /* MOVSB */ /* Table245 */ - 0x35f, /* MOVSL */ + 0x365, /* MOVSL */ /* Table246 */ - 0x1b9, /* CMPSB */ + 0x1bf, /* CMPSB */ /* Table247 */ - 0x1ba, /* CMPSL */ + 0x1c0, /* CMPSL */ /* Table248 */ - 0x5fd, /* TEST8i8 */ + 0x607, /* TEST8i8 */ /* Table249 */ - 0x5ef, /* TEST32i32 */ + 0x5f9, /* TEST32i32 */ /* Table250 */ - 0x5a6, /* STOSB */ + 0x5af, /* STOSB */ /* Table251 */ - 0x5a7, /* STOSL */ + 0x5b0, /* STOSL */ /* Table252 */ - 0x2e9, /* LODSB */ + 0x2ef, /* LODSB */ /* Table253 */ - 0x2ea, /* LODSL */ + 0x2f0, /* LODSL */ /* Table254 */ - 0x50f, /* SCASB */ + 0x518, /* SCASB */ /* Table255 */ - 0x510, /* SCASL */ + 0x519, /* SCASL */ /* Table256 */ - 0x350, /* MOV8ri */ + 0x356, /* MOV8ri */ /* Table257 */ - 0x329, /* MOV32ri */ + 0x32f, /* MOV32ri */ /* Table258 */ - 0x496, /* ROL8mi */ - 0x4ae, /* ROR8mi */ - 0x43d, /* RCL8mi */ - 0x455, /* RCR8mi */ - 0x558, /* SHL8mi */ - 0x580, /* SHR8mi */ - 0x4cc, /* SAL8mi */ - 0x4e5, /* SAR8mi */ - 0x499, /* ROL8ri */ - 0x4b1, /* ROR8ri */ - 0x440, /* RCL8ri */ - 0x458, /* RCR8ri */ - 0x55b, /* SHL8ri */ - 0x583, /* SHR8ri */ - 0x4cf, /* SAL8ri */ - 0x4e8, /* SAR8ri */ + 0x49d, /* ROL8mi */ + 0x4b5, /* ROR8mi */ + 0x444, /* RCL8mi */ + 0x45c, /* RCR8mi */ + 0x561, /* SHL8mi */ + 0x589, /* SHR8mi */ + 0x4d3, /* SAL8mi */ + 0x4ec, /* SAR8mi */ + 0x4a0, /* ROL8ri */ + 0x4b8, /* ROR8ri */ + 0x447, /* RCL8ri */ + 0x45f, /* RCR8ri */ + 0x564, /* SHL8ri */ + 0x58c, /* SHR8ri */ + 0x4d6, /* SAL8ri */ + 0x4ef, /* SAR8ri */ /* Table274 */ - 0x48a, /* ROL32mi */ - 0x4a2, /* ROR32mi */ - 0x431, /* RCL32mi */ - 0x449, /* RCR32mi */ - 0x54c, /* SHL32mi */ - 0x574, /* SHR32mi */ - 0x4c0, /* SAL32mi */ - 0x4d9, /* SAR32mi */ - 0x48d, /* ROL32ri */ - 0x4a5, /* ROR32ri */ - 0x434, /* RCL32ri */ - 0x44c, /* RCR32ri */ - 0x54f, /* SHL32ri */ - 0x577, /* SHR32ri */ - 0x4c3, /* SAL32ri */ - 0x4dc, /* SAR32ri */ + 0x491, /* ROL32mi */ + 0x4a9, /* ROR32mi */ + 0x438, /* RCL32mi */ + 0x450, /* RCR32mi */ + 0x555, /* SHL32mi */ + 0x57d, /* SHR32mi */ + 0x4c7, /* SAL32mi */ + 0x4e0, /* SAR32mi */ + 0x494, /* ROL32ri */ + 0x4ac, /* ROR32ri */ + 0x43b, /* RCL32ri */ + 0x453, /* RCR32ri */ + 0x558, /* SHL32ri */ + 0x580, /* SHR32ri */ + 0x4ca, /* SAL32ri */ + 0x4e3, /* SAR32ri */ /* Table290 */ - 0x47b, /* RETIL */ + 0x482, /* RETIL */ /* Table291 */ - 0x47e, /* RETL */ + 0x485, /* RETL */ /* Table292 */ - 0x298, /* LES32rm */ + 0x29e, /* LES32rm */ 0x0, /* */ /* Table294 */ - 0x290, /* LDS32rm */ + 0x296, /* LDS32rm */ 0x0, /* */ /* Table296 */ - 0x34b, /* MOV8mi */ + 0x351, /* MOV8mi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26132,7 +26176,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x351, /* MOV8ri_alt */ + 0x357, /* MOV8ri_alt */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26141,7 +26185,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table312 */ - 0x321, /* MOV32mi */ + 0x327, /* MOV32mi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26149,7 +26193,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x32b, /* MOV32ri_alt */ + 0x331, /* MOV32ri_alt */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26158,97 +26202,97 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table328 */ - 0x1ec, /* ENTER */ + 0x1f2, /* ENTER */ /* Table329 */ - 0x295, /* LEAVE */ + 0x29b, /* LEAVE */ /* Table330 */ - 0x2f0, /* LRETIL */ + 0x2f6, /* LRETIL */ /* Table331 */ - 0x2f3, /* LRETL */ + 0x2f9, /* LRETL */ /* Table332 */ - 0x235, /* INT3 */ + 0x23b, /* INT3 */ /* Table333 */ - 0x233, /* INT */ + 0x239, /* INT */ /* Table334 */ - 0x236, /* INTO */ + 0x23c, /* INTO */ /* Table335 */ - 0x242, /* IRET32 */ + 0x248, /* IRET32 */ /* Table336 */ - 0x494, /* ROL8m1 */ - 0x4ac, /* ROR8m1 */ - 0x43b, /* RCL8m1 */ - 0x453, /* RCR8m1 */ - 0x556, /* SHL8m1 */ - 0x57e, /* SHR8m1 */ - 0x4ca, /* SAL8m1 */ - 0x4e3, /* SAR8m1 */ - 0x497, /* ROL8r1 */ - 0x4af, /* ROR8r1 */ - 0x43e, /* RCL8r1 */ - 0x456, /* RCR8r1 */ - 0x559, /* SHL8r1 */ - 0x581, /* SHR8r1 */ - 0x4cd, /* SAL8r1 */ - 0x4e6, /* SAR8r1 */ + 0x49b, /* ROL8m1 */ + 0x4b3, /* ROR8m1 */ + 0x442, /* RCL8m1 */ + 0x45a, /* RCR8m1 */ + 0x55f, /* SHL8m1 */ + 0x587, /* SHR8m1 */ + 0x4d1, /* SAL8m1 */ + 0x4ea, /* SAR8m1 */ + 0x49e, /* ROL8r1 */ + 0x4b6, /* ROR8r1 */ + 0x445, /* RCL8r1 */ + 0x45d, /* RCR8r1 */ + 0x562, /* SHL8r1 */ + 0x58a, /* SHR8r1 */ + 0x4d4, /* SAL8r1 */ + 0x4ed, /* SAR8r1 */ /* Table352 */ - 0x488, /* ROL32m1 */ - 0x4a0, /* ROR32m1 */ - 0x42f, /* RCL32m1 */ - 0x447, /* RCR32m1 */ - 0x54a, /* SHL32m1 */ - 0x572, /* SHR32m1 */ - 0x4be, /* SAL32m1 */ - 0x4d7, /* SAR32m1 */ - 0x48b, /* ROL32r1 */ - 0x4a3, /* ROR32r1 */ - 0x432, /* RCL32r1 */ - 0x44a, /* RCR32r1 */ - 0x54d, /* SHL32r1 */ - 0x575, /* SHR32r1 */ - 0x4c1, /* SAL32r1 */ - 0x4da, /* SAR32r1 */ + 0x48f, /* ROL32m1 */ + 0x4a7, /* ROR32m1 */ + 0x436, /* RCL32m1 */ + 0x44e, /* RCR32m1 */ + 0x553, /* SHL32m1 */ + 0x57b, /* SHR32m1 */ + 0x4c5, /* SAL32m1 */ + 0x4de, /* SAR32m1 */ + 0x492, /* ROL32r1 */ + 0x4aa, /* ROR32r1 */ + 0x439, /* RCL32r1 */ + 0x451, /* RCR32r1 */ + 0x556, /* SHL32r1 */ + 0x57e, /* SHR32r1 */ + 0x4c8, /* SAL32r1 */ + 0x4e1, /* SAR32r1 */ /* Table368 */ - 0x495, /* ROL8mCL */ - 0x4ad, /* ROR8mCL */ - 0x43c, /* RCL8mCL */ - 0x454, /* RCR8mCL */ - 0x557, /* SHL8mCL */ - 0x57f, /* SHR8mCL */ - 0x4cb, /* SAL8mCL */ - 0x4e4, /* SAR8mCL */ - 0x498, /* ROL8rCL */ - 0x4b0, /* ROR8rCL */ - 0x43f, /* RCL8rCL */ - 0x457, /* RCR8rCL */ - 0x55a, /* SHL8rCL */ - 0x582, /* SHR8rCL */ - 0x4ce, /* SAL8rCL */ - 0x4e7, /* SAR8rCL */ + 0x49c, /* ROL8mCL */ + 0x4b4, /* ROR8mCL */ + 0x443, /* RCL8mCL */ + 0x45b, /* RCR8mCL */ + 0x560, /* SHL8mCL */ + 0x588, /* SHR8mCL */ + 0x4d2, /* SAL8mCL */ + 0x4eb, /* SAR8mCL */ + 0x49f, /* ROL8rCL */ + 0x4b7, /* ROR8rCL */ + 0x446, /* RCL8rCL */ + 0x45e, /* RCR8rCL */ + 0x563, /* SHL8rCL */ + 0x58b, /* SHR8rCL */ + 0x4d5, /* SAL8rCL */ + 0x4ee, /* SAR8rCL */ /* Table384 */ - 0x489, /* ROL32mCL */ - 0x4a1, /* ROR32mCL */ - 0x430, /* RCL32mCL */ - 0x448, /* RCR32mCL */ - 0x54b, /* SHL32mCL */ - 0x573, /* SHR32mCL */ - 0x4bf, /* SAL32mCL */ - 0x4d8, /* SAR32mCL */ - 0x48c, /* ROL32rCL */ - 0x4a4, /* ROR32rCL */ - 0x433, /* RCL32rCL */ - 0x44b, /* RCR32rCL */ - 0x54e, /* SHL32rCL */ - 0x576, /* SHR32rCL */ - 0x4c2, /* SAL32rCL */ - 0x4db, /* SAR32rCL */ + 0x490, /* ROL32mCL */ + 0x4a8, /* ROR32mCL */ + 0x437, /* RCL32mCL */ + 0x44f, /* RCR32mCL */ + 0x554, /* SHL32mCL */ + 0x57c, /* SHR32mCL */ + 0x4c6, /* SAL32mCL */ + 0x4df, /* SAR32mCL */ + 0x493, /* ROL32rCL */ + 0x4ab, /* ROR32rCL */ + 0x43a, /* RCL32rCL */ + 0x452, /* RCR32rCL */ + 0x557, /* SHL32rCL */ + 0x57f, /* SHR32rCL */ + 0x4c9, /* SAL32rCL */ + 0x4e2, /* SAR32rCL */ /* Table400 */ 0x16, /* AAM8i8 */ /* Table401 */ 0x15, /* AAD8i8 */ /* Table402 */ - 0x4d0, /* SALC */ + 0x4d7, /* SALC */ /* Table403 */ - 0x659, /* XLAT */ + 0x663, /* XLAT */ /* Table404 */ 0x0, /* */ 0x0, /* */ @@ -26294,7 +26338,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x1f7, /* FSETPM */ + 0x1fd, /* FSETPM */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26323,106 +26367,106 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table476 */ - 0x2ef, /* LOOPNE */ + 0x2f5, /* LOOPNE */ /* Table477 */ - 0x2ee, /* LOOPE */ + 0x2f4, /* LOOPE */ /* Table478 */ - 0x2ed, /* LOOP */ + 0x2f3, /* LOOP */ /* Table479 */ - 0x252, /* JECXZ_32 */ + 0x258, /* JECXZ_32 */ /* Table480 */ - 0x220, /* IN8ri */ + 0x226, /* IN8ri */ /* Table481 */ - 0x21e, /* IN32ri */ + 0x224, /* IN32ri */ /* Table482 */ - 0x3df, /* OUT8ir */ + 0x3e6, /* OUT8ir */ /* Table483 */ - 0x3dd, /* OUT32ir */ + 0x3e4, /* OUT32ir */ /* Table484 */ - 0x11b, /* CALLpcrel32 */ + 0x11f, /* CALLpcrel32 */ /* Table485 */ - 0x26b, /* JMP_4 */ + 0x271, /* JMP_4 */ /* Table486 */ - 0x1f4, /* FARJMP32i */ + 0x1fa, /* FARJMP32i */ /* Table487 */ - 0x269, /* JMP_1 */ + 0x26f, /* JMP_1 */ /* Table488 */ - 0x221, /* IN8rr */ + 0x227, /* IN8rr */ /* Table489 */ - 0x21f, /* IN32rr */ + 0x225, /* IN32rr */ /* Table490 */ - 0x3e0, /* OUT8rr */ + 0x3e7, /* OUT8rr */ /* Table491 */ - 0x3de, /* OUT32rr */ + 0x3e5, /* OUT32rr */ /* Table492 */ - 0x2d2, /* LOCK_PREFIX */ + 0x2d8, /* LOCK_PREFIX */ /* Table493 */ - 0x234, /* INT1 */ + 0x23a, /* INT1 */ /* Table494 */ - 0x46b, /* REPNE_PREFIX */ + 0x472, /* REPNE_PREFIX */ /* Table495 */ - 0x473, /* REP_PREFIX */ + 0x47a, /* REP_PREFIX */ /* Table496 */ - 0x1f9, /* HLT */ + 0x1ff, /* HLT */ /* Table497 */ - 0x125, /* CMC */ + 0x129, /* CMC */ /* Table498 */ - 0x5fe, /* TEST8mi */ - 0x5ff, /* TEST8mi_alt */ - 0x3b5, /* NOT8m */ - 0x38d, /* NEG8m */ - 0x381, /* MUL8m */ - 0x21a, /* IMUL8m */ - 0x1e3, /* DIV8m */ - 0x200, /* IDIV8m */ - 0x600, /* TEST8ri */ - 0x602, /* TEST8ri_alt */ - 0x3b6, /* NOT8r */ - 0x38e, /* NEG8r */ - 0x382, /* MUL8r */ - 0x21b, /* IMUL8r */ - 0x1e4, /* DIV8r */ - 0x201, /* IDIV8r */ + 0x608, /* TEST8mi */ + 0x609, /* TEST8mi_alt */ + 0x3bb, /* NOT8m */ + 0x393, /* NEG8m */ + 0x387, /* MUL8m */ + 0x220, /* IMUL8m */ + 0x1e9, /* DIV8m */ + 0x206, /* IDIV8m */ + 0x60a, /* TEST8ri */ + 0x60c, /* TEST8ri_alt */ + 0x3bc, /* NOT8r */ + 0x394, /* NEG8r */ + 0x388, /* MUL8r */ + 0x221, /* IMUL8r */ + 0x1ea, /* DIV8r */ + 0x207, /* IDIV8r */ /* Table514 */ - 0x5f0, /* TEST32mi */ - 0x5f1, /* TEST32mi_alt */ - 0x3b1, /* NOT32m */ - 0x389, /* NEG32m */ - 0x37d, /* MUL32m */ - 0x20a, /* IMUL32m */ - 0x1df, /* DIV32m */ - 0x1fc, /* IDIV32m */ - 0x5f2, /* TEST32ri */ - 0x5f3, /* TEST32ri_alt */ - 0x3b2, /* NOT32r */ - 0x38a, /* NEG32r */ - 0x37e, /* MUL32r */ - 0x20b, /* IMUL32r */ - 0x1e0, /* DIV32r */ - 0x1fd, /* IDIV32r */ + 0x5fa, /* TEST32mi */ + 0x5fb, /* TEST32mi_alt */ + 0x3b7, /* NOT32m */ + 0x38f, /* NEG32m */ + 0x383, /* MUL32m */ + 0x210, /* IMUL32m */ + 0x1e5, /* DIV32m */ + 0x202, /* IDIV32m */ + 0x5fc, /* TEST32ri */ + 0x5fd, /* TEST32ri_alt */ + 0x3b8, /* NOT32r */ + 0x390, /* NEG32r */ + 0x384, /* MUL32r */ + 0x211, /* IMUL32r */ + 0x1e6, /* DIV32r */ + 0x203, /* IDIV32r */ /* Table530 */ - 0x120, /* CLC */ + 0x124, /* CLC */ /* Table531 */ - 0x5a2, /* STC */ + 0x5ab, /* STC */ /* Table532 */ - 0x123, /* CLI */ + 0x127, /* CLI */ /* Table533 */ - 0x5a5, /* STI */ + 0x5ae, /* STI */ /* Table534 */ - 0x121, /* CLD */ + 0x125, /* CLD */ /* Table535 */ - 0x5a3, /* STD */ + 0x5ac, /* STD */ /* Table536 */ - 0x22e, /* INC8m */ - 0x1db, /* DEC8m */ + 0x234, /* INC8m */ + 0x1e1, /* DEC8m */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x22f, /* INC8r */ - 0x1dc, /* DEC8r */ + 0x235, /* INC8r */ + 0x1e2, /* DEC8r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26430,40 +26474,40 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table552 */ - 0x226, /* INC32m */ - 0x1d3, /* DEC32m */ - 0x115, /* CALL32m */ - 0x1f0, /* FARCALL32m */ - 0x265, /* JMP32m */ - 0x1f5, /* FARJMP32m */ - 0x40c, /* PUSH32rmm */ + 0x22c, /* INC32m */ + 0x1d9, /* DEC32m */ + 0x119, /* CALL32m */ + 0x1f6, /* FARCALL32m */ + 0x26b, /* JMP32m */ + 0x1fb, /* FARJMP32m */ + 0x413, /* PUSH32rmm */ 0x0, /* */ - 0x225, /* INC32_32r */ - 0x1d2, /* DEC32_32r */ - 0x116, /* CALL32r */ + 0x22b, /* INC32_32r */ + 0x1d8, /* DEC32_32r */ + 0x11a, /* CALL32r */ 0x0, /* */ - 0x266, /* JMP32r */ + 0x26c, /* JMP32r */ 0x0, /* */ - 0x40d, /* PUSH32rmr */ + 0x414, /* PUSH32rmr */ 0x0, /* */ /* Table568 */ - 0x481, /* REX64_PREFIX */ + 0x488, /* REX64_PREFIX */ /* Table569 */ - 0x411, /* PUSH64r */ + 0x418, /* PUSH64r */ /* Table570 */ - 0x3f2, /* POP64r */ + 0x3f9, /* POP64r */ /* Table571 */ 0x0, /* */ - 0x368, /* MOVSX64_NOREXrr32 */ + 0x36e, /* MOVSX64_NOREXrr32 */ /* Table573 */ - 0x40f, /* PUSH64i32 */ + 0x416, /* PUSH64i32 */ /* Table574 */ - 0x410, /* PUSH64i8 */ + 0x417, /* PUSH64i8 */ /* Table575 */ - 0x293, /* LEA64_32r */ + 0x299, /* LEA64_32r */ 0x0, /* */ /* Table577 */ - 0x3f3, /* POP64rmm */ + 0x3fa, /* POP64rmm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26471,7 +26515,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x3f4, /* POP64rmr */ + 0x3fb, /* POP64rmr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26480,68 +26524,68 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table593 */ - 0x64b, /* XCHG32ar64 */ + 0x655, /* XCHG32ar64 */ /* Table594 */ - 0x41e, /* PUSHF64 */ + 0x425, /* PUSHF64 */ /* Table595 */ - 0x3fd, /* POPF64 */ + 0x404, /* POPF64 */ /* Table596 */ - 0x33e, /* MOV64o8a */ + 0x344, /* MOV64o8a */ /* Table597 */ - 0x33c, /* MOV64o32a */ + 0x342, /* MOV64o32a */ /* Table598 */ - 0x335, /* MOV64ao8 */ + 0x33b, /* MOV64ao8 */ /* Table599 */ - 0x333, /* MOV64ao32 */ + 0x339, /* MOV64ao32 */ /* Table600 */ - 0x47c, /* RETIQ */ + 0x483, /* RETIQ */ /* Table601 */ - 0x47f, /* RETQ */ + 0x486, /* RETQ */ /* Table602 */ - 0x296, /* LEAVE64 */ + 0x29c, /* LEAVE64 */ /* Table603 */ - 0x27e, /* JRCXZ */ + 0x284, /* JRCXZ */ /* Table604 */ - 0x118, /* CALL64pcrel32 */ + 0x11c, /* CALL64pcrel32 */ /* Table605 */ - 0x22a, /* INC64_32m */ - 0x1d7, /* DEC64_32m */ - 0x117, /* CALL64m */ - 0x1f0, /* FARCALL32m */ - 0x267, /* JMP64m */ - 0x1f5, /* FARJMP32m */ - 0x412, /* PUSH64rmm */ + 0x230, /* INC64_32m */ + 0x1dd, /* DEC64_32m */ + 0x11b, /* CALL64m */ + 0x1f6, /* FARCALL32m */ + 0x26d, /* JMP64m */ + 0x1fb, /* FARJMP32m */ + 0x419, /* PUSH64rmm */ 0x0, /* */ - 0x22b, /* INC64_32r */ - 0x1d8, /* DEC64_32r */ - 0x119, /* CALL64r */ + 0x231, /* INC64_32r */ + 0x1de, /* DEC64_32r */ + 0x11d, /* CALL64r */ 0x0, /* */ - 0x268, /* JMP64r */ + 0x26e, /* JMP64r */ 0x0, /* */ - 0x413, /* PUSH64rmr */ + 0x41a, /* PUSH64rmr */ 0x0, /* */ /* Table621 */ - 0x45, /* ADD16mr */ - 0x4b, /* ADD16rr */ + 0x47, /* ADD16mr */ + 0x4d, /* ADD16rr */ /* Table623 */ - 0x4a, /* ADD16rm */ - 0x4d, /* ADD16rr_REV */ + 0x4c, /* ADD16rm */ + 0x4f, /* ADD16rr_REV */ /* Table625 */ - 0x42, /* ADD16i16 */ + 0x44, /* ADD16i16 */ /* Table626 */ - 0x41a, /* PUSHES16 */ + 0x421, /* PUSHES16 */ /* Table627 */ - 0x3f9, /* POPES16 */ + 0x400, /* POPES16 */ /* Table628 */ - 0x3ba, /* OR16mr */ - 0x3be, /* OR16rr */ + 0x3c0, /* OR16mr */ + 0x3c4, /* OR16rr */ /* Table630 */ - 0x3bd, /* OR16rm */ - 0x3bf, /* OR16rr_REV */ + 0x3c3, /* OR16rm */ + 0x3c5, /* OR16rr_REV */ /* Table632 */ - 0x3b7, /* OR16i16 */ + 0x3bd, /* OR16i16 */ /* Table633 */ - 0x416, /* PUSHCS16 */ + 0x41d, /* PUSHCS16 */ /* Table634 */ 0x1f, /* ADC16mr */ 0x23, /* ADC16rr */ @@ -26551,139 +26595,139 @@ static const InstrUID modRMTable[] = { /* Table638 */ 0x1c, /* ADC16i16 */ /* Table639 */ - 0x425, /* PUSHSS16 */ + 0x42c, /* PUSHSS16 */ /* Table640 */ - 0x404, /* POPSS16 */ + 0x40b, /* POPSS16 */ /* Table641 */ - 0x4f0, /* SBB16mr */ - 0x4f4, /* SBB16rr */ + 0x4f7, /* SBB16mr */ + 0x4fb, /* SBB16rr */ /* Table643 */ - 0x4f3, /* SBB16rm */ - 0x4f5, /* SBB16rr_REV */ + 0x4fa, /* SBB16rm */ + 0x4fc, /* SBB16rr_REV */ /* Table645 */ - 0x4ed, /* SBB16i16 */ + 0x4f4, /* SBB16i16 */ /* Table646 */ - 0x418, /* PUSHDS16 */ + 0x41f, /* PUSHDS16 */ /* Table647 */ - 0x3f7, /* POPDS16 */ + 0x3fe, /* POPDS16 */ /* Table648 */ - 0x79, /* AND16mr */ - 0x7d, /* AND16rr */ + 0x7c, /* AND16mr */ + 0x80, /* AND16rr */ /* Table650 */ - 0x7c, /* AND16rm */ - 0x7e, /* AND16rr_REV */ + 0x7f, /* AND16rm */ + 0x81, /* AND16rr_REV */ /* Table652 */ - 0x76, /* AND16i16 */ + 0x79, /* AND16i16 */ /* Table653 */ - 0x5b1, /* SUB16mr */ - 0x5b5, /* SUB16rr */ + 0x5ba, /* SUB16mr */ + 0x5be, /* SUB16rr */ /* Table655 */ - 0x5b4, /* SUB16rm */ - 0x5b6, /* SUB16rr_REV */ + 0x5bd, /* SUB16rm */ + 0x5bf, /* SUB16rr_REV */ /* Table657 */ - 0x5ae, /* SUB16i16 */ + 0x5b7, /* SUB16i16 */ /* Table658 */ - 0x65d, /* XOR16mr */ - 0x661, /* XOR16rr */ + 0x667, /* XOR16mr */ + 0x66b, /* XOR16rr */ /* Table660 */ - 0x660, /* XOR16rm */ - 0x662, /* XOR16rr_REV */ + 0x66a, /* XOR16rm */ + 0x66c, /* XOR16rr_REV */ /* Table662 */ - 0x65a, /* XOR16i16 */ + 0x664, /* XOR16i16 */ /* Table663 */ - 0x19a, /* CMP16mr */ - 0x19e, /* CMP16rr */ + 0x19e, /* CMP16mr */ + 0x1a2, /* CMP16rr */ /* Table665 */ - 0x19d, /* CMP16rm */ - 0x19f, /* CMP16rr_REV */ + 0x1a1, /* CMP16rm */ + 0x1a3, /* CMP16rr_REV */ /* Table667 */ - 0x197, /* CMP16i16 */ + 0x19b, /* CMP16i16 */ /* Table668 */ - 0x223, /* INC16r */ + 0x229, /* INC16r */ /* Table669 */ - 0x1d0, /* DEC16r */ + 0x1d6, /* DEC16r */ /* Table670 */ - 0x407, /* PUSH16r */ + 0x40e, /* PUSH16r */ /* Table671 */ - 0x3ec, /* POP16r */ + 0x3f3, /* POP16r */ /* Table672 */ - 0x414, /* PUSHA16 */ + 0x41b, /* PUSHA16 */ /* Table673 */ - 0x3f5, /* POPA16 */ + 0x3fc, /* POPA16 */ /* Table674 */ - 0xcf, /* BOUNDS16rm */ + 0xd3, /* BOUNDS16rm */ 0x0, /* */ /* Table676 */ - 0x427, /* PUSHi16 */ + 0x42e, /* PUSHi16 */ /* Table677 */ - 0x205, /* IMUL16rmi */ - 0x208, /* IMUL16rri */ + 0x20b, /* IMUL16rmi */ + 0x20e, /* IMUL16rri */ /* Table679 */ - 0x406, /* PUSH16i8 */ + 0x40d, /* PUSH16i8 */ /* Table680 */ - 0x206, /* IMUL16rmi8 */ - 0x209, /* IMUL16rri8 */ + 0x20c, /* IMUL16rmi8 */ + 0x20f, /* IMUL16rri8 */ /* Table682 */ - 0x232, /* INSW */ + 0x238, /* INSW */ /* Table683 */ - 0x3e3, /* OUTSW */ + 0x3ea, /* OUTSW */ /* Table684 */ - 0x43, /* ADD16mi */ - 0x3b8, /* OR16mi */ + 0x45, /* ADD16mi */ + 0x3be, /* OR16mi */ 0x1d, /* ADC16mi */ - 0x4ee, /* SBB16mi */ - 0x77, /* AND16mi */ - 0x5af, /* SUB16mi */ - 0x65b, /* XOR16mi */ - 0x198, /* CMP16mi */ - 0x46, /* ADD16ri */ - 0x3bb, /* OR16ri */ + 0x4f5, /* SBB16mi */ + 0x7a, /* AND16mi */ + 0x5b8, /* SUB16mi */ + 0x665, /* XOR16mi */ + 0x19c, /* CMP16mi */ + 0x48, /* ADD16ri */ + 0x3c1, /* OR16ri */ 0x20, /* ADC16ri */ - 0x4f1, /* SBB16ri */ - 0x7a, /* AND16ri */ - 0x5b2, /* SUB16ri */ - 0x65e, /* XOR16ri */ - 0x19b, /* CMP16ri */ + 0x4f8, /* SBB16ri */ + 0x7d, /* AND16ri */ + 0x5bb, /* SUB16ri */ + 0x668, /* XOR16ri */ + 0x19f, /* CMP16ri */ /* Table700 */ - 0x44, /* ADD16mi8 */ - 0x3b9, /* OR16mi8 */ + 0x46, /* ADD16mi8 */ + 0x3bf, /* OR16mi8 */ 0x1e, /* ADC16mi8 */ - 0x4ef, /* SBB16mi8 */ - 0x78, /* AND16mi8 */ - 0x5b0, /* SUB16mi8 */ - 0x65c, /* XOR16mi8 */ - 0x199, /* CMP16mi8 */ - 0x47, /* ADD16ri8 */ - 0x3bc, /* OR16ri8 */ + 0x4f6, /* SBB16mi8 */ + 0x7b, /* AND16mi8 */ + 0x5b9, /* SUB16mi8 */ + 0x666, /* XOR16mi8 */ + 0x19d, /* CMP16mi8 */ + 0x49, /* ADD16ri8 */ + 0x3c2, /* OR16ri8 */ 0x21, /* ADC16ri8 */ - 0x4f2, /* SBB16ri8 */ - 0x7b, /* AND16ri8 */ - 0x5b3, /* SUB16ri8 */ - 0x65f, /* XOR16ri8 */ - 0x19c, /* CMP16ri8 */ + 0x4f9, /* SBB16ri8 */ + 0x7e, /* AND16ri8 */ + 0x5bc, /* SUB16ri8 */ + 0x669, /* XOR16ri8 */ + 0x1a0, /* CMP16ri8 */ /* Table716 */ - 0x5ed, /* TEST16rm */ - 0x5ee, /* TEST16rr */ + 0x5f7, /* TEST16rm */ + 0x5f8, /* TEST16rr */ /* Table718 */ - 0x648, /* XCHG16rm */ - 0x649, /* XCHG16rr */ + 0x652, /* XCHG16rm */ + 0x653, /* XCHG16rr */ /* Table720 */ - 0x311, /* MOV16mr */ - 0x318, /* MOV16rr */ + 0x317, /* MOV16mr */ + 0x31e, /* MOV16rr */ /* Table722 */ - 0x317, /* MOV16rm */ - 0x319, /* MOV16rr_REV */ + 0x31d, /* MOV16rm */ + 0x31f, /* MOV16rr_REV */ /* Table724 */ - 0x312, /* MOV16ms */ - 0x31a, /* MOV16rs */ + 0x318, /* MOV16ms */ + 0x320, /* MOV16rs */ /* Table726 */ - 0x291, /* LEA16r */ + 0x297, /* LEA16r */ 0x0, /* */ /* Table728 */ - 0x31b, /* MOV16sm */ - 0x31c, /* MOV16sr */ + 0x321, /* MOV16sm */ + 0x322, /* MOV16sr */ /* Table730 */ - 0x3ed, /* POP16rmm */ + 0x3f4, /* POP16rmm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26691,7 +26735,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x3ee, /* POP16rmr */ + 0x3f5, /* POP16rmr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26700,64 +26744,64 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table746 */ - 0x647, /* XCHG16ar */ + 0x651, /* XCHG16ar */ /* Table747 */ - 0x11c, /* CBW */ + 0x120, /* CBW */ /* Table748 */ - 0x1ca, /* CWD */ + 0x1d0, /* CWD */ /* Table749 */ - 0x1ed, /* FARCALL16i */ + 0x1f3, /* FARCALL16i */ /* Table750 */ - 0x41c, /* PUSHF16 */ + 0x423, /* PUSHF16 */ /* Table751 */ - 0x3fb, /* POPF16 */ + 0x402, /* POPF16 */ /* Table752 */ - 0x313, /* MOV16o16a */ + 0x319, /* MOV16o16a */ /* Table753 */ - 0x30e, /* MOV16ao16 */ + 0x314, /* MOV16ao16 */ /* Table754 */ - 0x361, /* MOVSW */ + 0x367, /* MOVSW */ /* Table755 */ - 0x1bc, /* CMPSW */ + 0x1c2, /* CMPSW */ /* Table756 */ - 0x5e8, /* TEST16i16 */ + 0x5f2, /* TEST16i16 */ /* Table757 */ - 0x5a9, /* STOSW */ + 0x5b2, /* STOSW */ /* Table758 */ - 0x2ec, /* LODSW */ + 0x2f2, /* LODSW */ /* Table759 */ - 0x512, /* SCASW */ + 0x51b, /* SCASW */ /* Table760 */ - 0x315, /* MOV16ri */ + 0x31b, /* MOV16ri */ /* Table761 */ - 0x484, /* ROL16mi */ - 0x49c, /* ROR16mi */ - 0x42b, /* RCL16mi */ - 0x443, /* RCR16mi */ - 0x546, /* SHL16mi */ - 0x56e, /* SHR16mi */ - 0x4ba, /* SAL16mi */ - 0x4d3, /* SAR16mi */ - 0x487, /* ROL16ri */ - 0x49f, /* ROR16ri */ - 0x42e, /* RCL16ri */ - 0x446, /* RCR16ri */ - 0x549, /* SHL16ri */ - 0x571, /* SHR16ri */ - 0x4bd, /* SAL16ri */ - 0x4d6, /* SAR16ri */ + 0x48b, /* ROL16mi */ + 0x4a3, /* ROR16mi */ + 0x432, /* RCL16mi */ + 0x44a, /* RCR16mi */ + 0x54f, /* SHL16mi */ + 0x577, /* SHR16mi */ + 0x4c1, /* SAL16mi */ + 0x4da, /* SAR16mi */ + 0x48e, /* ROL16ri */ + 0x4a6, /* ROR16ri */ + 0x435, /* RCL16ri */ + 0x44d, /* RCR16ri */ + 0x552, /* SHL16ri */ + 0x57a, /* SHR16ri */ + 0x4c4, /* SAL16ri */ + 0x4dd, /* SAR16ri */ /* Table777 */ - 0x47d, /* RETIW */ + 0x484, /* RETIW */ /* Table778 */ - 0x480, /* RETW */ + 0x487, /* RETW */ /* Table779 */ - 0x297, /* LES16rm */ + 0x29d, /* LES16rm */ 0x0, /* */ /* Table781 */ - 0x28f, /* LDS16rm */ + 0x295, /* LDS16rm */ 0x0, /* */ /* Table783 */ - 0x310, /* MOV16mi */ + 0x316, /* MOV16mi */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26765,7 +26809,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x316, /* MOV16ri_alt */ + 0x31c, /* MOV16ri_alt */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -26774,111 +26818,111 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table799 */ - 0x2f2, /* LRETIW */ + 0x2f8, /* LRETIW */ /* Table800 */ - 0x2f5, /* LRETW */ + 0x2fb, /* LRETW */ /* Table801 */ - 0x241, /* IRET16 */ + 0x247, /* IRET16 */ /* Table802 */ - 0x482, /* ROL16m1 */ - 0x49a, /* ROR16m1 */ - 0x429, /* RCL16m1 */ - 0x441, /* RCR16m1 */ - 0x544, /* SHL16m1 */ - 0x56c, /* SHR16m1 */ - 0x4b8, /* SAL16m1 */ - 0x4d1, /* SAR16m1 */ - 0x485, /* ROL16r1 */ - 0x49d, /* ROR16r1 */ - 0x42c, /* RCL16r1 */ - 0x444, /* RCR16r1 */ - 0x547, /* SHL16r1 */ - 0x56f, /* SHR16r1 */ - 0x4bb, /* SAL16r1 */ - 0x4d4, /* SAR16r1 */ + 0x489, /* ROL16m1 */ + 0x4a1, /* ROR16m1 */ + 0x430, /* RCL16m1 */ + 0x448, /* RCR16m1 */ + 0x54d, /* SHL16m1 */ + 0x575, /* SHR16m1 */ + 0x4bf, /* SAL16m1 */ + 0x4d8, /* SAR16m1 */ + 0x48c, /* ROL16r1 */ + 0x4a4, /* ROR16r1 */ + 0x433, /* RCL16r1 */ + 0x44b, /* RCR16r1 */ + 0x550, /* SHL16r1 */ + 0x578, /* SHR16r1 */ + 0x4c2, /* SAL16r1 */ + 0x4db, /* SAR16r1 */ /* Table818 */ - 0x483, /* ROL16mCL */ - 0x49b, /* ROR16mCL */ - 0x42a, /* RCL16mCL */ - 0x442, /* RCR16mCL */ - 0x545, /* SHL16mCL */ - 0x56d, /* SHR16mCL */ - 0x4b9, /* SAL16mCL */ - 0x4d2, /* SAR16mCL */ - 0x486, /* ROL16rCL */ - 0x49e, /* ROR16rCL */ - 0x42d, /* RCL16rCL */ - 0x445, /* RCR16rCL */ - 0x548, /* SHL16rCL */ - 0x570, /* SHR16rCL */ - 0x4bc, /* SAL16rCL */ - 0x4d5, /* SAR16rCL */ + 0x48a, /* ROL16mCL */ + 0x4a2, /* ROR16mCL */ + 0x431, /* RCL16mCL */ + 0x449, /* RCR16mCL */ + 0x54e, /* SHL16mCL */ + 0x576, /* SHR16mCL */ + 0x4c0, /* SAL16mCL */ + 0x4d9, /* SAR16mCL */ + 0x48d, /* ROL16rCL */ + 0x4a5, /* ROR16rCL */ + 0x434, /* RCL16rCL */ + 0x44c, /* RCR16rCL */ + 0x551, /* SHL16rCL */ + 0x579, /* SHR16rCL */ + 0x4c3, /* SAL16rCL */ + 0x4dc, /* SAR16rCL */ /* Table834 */ - 0x21c, /* IN16ri */ + 0x222, /* IN16ri */ /* Table835 */ - 0x3db, /* OUT16ir */ + 0x3e2, /* OUT16ir */ /* Table836 */ - 0x11a, /* CALLpcrel16 */ + 0x11e, /* CALLpcrel16 */ /* Table837 */ - 0x26a, /* JMP_2 */ + 0x270, /* JMP_2 */ /* Table838 */ - 0x1f2, /* FARJMP16i */ + 0x1f8, /* FARJMP16i */ /* Table839 */ - 0x21d, /* IN16rr */ + 0x223, /* IN16rr */ /* Table840 */ - 0x3dc, /* OUT16rr */ + 0x3e3, /* OUT16rr */ /* Table841 */ - 0x5e9, /* TEST16mi */ - 0x5ea, /* TEST16mi_alt */ - 0x3af, /* NOT16m */ - 0x387, /* NEG16m */ - 0x37b, /* MUL16m */ - 0x202, /* IMUL16m */ - 0x1dd, /* DIV16m */ - 0x1fa, /* IDIV16m */ - 0x5eb, /* TEST16ri */ - 0x5ec, /* TEST16ri_alt */ - 0x3b0, /* NOT16r */ - 0x388, /* NEG16r */ - 0x37c, /* MUL16r */ - 0x203, /* IMUL16r */ - 0x1de, /* DIV16r */ - 0x1fb, /* IDIV16r */ + 0x5f3, /* TEST16mi */ + 0x5f4, /* TEST16mi_alt */ + 0x3b5, /* NOT16m */ + 0x38d, /* NEG16m */ + 0x381, /* MUL16m */ + 0x208, /* IMUL16m */ + 0x1e3, /* DIV16m */ + 0x200, /* IDIV16m */ + 0x5f5, /* TEST16ri */ + 0x5f6, /* TEST16ri_alt */ + 0x3b6, /* NOT16r */ + 0x38e, /* NEG16r */ + 0x382, /* MUL16r */ + 0x209, /* IMUL16r */ + 0x1e4, /* DIV16r */ + 0x201, /* IDIV16r */ /* Table857 */ - 0x222, /* INC16m */ - 0x1cf, /* DEC16m */ - 0x113, /* CALL16m */ - 0x1ee, /* FARCALL16m */ - 0x263, /* JMP16m */ - 0x1f3, /* FARJMP16m */ - 0x408, /* PUSH16rmm */ + 0x228, /* INC16m */ + 0x1d5, /* DEC16m */ + 0x117, /* CALL16m */ + 0x1f4, /* FARCALL16m */ + 0x269, /* JMP16m */ + 0x1f9, /* FARJMP16m */ + 0x40f, /* PUSH16rmm */ 0x0, /* */ - 0x224, /* INC32_16r */ - 0x1d1, /* DEC32_16r */ - 0x114, /* CALL16r */ + 0x22a, /* INC32_16r */ + 0x1d7, /* DEC32_16r */ + 0x118, /* CALL16r */ 0x0, /* */ - 0x264, /* JMP16r */ + 0x26a, /* JMP16r */ 0x0, /* */ - 0x409, /* PUSH16rmr */ + 0x410, /* PUSH16rmr */ 0x0, /* */ /* Table873 */ - 0x251, /* JCXZ */ + 0x257, /* JCXZ */ /* Table874 */ - 0x5d, /* ADD64mr */ - 0x63, /* ADD64rr */ + 0x5f, /* ADD64mr */ + 0x65, /* ADD64rr */ /* Table876 */ - 0x62, /* ADD64rm */ - 0x65, /* ADD64rr_REV */ + 0x64, /* ADD64rm */ + 0x67, /* ADD64rr_REV */ /* Table878 */ - 0x5a, /* ADD64i32 */ + 0x5c, /* ADD64i32 */ /* Table879 */ - 0x3cd, /* OR64mr */ - 0x3d1, /* OR64rr */ + 0x3d3, /* OR64mr */ + 0x3d7, /* OR64rr */ /* Table881 */ - 0x3d0, /* OR64rm */ - 0x3d2, /* OR64rr_REV */ + 0x3d6, /* OR64rm */ + 0x3d8, /* OR64rr_REV */ /* Table883 */ - 0x3ca, /* OR64i32 */ + 0x3d0, /* OR64i32 */ /* Table884 */ 0x31, /* ADC64mr */ 0x35, /* ADC64rr */ @@ -26888,152 +26932,152 @@ static const InstrUID modRMTable[] = { /* Table888 */ 0x2e, /* ADC64i32 */ /* Table889 */ - 0x502, /* SBB64mr */ - 0x506, /* SBB64rr */ + 0x509, /* SBB64mr */ + 0x50d, /* SBB64rr */ /* Table891 */ - 0x505, /* SBB64rm */ - 0x507, /* SBB64rr_REV */ + 0x50c, /* SBB64rm */ + 0x50e, /* SBB64rr_REV */ /* Table893 */ - 0x4ff, /* SBB64i32 */ + 0x506, /* SBB64i32 */ /* Table894 */ - 0x8b, /* AND64mr */ - 0x8f, /* AND64rr */ + 0x8e, /* AND64mr */ + 0x92, /* AND64rr */ /* Table896 */ - 0x8e, /* AND64rm */ - 0x90, /* AND64rr_REV */ + 0x91, /* AND64rm */ + 0x93, /* AND64rr_REV */ /* Table898 */ - 0x88, /* AND64i32 */ + 0x8b, /* AND64i32 */ /* Table899 */ - 0x5c3, /* SUB64mr */ - 0x5c7, /* SUB64rr */ + 0x5cc, /* SUB64mr */ + 0x5d0, /* SUB64rr */ /* Table901 */ - 0x5c6, /* SUB64rm */ - 0x5c8, /* SUB64rr_REV */ + 0x5cf, /* SUB64rm */ + 0x5d1, /* SUB64rr_REV */ /* Table903 */ - 0x5c0, /* SUB64i32 */ + 0x5c9, /* SUB64i32 */ /* Table904 */ - 0x66f, /* XOR64mr */ - 0x673, /* XOR64rr */ + 0x679, /* XOR64mr */ + 0x67d, /* XOR64rr */ /* Table906 */ - 0x672, /* XOR64rm */ - 0x674, /* XOR64rr_REV */ + 0x67c, /* XOR64rm */ + 0x67e, /* XOR64rr_REV */ /* Table908 */ - 0x66c, /* XOR64i32 */ + 0x676, /* XOR64i32 */ /* Table909 */ - 0x1ac, /* CMP64mr */ - 0x1b0, /* CMP64rr */ + 0x1b0, /* CMP64mr */ + 0x1b4, /* CMP64rr */ /* Table911 */ - 0x1af, /* CMP64rm */ - 0x1b1, /* CMP64rr_REV */ + 0x1b3, /* CMP64rm */ + 0x1b5, /* CMP64rr_REV */ /* Table913 */ - 0x1a9, /* CMP64i32 */ + 0x1ad, /* CMP64i32 */ /* Table914 */ - 0x36a, /* MOVSX64rm32 */ - 0x36d, /* MOVSX64rr32 */ + 0x370, /* MOVSX64rm32 */ + 0x373, /* MOVSX64rr32 */ /* Table916 */ - 0x215, /* IMUL64rmi32 */ - 0x218, /* IMUL64rri32 */ + 0x21b, /* IMUL64rmi32 */ + 0x21e, /* IMUL64rri32 */ /* Table918 */ - 0x216, /* IMUL64rmi8 */ - 0x219, /* IMUL64rri8 */ + 0x21c, /* IMUL64rmi8 */ + 0x21f, /* IMUL64rri8 */ /* Table920 */ - 0x5b, /* ADD64mi32 */ - 0x3cb, /* OR64mi32 */ + 0x5d, /* ADD64mi32 */ + 0x3d1, /* OR64mi32 */ 0x2f, /* ADC64mi32 */ - 0x500, /* SBB64mi32 */ - 0x89, /* AND64mi32 */ - 0x5c1, /* SUB64mi32 */ - 0x66d, /* XOR64mi32 */ - 0x1aa, /* CMP64mi32 */ - 0x5e, /* ADD64ri32 */ - 0x3ce, /* OR64ri32 */ + 0x507, /* SBB64mi32 */ + 0x8c, /* AND64mi32 */ + 0x5ca, /* SUB64mi32 */ + 0x677, /* XOR64mi32 */ + 0x1ae, /* CMP64mi32 */ + 0x60, /* ADD64ri32 */ + 0x3d4, /* OR64ri32 */ 0x32, /* ADC64ri32 */ - 0x503, /* SBB64ri32 */ - 0x8c, /* AND64ri32 */ - 0x5c4, /* SUB64ri32 */ - 0x670, /* XOR64ri32 */ - 0x1ad, /* CMP64ri32 */ + 0x50a, /* SBB64ri32 */ + 0x8f, /* AND64ri32 */ + 0x5cd, /* SUB64ri32 */ + 0x67a, /* XOR64ri32 */ + 0x1b1, /* CMP64ri32 */ /* Table936 */ - 0x5c, /* ADD64mi8 */ - 0x3cc, /* OR64mi8 */ + 0x5e, /* ADD64mi8 */ + 0x3d2, /* OR64mi8 */ 0x30, /* ADC64mi8 */ - 0x501, /* SBB64mi8 */ - 0x8a, /* AND64mi8 */ - 0x5c2, /* SUB64mi8 */ - 0x66e, /* XOR64mi8 */ - 0x1ab, /* CMP64mi8 */ - 0x60, /* ADD64ri8 */ - 0x3cf, /* OR64ri8 */ + 0x508, /* SBB64mi8 */ + 0x8d, /* AND64mi8 */ + 0x5cb, /* SUB64mi8 */ + 0x678, /* XOR64mi8 */ + 0x1af, /* CMP64mi8 */ + 0x62, /* ADD64ri8 */ + 0x3d5, /* OR64ri8 */ 0x33, /* ADC64ri8 */ - 0x504, /* SBB64ri8 */ - 0x8d, /* AND64ri8 */ - 0x5c5, /* SUB64ri8 */ - 0x671, /* XOR64ri8 */ - 0x1ae, /* CMP64ri8 */ + 0x50b, /* SBB64ri8 */ + 0x90, /* AND64ri8 */ + 0x5ce, /* SUB64ri8 */ + 0x67b, /* XOR64ri8 */ + 0x1b2, /* CMP64ri8 */ /* Table952 */ - 0x5fb, /* TEST64rm */ - 0x5fc, /* TEST64rr */ + 0x605, /* TEST64rm */ + 0x606, /* TEST64rr */ /* Table954 */ - 0x64f, /* XCHG64rm */ - 0x650, /* XCHG64rr */ + 0x659, /* XCHG64rm */ + 0x65a, /* XCHG64rr */ /* Table956 */ - 0x339, /* MOV64mr */ - 0x344, /* MOV64rr */ + 0x33f, /* MOV64mr */ + 0x34a, /* MOV64rr */ /* Table958 */ - 0x343, /* MOV64rm */ - 0x345, /* MOV64rr_REV */ + 0x349, /* MOV64rm */ + 0x34b, /* MOV64rr_REV */ /* Table960 */ - 0x33a, /* MOV64ms */ - 0x346, /* MOV64rs */ + 0x340, /* MOV64ms */ + 0x34c, /* MOV64rs */ /* Table962 */ - 0x294, /* LEA64r */ + 0x29a, /* LEA64r */ 0x0, /* */ /* Table964 */ - 0x347, /* MOV64sm */ - 0x348, /* MOV64sr */ + 0x34d, /* MOV64sm */ + 0x34e, /* MOV64sr */ /* Table966 */ - 0x64e, /* XCHG64ar */ + 0x658, /* XCHG64ar */ /* Table967 */ - 0x11e, /* CDQE */ + 0x122, /* CDQE */ /* Table968 */ - 0x1c9, /* CQO */ + 0x1cf, /* CQO */ /* Table969 */ - 0x33d, /* MOV64o64a */ + 0x343, /* MOV64o64a */ /* Table970 */ - 0x334, /* MOV64ao64 */ + 0x33a, /* MOV64ao64 */ /* Table971 */ - 0x360, /* MOVSQ */ + 0x366, /* MOVSQ */ /* Table972 */ - 0x1bb, /* CMPSQ */ + 0x1c1, /* CMPSQ */ /* Table973 */ - 0x5f6, /* TEST64i32 */ + 0x600, /* TEST64i32 */ /* Table974 */ - 0x5a8, /* STOSQ */ + 0x5b1, /* STOSQ */ /* Table975 */ - 0x2eb, /* LODSQ */ + 0x2f1, /* LODSQ */ /* Table976 */ - 0x511, /* SCASQ */ + 0x51a, /* SCASQ */ /* Table977 */ - 0x341, /* MOV64ri */ + 0x347, /* MOV64ri */ /* Table978 */ - 0x490, /* ROL64mi */ - 0x4a8, /* ROR64mi */ - 0x437, /* RCL64mi */ - 0x44f, /* RCR64mi */ - 0x552, /* SHL64mi */ - 0x57a, /* SHR64mi */ - 0x4c6, /* SAL64mi */ - 0x4df, /* SAR64mi */ - 0x493, /* ROL64ri */ - 0x4ab, /* ROR64ri */ - 0x43a, /* RCL64ri */ - 0x452, /* RCR64ri */ - 0x555, /* SHL64ri */ - 0x57d, /* SHR64ri */ - 0x4c9, /* SAL64ri */ - 0x4e2, /* SAR64ri */ + 0x497, /* ROL64mi */ + 0x4af, /* ROR64mi */ + 0x43e, /* RCL64mi */ + 0x456, /* RCR64mi */ + 0x55b, /* SHL64mi */ + 0x583, /* SHR64mi */ + 0x4cd, /* SAL64mi */ + 0x4e6, /* SAR64mi */ + 0x49a, /* ROL64ri */ + 0x4b2, /* ROR64ri */ + 0x441, /* RCL64ri */ + 0x459, /* RCR64ri */ + 0x55e, /* SHL64ri */ + 0x586, /* SHR64ri */ + 0x4d0, /* SAL64ri */ + 0x4e9, /* SAR64ri */ /* Table994 */ - 0x338, /* MOV64mi32 */ + 0x33e, /* MOV64mi32 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27041,7 +27085,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x342, /* MOV64ri32 */ + 0x348, /* MOV64ri32 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27050,187 +27094,187 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table1010 */ - 0x2f1, /* LRETIQ */ + 0x2f7, /* LRETIQ */ /* Table1011 */ - 0x2f4, /* LRETQ */ + 0x2fa, /* LRETQ */ /* Table1012 */ - 0x243, /* IRET64 */ + 0x249, /* IRET64 */ /* Table1013 */ - 0x48e, /* ROL64m1 */ - 0x4a6, /* ROR64m1 */ - 0x435, /* RCL64m1 */ - 0x44d, /* RCR64m1 */ - 0x550, /* SHL64m1 */ - 0x578, /* SHR64m1 */ - 0x4c4, /* SAL64m1 */ - 0x4dd, /* SAR64m1 */ - 0x491, /* ROL64r1 */ - 0x4a9, /* ROR64r1 */ - 0x438, /* RCL64r1 */ - 0x450, /* RCR64r1 */ - 0x553, /* SHL64r1 */ - 0x57b, /* SHR64r1 */ - 0x4c7, /* SAL64r1 */ - 0x4e0, /* SAR64r1 */ + 0x495, /* ROL64m1 */ + 0x4ad, /* ROR64m1 */ + 0x43c, /* RCL64m1 */ + 0x454, /* RCR64m1 */ + 0x559, /* SHL64m1 */ + 0x581, /* SHR64m1 */ + 0x4cb, /* SAL64m1 */ + 0x4e4, /* SAR64m1 */ + 0x498, /* ROL64r1 */ + 0x4b0, /* ROR64r1 */ + 0x43f, /* RCL64r1 */ + 0x457, /* RCR64r1 */ + 0x55c, /* SHL64r1 */ + 0x584, /* SHR64r1 */ + 0x4ce, /* SAL64r1 */ + 0x4e7, /* SAR64r1 */ /* Table1029 */ - 0x48f, /* ROL64mCL */ - 0x4a7, /* ROR64mCL */ - 0x436, /* RCL64mCL */ - 0x44e, /* RCR64mCL */ - 0x551, /* SHL64mCL */ - 0x579, /* SHR64mCL */ - 0x4c5, /* SAL64mCL */ - 0x4de, /* SAR64mCL */ - 0x492, /* ROL64rCL */ - 0x4aa, /* ROR64rCL */ - 0x439, /* RCL64rCL */ - 0x451, /* RCR64rCL */ - 0x554, /* SHL64rCL */ - 0x57c, /* SHR64rCL */ - 0x4c8, /* SAL64rCL */ - 0x4e1, /* SAR64rCL */ + 0x496, /* ROL64mCL */ + 0x4ae, /* ROR64mCL */ + 0x43d, /* RCL64mCL */ + 0x455, /* RCR64mCL */ + 0x55a, /* SHL64mCL */ + 0x582, /* SHR64mCL */ + 0x4cc, /* SAL64mCL */ + 0x4e5, /* SAR64mCL */ + 0x499, /* ROL64rCL */ + 0x4b1, /* ROR64rCL */ + 0x440, /* RCL64rCL */ + 0x458, /* RCR64rCL */ + 0x55d, /* SHL64rCL */ + 0x585, /* SHR64rCL */ + 0x4cf, /* SAL64rCL */ + 0x4e8, /* SAR64rCL */ /* Table1045 */ - 0x5f7, /* TEST64mi32 */ - 0x5f8, /* TEST64mi32_alt */ - 0x3b3, /* NOT64m */ - 0x38b, /* NEG64m */ - 0x37f, /* MUL64m */ - 0x212, /* IMUL64m */ - 0x1e1, /* DIV64m */ - 0x1fe, /* IDIV64m */ - 0x5f9, /* TEST64ri32 */ - 0x5fa, /* TEST64ri32_alt */ - 0x3b4, /* NOT64r */ - 0x38c, /* NEG64r */ - 0x380, /* MUL64r */ - 0x213, /* IMUL64r */ - 0x1e2, /* DIV64r */ - 0x1ff, /* IDIV64r */ + 0x601, /* TEST64mi32 */ + 0x602, /* TEST64mi32_alt */ + 0x3b9, /* NOT64m */ + 0x391, /* NEG64m */ + 0x385, /* MUL64m */ + 0x218, /* IMUL64m */ + 0x1e7, /* DIV64m */ + 0x204, /* IDIV64m */ + 0x603, /* TEST64ri32 */ + 0x604, /* TEST64ri32_alt */ + 0x3ba, /* NOT64r */ + 0x392, /* NEG64r */ + 0x386, /* MUL64r */ + 0x219, /* IMUL64r */ + 0x1e8, /* DIV64r */ + 0x205, /* IDIV64r */ /* Table1061 */ - 0x22c, /* INC64m */ - 0x1d9, /* DEC64m */ - 0x117, /* CALL64m */ - 0x1f1, /* FARCALL64 */ - 0x267, /* JMP64m */ - 0x1f6, /* FARJMP64 */ - 0x412, /* PUSH64rmm */ + 0x232, /* INC64m */ + 0x1df, /* DEC64m */ + 0x11b, /* CALL64m */ + 0x1f7, /* FARCALL64 */ + 0x26d, /* JMP64m */ + 0x1fc, /* FARJMP64 */ + 0x419, /* PUSH64rmm */ 0x0, /* */ - 0x22d, /* INC64r */ - 0x1da, /* DEC64r */ - 0x119, /* CALL64r */ + 0x233, /* INC64r */ + 0x1e0, /* DEC64r */ + 0x11d, /* CALL64r */ 0x0, /* */ - 0x268, /* JMP64r */ + 0x26e, /* JMP64r */ 0x0, /* */ - 0x413, /* PUSH64rmr */ + 0x41a, /* PUSH64rmr */ 0x0, /* */ /* Table1077 */ - 0x40e, /* PUSH64i16 */ + 0x415, /* PUSH64i16 */ /* Table1078 */ - 0x33b, /* MOV64o16a */ + 0x341, /* MOV64o16a */ /* Table1079 */ - 0x332, /* MOV64ao16 */ + 0x338, /* MOV64ao16 */ /* Table1080 */ - 0x228, /* INC64_16m */ - 0x1d5, /* DEC64_16m */ - 0x117, /* CALL64m */ - 0x1ee, /* FARCALL16m */ - 0x267, /* JMP64m */ - 0x1f3, /* FARJMP16m */ - 0x408, /* PUSH16rmm */ + 0x22e, /* INC64_16m */ + 0x1db, /* DEC64_16m */ + 0x11b, /* CALL64m */ + 0x1f4, /* FARCALL16m */ + 0x26d, /* JMP64m */ + 0x1f9, /* FARJMP16m */ + 0x40f, /* PUSH16rmm */ 0x0, /* */ - 0x229, /* INC64_16r */ - 0x1d6, /* DEC64_16r */ - 0x119, /* CALL64r */ + 0x22f, /* INC64_16r */ + 0x1dc, /* DEC64_16r */ + 0x11d, /* CALL64r */ 0x0, /* */ - 0x268, /* JMP64r */ + 0x26e, /* JMP64r */ 0x0, /* */ - 0x409, /* PUSH16rmr */ + 0x410, /* PUSH16rmr */ 0x0, /* */ /* Table1096 */ - 0x253, /* JECXZ_64 */ + 0x259, /* JECXZ_64 */ /* Table1097 */ - 0x22c, /* INC64m */ - 0x1d9, /* DEC64m */ - 0x117, /* CALL64m */ - 0x1f1, /* FARCALL64 */ - 0x267, /* JMP64m */ - 0x1f6, /* FARJMP64 */ - 0x408, /* PUSH16rmm */ + 0x232, /* INC64m */ + 0x1df, /* DEC64m */ + 0x11b, /* CALL64m */ + 0x1f7, /* FARCALL64 */ + 0x26d, /* JMP64m */ + 0x1fc, /* FARJMP64 */ + 0x40f, /* PUSH16rmm */ 0x0, /* */ - 0x22d, /* INC64r */ - 0x1da, /* DEC64r */ - 0x119, /* CALL64r */ + 0x233, /* INC64r */ + 0x1e0, /* DEC64r */ + 0x11d, /* CALL64r */ 0x0, /* */ - 0x268, /* JMP64r */ + 0x26e, /* JMP64r */ 0x0, /* */ - 0x409, /* PUSH16rmr */ + 0x410, /* PUSH16rmr */ 0x0, /* */ /* Table1113 */ - 0x598, /* SLDT16m */ - 0x5ad, /* STRm */ - 0x2a5, /* LLDT16m */ - 0x2ff, /* LTRm */ - 0x619, /* VERRm */ - 0x61b, /* VERWm */ + 0x5a1, /* SLDT16m */ + 0x5b6, /* STRm */ + 0x2ab, /* LLDT16m */ + 0x305, /* LTRm */ + 0x623, /* VERRm */ + 0x625, /* VERWm */ 0x0, /* */ 0x0, /* */ - 0x59a, /* SLDT32r */ - 0x5ab, /* STR32r */ - 0x2a6, /* LLDT16r */ - 0x300, /* LTRr */ - 0x61a, /* VERRr */ - 0x61c, /* VERWr */ + 0x5a3, /* SLDT32r */ + 0x5b4, /* STR32r */ + 0x2ac, /* LLDT16r */ + 0x306, /* LTRr */ + 0x624, /* VERRr */ + 0x626, /* VERWr */ 0x0, /* */ 0x0, /* */ /* Table1129 */ - 0x542, /* SGDT32m */ - 0x595, /* SIDT32m */ - 0x29d, /* LGDT32m */ - 0x2a3, /* LIDT32m */ - 0x59d, /* SMSW16m */ + 0x54b, /* SGDT32m */ + 0x59e, /* SIDT32m */ + 0x2a3, /* LGDT32m */ + 0x2a9, /* LIDT32m */ + 0x5a6, /* SMSW16m */ 0x0, /* */ - 0x2a7, /* LMSW16m */ - 0x23a, /* INVLPG */ + 0x2ad, /* LMSW16m */ + 0x240, /* INVLPG */ 0x0, /* */ - 0x61d, /* VMCALL */ - 0x620, /* VMLAUNCH */ - 0x62a, /* VMRESUME */ - 0x633, /* VMXOFF */ + 0x627, /* VMCALL */ + 0x62a, /* VMLAUNCH */ + 0x634, /* VMRESUME */ + 0x63d, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x11f, /* CLAC */ - 0x5a1, /* STAC */ + 0x123, /* CLAC */ + 0x5aa, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x658, /* XGETBV */ - 0x683, /* XSETBV */ + 0x662, /* XGETBV */ + 0x68e, /* XSETBV */ 0x0, /* */ 0x0, /* */ - 0x61f, /* VMFUNC */ + 0x629, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x62b, /* VMRUN32 */ - 0x623, /* VMMCALL */ - 0x621, /* VMLOAD32 */ - 0x62d, /* VMSAVE32 */ - 0x5a4, /* STGI */ - 0x122, /* CLGI */ - 0x597, /* SKINIT */ - 0x23b, /* INVLPGA32 */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ + 0x635, /* VMRUN32 */ + 0x62d, /* VMMCALL */ + 0x62b, /* VMLOAD32 */ + 0x637, /* VMSAVE32 */ + 0x5ad, /* STGI */ + 0x126, /* CLGI */ + 0x5a0, /* SKINIT */ + 0x241, /* INVLPGA32 */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27239,16 +27283,16 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x5d1, /* SWAPGS */ - 0x466, /* RDTSCP */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x5db, /* SWAPGS */ + 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27256,236 +27300,236 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table1201 */ - 0x285, /* LAR32rm */ - 0x286, /* LAR32rr */ + 0x28b, /* LAR32rm */ + 0x28c, /* LAR32rr */ /* Table1203 */ - 0x2f8, /* LSL32rm */ - 0x2f9, /* LSL32rr */ + 0x2fe, /* LSL32rm */ + 0x2ff, /* LSL32rr */ /* Table1205 */ - 0x5d2, /* SYSCALL */ + 0x5dc, /* SYSCALL */ /* Table1206 */ - 0x124, /* CLTS */ + 0x128, /* CLTS */ /* Table1207 */ - 0x5d6, /* SYSRET */ + 0x5e0, /* SYSRET */ /* Table1208 */ - 0x237, /* INVD */ + 0x23d, /* INVD */ /* Table1209 */ - 0x636, /* WBINVD */ + 0x640, /* WBINVD */ /* Table1210 */ - 0x60b, /* TRAP */ + 0x615, /* TRAP */ /* Table1211 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x398, /* NOOP18_m4 */ - 0x399, /* NOOP18_m5 */ - 0x39a, /* NOOP18_m6 */ - 0x39b, /* NOOP18_m7 */ + 0x39e, /* NOOP18_m4 */ + 0x39f, /* NOOP18_m5 */ + 0x3a0, /* NOOP18_m6 */ + 0x3a1, /* NOOP18_m7 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x39c, /* NOOP18_r4 */ - 0x39d, /* NOOP18_r5 */ - 0x39e, /* NOOP18_r6 */ - 0x39f, /* NOOP18_r7 */ + 0x3a2, /* NOOP18_r4 */ + 0x3a3, /* NOOP18_r5 */ + 0x3a4, /* NOOP18_r6 */ + 0x3a5, /* NOOP18_r7 */ /* Table1227 */ - 0x3a2, /* NOOPL_19 */ - 0x3a0, /* NOOP19rr */ + 0x3a8, /* NOOPL_19 */ + 0x3a6, /* NOOP19rr */ /* Table1229 */ - 0x3a3, /* NOOPL_1a */ + 0x3a9, /* NOOPL_1a */ 0x0, /* */ /* Table1231 */ - 0x3a4, /* NOOPL_1b */ + 0x3aa, /* NOOPL_1b */ 0x0, /* */ /* Table1233 */ - 0x3a5, /* NOOPL_1c */ + 0x3ab, /* NOOPL_1c */ 0x0, /* */ /* Table1235 */ - 0x3a6, /* NOOPL_1d */ + 0x3ac, /* NOOPL_1d */ 0x0, /* */ /* Table1237 */ - 0x3a7, /* NOOPL_1e */ + 0x3ad, /* NOOPL_1e */ 0x0, /* */ /* Table1239 */ - 0x3a1, /* NOOPL */ + 0x3a7, /* NOOPL */ 0x0, /* */ /* Table1241 */ 0x0, /* */ - 0x327, /* MOV32rc */ + 0x32d, /* MOV32rc */ /* Table1243 */ 0x0, /* */ - 0x328, /* MOV32rd */ + 0x32e, /* MOV32rd */ /* Table1245 */ 0x0, /* */ - 0x31f, /* MOV32cr */ + 0x325, /* MOV32cr */ /* Table1247 */ 0x0, /* */ - 0x320, /* MOV32dr */ + 0x326, /* MOV32dr */ /* Table1249 */ - 0x63e, /* WRMSR */ + 0x648, /* WRMSR */ /* Table1250 */ - 0x465, /* RDTSC */ + 0x46c, /* RDTSC */ /* Table1251 */ - 0x45d, /* RDMSR */ + 0x464, /* RDMSR */ /* Table1252 */ - 0x45e, /* RDPMC */ + 0x465, /* RDPMC */ /* Table1253 */ - 0x5d3, /* SYSENTER */ + 0x5dd, /* SYSENTER */ /* Table1254 */ - 0x5d4, /* SYSEXIT */ + 0x5de, /* SYSEXIT */ /* Table1255 */ - 0x1f8, /* GETSEC */ + 0x1fe, /* GETSEC */ /* Table1256 */ - 0x176, /* CMOVO32rm */ - 0x177, /* CMOVO32rr */ + 0x17a, /* CMOVO32rm */ + 0x17b, /* CMOVO32rr */ /* Table1258 */ - 0x164, /* CMOVNO32rm */ - 0x165, /* CMOVNO32rr */ + 0x168, /* CMOVNO32rm */ + 0x169, /* CMOVNO32rr */ /* Table1260 */ - 0x134, /* CMOVB32rm */ - 0x135, /* CMOVB32rr */ + 0x138, /* CMOVB32rm */ + 0x139, /* CMOVB32rr */ /* Table1262 */ - 0x12e, /* CMOVAE32rm */ - 0x12f, /* CMOVAE32rr */ + 0x132, /* CMOVAE32rm */ + 0x133, /* CMOVAE32rr */ /* Table1264 */ - 0x140, /* CMOVE32rm */ - 0x141, /* CMOVE32rr */ + 0x144, /* CMOVE32rm */ + 0x145, /* CMOVE32rr */ /* Table1266 */ - 0x15e, /* CMOVNE32rm */ - 0x15f, /* CMOVNE32rr */ + 0x162, /* CMOVNE32rm */ + 0x163, /* CMOVNE32rr */ /* Table1268 */ - 0x13a, /* CMOVBE32rm */ - 0x13b, /* CMOVBE32rr */ + 0x13e, /* CMOVBE32rm */ + 0x13f, /* CMOVBE32rr */ /* Table1270 */ - 0x128, /* CMOVA32rm */ - 0x129, /* CMOVA32rr */ + 0x12c, /* CMOVA32rm */ + 0x12d, /* CMOVA32rr */ /* Table1272 */ - 0x182, /* CMOVS32rm */ - 0x183, /* CMOVS32rr */ + 0x186, /* CMOVS32rm */ + 0x187, /* CMOVS32rr */ /* Table1274 */ - 0x170, /* CMOVNS32rm */ - 0x171, /* CMOVNS32rr */ + 0x174, /* CMOVNS32rm */ + 0x175, /* CMOVNS32rr */ /* Table1276 */ - 0x17c, /* CMOVP32rm */ - 0x17d, /* CMOVP32rr */ + 0x180, /* CMOVP32rm */ + 0x181, /* CMOVP32rr */ /* Table1278 */ - 0x16a, /* CMOVNP32rm */ - 0x16b, /* CMOVNP32rr */ + 0x16e, /* CMOVNP32rm */ + 0x16f, /* CMOVNP32rr */ /* Table1280 */ - 0x152, /* CMOVL32rm */ - 0x153, /* CMOVL32rr */ + 0x156, /* CMOVL32rm */ + 0x157, /* CMOVL32rr */ /* Table1282 */ - 0x14c, /* CMOVGE32rm */ - 0x14d, /* CMOVGE32rr */ + 0x150, /* CMOVGE32rm */ + 0x151, /* CMOVGE32rr */ /* Table1284 */ - 0x158, /* CMOVLE32rm */ - 0x159, /* CMOVLE32rr */ + 0x15c, /* CMOVLE32rm */ + 0x15d, /* CMOVLE32rr */ /* Table1286 */ - 0x146, /* CMOVG32rm */ - 0x147, /* CMOVG32rr */ + 0x14a, /* CMOVG32rm */ + 0x14b, /* CMOVG32rr */ /* Table1288 */ - 0x626, /* VMREAD32rm */ - 0x627, /* VMREAD32rr */ + 0x630, /* VMREAD32rm */ + 0x631, /* VMREAD32rr */ /* Table1290 */ - 0x62f, /* VMWRITE32rm */ - 0x630, /* VMWRITE32rr */ + 0x639, /* VMWRITE32rm */ + 0x63a, /* VMWRITE32rr */ /* Table1292 */ - 0x27a, /* JO_4 */ + 0x280, /* JO_4 */ /* Table1293 */ - 0x271, /* JNO_4 */ + 0x277, /* JNO_4 */ /* Table1294 */ - 0x250, /* JB_4 */ + 0x256, /* JB_4 */ /* Table1295 */ - 0x247, /* JAE_4 */ + 0x24d, /* JAE_4 */ /* Table1296 */ - 0x256, /* JE_4 */ + 0x25c, /* JE_4 */ /* Table1297 */ - 0x26e, /* JNE_4 */ + 0x274, /* JNE_4 */ /* Table1298 */ - 0x24d, /* JBE_4 */ + 0x253, /* JBE_4 */ /* Table1299 */ - 0x24a, /* JA_4 */ + 0x250, /* JA_4 */ /* Table1300 */ - 0x281, /* JS_4 */ + 0x287, /* JS_4 */ /* Table1301 */ - 0x277, /* JNS_4 */ + 0x27d, /* JNS_4 */ /* Table1302 */ - 0x27d, /* JP_4 */ + 0x283, /* JP_4 */ /* Table1303 */ - 0x274, /* JNP_4 */ + 0x27a, /* JNP_4 */ /* Table1304 */ - 0x262, /* JL_4 */ + 0x268, /* JL_4 */ /* Table1305 */ - 0x259, /* JGE_4 */ + 0x25f, /* JGE_4 */ /* Table1306 */ - 0x25f, /* JLE_4 */ + 0x265, /* JLE_4 */ /* Table1307 */ - 0x25c, /* JG_4 */ + 0x262, /* JG_4 */ /* Table1308 */ - 0x53b, /* SETOm */ - 0x53c, /* SETOr */ + 0x544, /* SETOm */ + 0x545, /* SETOr */ /* Table1310 */ - 0x535, /* SETNOm */ - 0x536, /* SETNOr */ + 0x53e, /* SETNOm */ + 0x53f, /* SETNOr */ /* Table1312 */ - 0x527, /* SETBm */ - 0x528, /* SETBr */ + 0x530, /* SETBm */ + 0x531, /* SETBr */ /* Table1314 */ - 0x51d, /* SETAEm */ - 0x51e, /* SETAEr */ + 0x526, /* SETAEm */ + 0x527, /* SETAEr */ /* Table1316 */ - 0x529, /* SETEm */ - 0x52a, /* SETEr */ + 0x532, /* SETEm */ + 0x533, /* SETEr */ /* Table1318 */ - 0x533, /* SETNEm */ - 0x534, /* SETNEr */ + 0x53c, /* SETNEm */ + 0x53d, /* SETNEr */ /* Table1320 */ - 0x521, /* SETBEm */ - 0x522, /* SETBEr */ + 0x52a, /* SETBEm */ + 0x52b, /* SETBEr */ /* Table1322 */ - 0x51f, /* SETAm */ - 0x520, /* SETAr */ + 0x528, /* SETAm */ + 0x529, /* SETAr */ /* Table1324 */ - 0x53f, /* SETSm */ - 0x540, /* SETSr */ + 0x548, /* SETSm */ + 0x549, /* SETSr */ /* Table1326 */ - 0x539, /* SETNSm */ - 0x53a, /* SETNSr */ + 0x542, /* SETNSm */ + 0x543, /* SETNSr */ /* Table1328 */ - 0x53d, /* SETPm */ - 0x53e, /* SETPr */ + 0x546, /* SETPm */ + 0x547, /* SETPr */ /* Table1330 */ - 0x537, /* SETNPm */ - 0x538, /* SETNPr */ + 0x540, /* SETNPm */ + 0x541, /* SETNPr */ /* Table1332 */ - 0x531, /* SETLm */ - 0x532, /* SETLr */ + 0x53a, /* SETLm */ + 0x53b, /* SETLr */ /* Table1334 */ - 0x52b, /* SETGEm */ - 0x52c, /* SETGEr */ + 0x534, /* SETGEm */ + 0x535, /* SETGEr */ /* Table1336 */ - 0x52f, /* SETLEm */ - 0x530, /* SETLEr */ + 0x538, /* SETLEm */ + 0x539, /* SETLEr */ /* Table1338 */ - 0x52d, /* SETGm */ - 0x52e, /* SETGr */ + 0x536, /* SETGm */ + 0x537, /* SETGr */ /* Table1340 */ - 0x420, /* PUSHFS32 */ + 0x427, /* PUSHFS32 */ /* Table1341 */ - 0x3ff, /* POPFS32 */ + 0x406, /* POPFS32 */ /* Table1342 */ - 0x1c7, /* CPUID32 */ + 0x1cd, /* CPUID32 */ /* Table1343 */ - 0xe4, /* BT32mr */ - 0xe6, /* BT32rr */ + 0xe8, /* BT32mr */ + 0xea, /* BT32rr */ /* Table1345 */ - 0x561, /* SHLD32mri8 */ - 0x563, /* SHLD32rri8 */ + 0x56a, /* SHLD32mri8 */ + 0x56c, /* SHLD32rri8 */ /* Table1347 */ - 0x560, /* SHLD32mrCL */ - 0x562, /* SHLD32rrCL */ + 0x569, /* SHLD32mrCL */ + 0x56b, /* SHLD32rrCL */ /* Table1349 */ 0x0, /* */ 0x0, /* */ @@ -27495,7 +27539,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x30b, /* MONTMUL */ + 0x311, /* MONTMUL */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27503,7 +27547,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x684, /* XSHA1 */ + 0x68f, /* XSHA1 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27511,7 +27555,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x685, /* XSHA256 */ + 0x690, /* XSHA256 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27568,7 +27612,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x686, /* XSTORE */ + 0x691, /* XSTORE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27576,7 +27620,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x656, /* XCRYPTECB */ + 0x660, /* XCRYPTECB */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27584,7 +27628,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x653, /* XCRYPTCBC */ + 0x65d, /* XCRYPTCBC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27592,7 +27636,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x655, /* XCRYPTCTR */ + 0x65f, /* XCRYPTCTR */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27600,7 +27644,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x654, /* XCRYPTCFB */ + 0x65e, /* XCRYPTCFB */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27608,7 +27652,7 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x657, /* XCRYPTOFB */ + 0x661, /* XCRYPTOFB */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27633,28 +27677,28 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table1493 */ - 0x423, /* PUSHGS32 */ + 0x42a, /* PUSHGS32 */ /* Table1494 */ - 0x402, /* POPGS32 */ + 0x409, /* POPGS32 */ /* Table1495 */ - 0x4b6, /* RSM */ + 0x4bd, /* RSM */ /* Table1496 */ - 0x108, /* BTS32mr */ - 0x10a, /* BTS32rr */ + 0x10c, /* BTS32mr */ + 0x10e, /* BTS32rr */ /* Table1498 */ - 0x589, /* SHRD32mri8 */ - 0x58b, /* SHRD32rri8 */ + 0x592, /* SHRD32mri8 */ + 0x594, /* SHRD32rri8 */ /* Table1500 */ - 0x588, /* SHRD32mrCL */ - 0x58a, /* SHRD32rrCL */ + 0x591, /* SHRD32mrCL */ + 0x593, /* SHRD32rrCL */ /* Table1502 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x67f, /* XSAVE */ - 0x67d, /* XRSTOR */ - 0x681, /* XSAVEOPT */ + 0x68a, /* XSAVE */ + 0x688, /* XRSTOR */ + 0x68c, /* XSAVEOPT */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27665,140 +27709,140 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table1518 */ - 0x20c, /* IMUL32rm */ - 0x20f, /* IMUL32rr */ + 0x212, /* IMUL32rm */ + 0x215, /* IMUL32rr */ /* Table1520 */ - 0x1c5, /* CMPXCHG8rm */ - 0x1c6, /* CMPXCHG8rr */ + 0x1cb, /* CMPXCHG8rm */ + 0x1cc, /* CMPXCHG8rr */ /* Table1522 */ - 0x1c0, /* CMPXCHG32rm */ - 0x1c1, /* CMPXCHG32rr */ + 0x1c6, /* CMPXCHG32rm */ + 0x1c7, /* CMPXCHG32rr */ /* Table1524 */ - 0x2fd, /* LSS32rm */ + 0x303, /* LSS32rm */ 0x0, /* */ /* Table1526 */ - 0xfc, /* BTR32mr */ - 0xfe, /* BTR32rr */ + 0x100, /* BTR32mr */ + 0x102, /* BTR32rr */ /* Table1528 */ - 0x29a, /* LFS32rm */ + 0x2a0, /* LFS32rm */ 0x0, /* */ /* Table1530 */ - 0x2a0, /* LGS32rm */ + 0x2a6, /* LGS32rm */ 0x0, /* */ /* Table1532 */ - 0x374, /* MOVZX32rm8 */ - 0x376, /* MOVZX32rr8 */ + 0x37a, /* MOVZX32rm8 */ + 0x37c, /* MOVZX32rr8 */ /* Table1534 */ - 0x373, /* MOVZX32rm16 */ - 0x375, /* MOVZX32rr16 */ + 0x379, /* MOVZX32rm16 */ + 0x37b, /* MOVZX32rr16 */ /* Table1536 */ - 0x616, /* UD2B */ + 0x620, /* UD2B */ /* Table1537 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xe3, /* BT32mi8 */ - 0x107, /* BTS32mi8 */ - 0xfb, /* BTR32mi8 */ - 0xef, /* BTC32mi8 */ + 0xe7, /* BT32mi8 */ + 0x10b, /* BTS32mi8 */ + 0xff, /* BTR32mi8 */ + 0xf3, /* BTC32mi8 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xe5, /* BT32ri8 */ - 0x109, /* BTS32ri8 */ - 0xfd, /* BTR32ri8 */ - 0xf1, /* BTC32ri8 */ + 0xe9, /* BT32ri8 */ + 0x10d, /* BTS32ri8 */ + 0x101, /* BTR32ri8 */ + 0xf5, /* BTC32ri8 */ /* Table1553 */ - 0xf0, /* BTC32mr */ - 0xf2, /* BTC32rr */ + 0xf4, /* BTC32mr */ + 0xf6, /* BTC32rr */ /* Table1555 */ - 0xd3, /* BSF32rm */ - 0xd4, /* BSF32rr */ + 0xd7, /* BSF32rm */ + 0xd8, /* BSF32rr */ /* Table1557 */ - 0xd9, /* BSR32rm */ - 0xda, /* BSR32rr */ + 0xdd, /* BSR32rm */ + 0xde, /* BSR32rr */ /* Table1559 */ - 0x365, /* MOVSX32rm8 */ - 0x367, /* MOVSX32rr8 */ + 0x36b, /* MOVSX32rm8 */ + 0x36d, /* MOVSX32rr8 */ /* Table1561 */ - 0x364, /* MOVSX32rm16 */ - 0x366, /* MOVSX32rr16 */ + 0x36a, /* MOVSX32rm16 */ + 0x36c, /* MOVSX32rr16 */ /* Table1563 */ - 0x645, /* XADD8rm */ - 0x646, /* XADD8rr */ + 0x64f, /* XADD8rm */ + 0x650, /* XADD8rr */ /* Table1565 */ - 0x641, /* XADD32rm */ - 0x642, /* XADD32rr */ + 0x64b, /* XADD32rm */ + 0x64c, /* XADD32rr */ /* Table1567 */ 0x0, /* */ - 0x1c4, /* CMPXCHG8B */ + 0x1ca, /* CMPXCHG8B */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x624, /* VMPTRLDm */ - 0x625, /* VMPTRSTm */ + 0x62e, /* VMPTRLDm */ + 0x62f, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x460, /* RDRAND32r */ - 0x463, /* RDSEED32r */ + 0x467, /* RDRAND32r */ + 0x46a, /* RDSEED32r */ /* Table1583 */ - 0xdd, /* BSWAP32r */ + 0xe1, /* BSWAP32r */ /* Table1584 */ - 0x543, /* SGDT64m */ - 0x596, /* SIDT64m */ - 0x29e, /* LGDT64m */ - 0x2a4, /* LIDT64m */ - 0x59d, /* SMSW16m */ + 0x54c, /* SGDT64m */ + 0x59f, /* SIDT64m */ + 0x2a4, /* LGDT64m */ + 0x2aa, /* LIDT64m */ + 0x5a6, /* SMSW16m */ 0x0, /* */ - 0x2a7, /* LMSW16m */ - 0x23a, /* INVLPG */ + 0x2ad, /* LMSW16m */ + 0x240, /* INVLPG */ 0x0, /* */ - 0x61d, /* VMCALL */ - 0x620, /* VMLAUNCH */ - 0x62a, /* VMRESUME */ - 0x633, /* VMXOFF */ + 0x627, /* VMCALL */ + 0x62a, /* VMLAUNCH */ + 0x634, /* VMRESUME */ + 0x63d, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x11f, /* CLAC */ - 0x5a1, /* STAC */ + 0x123, /* CLAC */ + 0x5aa, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x658, /* XGETBV */ - 0x683, /* XSETBV */ + 0x662, /* XGETBV */ + 0x68e, /* XSETBV */ 0x0, /* */ 0x0, /* */ - 0x61f, /* VMFUNC */ + 0x629, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x62c, /* VMRUN64 */ - 0x623, /* VMMCALL */ - 0x622, /* VMLOAD64 */ - 0x62e, /* VMSAVE64 */ - 0x5a4, /* STGI */ - 0x122, /* CLGI */ - 0x597, /* SKINIT */ - 0x23c, /* INVLPGA64 */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ - 0x59f, /* SMSW32r */ + 0x636, /* VMRUN64 */ + 0x62d, /* VMMCALL */ + 0x62c, /* VMLOAD64 */ + 0x638, /* VMSAVE64 */ + 0x5ad, /* STGI */ + 0x126, /* CLGI */ + 0x5a0, /* SKINIT */ + 0x242, /* INVLPGA64 */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ + 0x5a8, /* SMSW32r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27807,16 +27851,16 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x5d1, /* SWAPGS */ - 0x466, /* RDTSCP */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x5db, /* SWAPGS */ + 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27825,98 +27869,98 @@ static const InstrUID modRMTable[] = { 0x0, /* */ /* Table1656 */ 0x0, /* */ - 0x33f, /* MOV64rc */ + 0x345, /* MOV64rc */ /* Table1658 */ 0x0, /* */ - 0x340, /* MOV64rd */ + 0x346, /* MOV64rd */ /* Table1660 */ 0x0, /* */ - 0x336, /* MOV64cr */ + 0x33c, /* MOV64cr */ /* Table1662 */ 0x0, /* */ - 0x337, /* MOV64dr */ + 0x33d, /* MOV64dr */ /* Table1664 */ - 0x628, /* VMREAD64rm */ - 0x629, /* VMREAD64rr */ + 0x632, /* VMREAD64rm */ + 0x633, /* VMREAD64rr */ /* Table1666 */ - 0x631, /* VMWRITE64rm */ - 0x632, /* VMWRITE64rr */ + 0x63b, /* VMWRITE64rm */ + 0x63c, /* VMWRITE64rr */ /* Table1668 */ - 0x421, /* PUSHFS64 */ + 0x428, /* PUSHFS64 */ /* Table1669 */ - 0x400, /* POPFS64 */ + 0x407, /* POPFS64 */ /* Table1670 */ - 0x1c8, /* CPUID64 */ + 0x1ce, /* CPUID64 */ /* Table1671 */ - 0x424, /* PUSHGS64 */ + 0x42b, /* PUSHGS64 */ /* Table1672 */ - 0x403, /* POPGS64 */ + 0x40a, /* POPGS64 */ /* Table1673 */ - 0x598, /* SLDT16m */ - 0x5ad, /* STRm */ - 0x2a5, /* LLDT16m */ - 0x2ff, /* LTRm */ - 0x619, /* VERRm */ - 0x61b, /* VERWm */ + 0x5a1, /* SLDT16m */ + 0x5b6, /* STRm */ + 0x2ab, /* LLDT16m */ + 0x305, /* LTRm */ + 0x623, /* VERRm */ + 0x625, /* VERWm */ 0x0, /* */ 0x0, /* */ - 0x599, /* SLDT16r */ - 0x5aa, /* STR16r */ - 0x2a6, /* LLDT16r */ - 0x300, /* LTRr */ - 0x61a, /* VERRr */ - 0x61c, /* VERWr */ + 0x5a2, /* SLDT16r */ + 0x5b3, /* STR16r */ + 0x2ac, /* LLDT16r */ + 0x306, /* LTRr */ + 0x624, /* VERRr */ + 0x626, /* VERWr */ 0x0, /* */ 0x0, /* */ /* Table1689 */ - 0x541, /* SGDT16m */ - 0x594, /* SIDT16m */ - 0x29c, /* LGDT16m */ - 0x2a2, /* LIDT16m */ - 0x59d, /* SMSW16m */ + 0x54a, /* SGDT16m */ + 0x59d, /* SIDT16m */ + 0x2a2, /* LGDT16m */ + 0x2a8, /* LIDT16m */ + 0x5a6, /* SMSW16m */ 0x0, /* */ - 0x2a7, /* LMSW16m */ - 0x23a, /* INVLPG */ + 0x2ad, /* LMSW16m */ + 0x240, /* INVLPG */ 0x0, /* */ - 0x61d, /* VMCALL */ - 0x620, /* VMLAUNCH */ - 0x62a, /* VMRESUME */ - 0x633, /* VMXOFF */ + 0x627, /* VMCALL */ + 0x62a, /* VMLAUNCH */ + 0x634, /* VMRESUME */ + 0x63d, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x11f, /* CLAC */ - 0x5a1, /* STAC */ + 0x123, /* CLAC */ + 0x5aa, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x658, /* XGETBV */ - 0x683, /* XSETBV */ + 0x662, /* XGETBV */ + 0x68e, /* XSETBV */ 0x0, /* */ 0x0, /* */ - 0x61f, /* VMFUNC */ + 0x629, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x62b, /* VMRUN32 */ - 0x623, /* VMMCALL */ - 0x621, /* VMLOAD32 */ - 0x62d, /* VMSAVE32 */ - 0x5a4, /* STGI */ - 0x122, /* CLGI */ - 0x597, /* SKINIT */ - 0x23b, /* INVLPGA32 */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ + 0x635, /* VMRUN32 */ + 0x62d, /* VMMCALL */ + 0x62b, /* VMLOAD32 */ + 0x637, /* VMSAVE32 */ + 0x5ad, /* STGI */ + 0x126, /* CLGI */ + 0x5a0, /* SKINIT */ + 0x241, /* INVLPGA32 */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27925,16 +27969,16 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x5d1, /* SWAPGS */ - 0x466, /* RDTSCP */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x5db, /* SWAPGS */ + 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -27942,320 +27986,320 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table1761 */ - 0x283, /* LAR16rm */ - 0x284, /* LAR16rr */ + 0x289, /* LAR16rm */ + 0x28a, /* LAR16rr */ /* Table1763 */ - 0x2f6, /* LSL16rm */ - 0x2f7, /* LSL16rr */ + 0x2fc, /* LSL16rm */ + 0x2fd, /* LSL16rr */ /* Table1765 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x390, /* NOOP18_16m4 */ - 0x391, /* NOOP18_16m5 */ - 0x392, /* NOOP18_16m6 */ - 0x393, /* NOOP18_16m7 */ + 0x396, /* NOOP18_16m4 */ + 0x397, /* NOOP18_16m5 */ + 0x398, /* NOOP18_16m6 */ + 0x399, /* NOOP18_16m7 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x394, /* NOOP18_16r4 */ - 0x395, /* NOOP18_16r5 */ - 0x396, /* NOOP18_16r6 */ - 0x397, /* NOOP18_16r7 */ + 0x39a, /* NOOP18_16r4 */ + 0x39b, /* NOOP18_16r5 */ + 0x39c, /* NOOP18_16r6 */ + 0x39d, /* NOOP18_16r7 */ /* Table1781 */ - 0x3a9, /* NOOPW_19 */ - 0x3a0, /* NOOP19rr */ + 0x3af, /* NOOPW_19 */ + 0x3a6, /* NOOP19rr */ /* Table1783 */ - 0x3aa, /* NOOPW_1a */ + 0x3b0, /* NOOPW_1a */ 0x0, /* */ /* Table1785 */ - 0x3ab, /* NOOPW_1b */ + 0x3b1, /* NOOPW_1b */ 0x0, /* */ /* Table1787 */ - 0x3ac, /* NOOPW_1c */ + 0x3b2, /* NOOPW_1c */ 0x0, /* */ /* Table1789 */ - 0x3ad, /* NOOPW_1d */ + 0x3b3, /* NOOPW_1d */ 0x0, /* */ /* Table1791 */ - 0x3ae, /* NOOPW_1e */ + 0x3b4, /* NOOPW_1e */ 0x0, /* */ /* Table1793 */ - 0x3a8, /* NOOPW */ + 0x3ae, /* NOOPW */ 0x0, /* */ /* Table1795 */ - 0x174, /* CMOVO16rm */ - 0x175, /* CMOVO16rr */ + 0x178, /* CMOVO16rm */ + 0x179, /* CMOVO16rr */ /* Table1797 */ - 0x162, /* CMOVNO16rm */ - 0x163, /* CMOVNO16rr */ + 0x166, /* CMOVNO16rm */ + 0x167, /* CMOVNO16rr */ /* Table1799 */ - 0x132, /* CMOVB16rm */ - 0x133, /* CMOVB16rr */ + 0x136, /* CMOVB16rm */ + 0x137, /* CMOVB16rr */ /* Table1801 */ - 0x12c, /* CMOVAE16rm */ - 0x12d, /* CMOVAE16rr */ + 0x130, /* CMOVAE16rm */ + 0x131, /* CMOVAE16rr */ /* Table1803 */ - 0x13e, /* CMOVE16rm */ - 0x13f, /* CMOVE16rr */ + 0x142, /* CMOVE16rm */ + 0x143, /* CMOVE16rr */ /* Table1805 */ - 0x15c, /* CMOVNE16rm */ - 0x15d, /* CMOVNE16rr */ + 0x160, /* CMOVNE16rm */ + 0x161, /* CMOVNE16rr */ /* Table1807 */ - 0x138, /* CMOVBE16rm */ - 0x139, /* CMOVBE16rr */ + 0x13c, /* CMOVBE16rm */ + 0x13d, /* CMOVBE16rr */ /* Table1809 */ - 0x126, /* CMOVA16rm */ - 0x127, /* CMOVA16rr */ + 0x12a, /* CMOVA16rm */ + 0x12b, /* CMOVA16rr */ /* Table1811 */ - 0x180, /* CMOVS16rm */ - 0x181, /* CMOVS16rr */ + 0x184, /* CMOVS16rm */ + 0x185, /* CMOVS16rr */ /* Table1813 */ - 0x16e, /* CMOVNS16rm */ - 0x16f, /* CMOVNS16rr */ + 0x172, /* CMOVNS16rm */ + 0x173, /* CMOVNS16rr */ /* Table1815 */ - 0x17a, /* CMOVP16rm */ - 0x17b, /* CMOVP16rr */ + 0x17e, /* CMOVP16rm */ + 0x17f, /* CMOVP16rr */ /* Table1817 */ - 0x168, /* CMOVNP16rm */ - 0x169, /* CMOVNP16rr */ + 0x16c, /* CMOVNP16rm */ + 0x16d, /* CMOVNP16rr */ /* Table1819 */ - 0x150, /* CMOVL16rm */ - 0x151, /* CMOVL16rr */ + 0x154, /* CMOVL16rm */ + 0x155, /* CMOVL16rr */ /* Table1821 */ - 0x14a, /* CMOVGE16rm */ - 0x14b, /* CMOVGE16rr */ + 0x14e, /* CMOVGE16rm */ + 0x14f, /* CMOVGE16rr */ /* Table1823 */ - 0x156, /* CMOVLE16rm */ - 0x157, /* CMOVLE16rr */ + 0x15a, /* CMOVLE16rm */ + 0x15b, /* CMOVLE16rr */ /* Table1825 */ - 0x144, /* CMOVG16rm */ - 0x145, /* CMOVG16rr */ + 0x148, /* CMOVG16rm */ + 0x149, /* CMOVG16rr */ /* Table1827 */ - 0x279, /* JO_2 */ + 0x27f, /* JO_2 */ /* Table1828 */ - 0x270, /* JNO_2 */ + 0x276, /* JNO_2 */ /* Table1829 */ - 0x24f, /* JB_2 */ + 0x255, /* JB_2 */ /* Table1830 */ - 0x246, /* JAE_2 */ + 0x24c, /* JAE_2 */ /* Table1831 */ - 0x255, /* JE_2 */ + 0x25b, /* JE_2 */ /* Table1832 */ - 0x26d, /* JNE_2 */ + 0x273, /* JNE_2 */ /* Table1833 */ - 0x24c, /* JBE_2 */ + 0x252, /* JBE_2 */ /* Table1834 */ - 0x249, /* JA_2 */ + 0x24f, /* JA_2 */ /* Table1835 */ - 0x280, /* JS_2 */ + 0x286, /* JS_2 */ /* Table1836 */ - 0x276, /* JNS_2 */ + 0x27c, /* JNS_2 */ /* Table1837 */ - 0x27c, /* JP_2 */ + 0x282, /* JP_2 */ /* Table1838 */ - 0x273, /* JNP_2 */ + 0x279, /* JNP_2 */ /* Table1839 */ - 0x261, /* JL_2 */ + 0x267, /* JL_2 */ /* Table1840 */ - 0x258, /* JGE_2 */ + 0x25e, /* JGE_2 */ /* Table1841 */ - 0x25e, /* JLE_2 */ + 0x264, /* JLE_2 */ /* Table1842 */ - 0x25b, /* JG_2 */ + 0x261, /* JG_2 */ /* Table1843 */ - 0x41f, /* PUSHFS16 */ + 0x426, /* PUSHFS16 */ /* Table1844 */ - 0x3fe, /* POPFS16 */ + 0x405, /* POPFS16 */ /* Table1845 */ - 0xe0, /* BT16mr */ - 0xe2, /* BT16rr */ + 0xe4, /* BT16mr */ + 0xe6, /* BT16rr */ /* Table1847 */ - 0x55d, /* SHLD16mri8 */ - 0x55f, /* SHLD16rri8 */ + 0x566, /* SHLD16mri8 */ + 0x568, /* SHLD16rri8 */ /* Table1849 */ - 0x55c, /* SHLD16mrCL */ - 0x55e, /* SHLD16rrCL */ + 0x565, /* SHLD16mrCL */ + 0x567, /* SHLD16rrCL */ /* Table1851 */ - 0x422, /* PUSHGS16 */ + 0x429, /* PUSHGS16 */ /* Table1852 */ - 0x401, /* POPGS16 */ + 0x408, /* POPGS16 */ /* Table1853 */ - 0x104, /* BTS16mr */ - 0x106, /* BTS16rr */ + 0x108, /* BTS16mr */ + 0x10a, /* BTS16rr */ /* Table1855 */ - 0x585, /* SHRD16mri8 */ - 0x587, /* SHRD16rri8 */ + 0x58e, /* SHRD16mri8 */ + 0x590, /* SHRD16rri8 */ /* Table1857 */ - 0x584, /* SHRD16mrCL */ - 0x586, /* SHRD16rrCL */ + 0x58d, /* SHRD16mrCL */ + 0x58f, /* SHRD16rrCL */ /* Table1859 */ - 0x204, /* IMUL16rm */ - 0x207, /* IMUL16rr */ + 0x20a, /* IMUL16rm */ + 0x20d, /* IMUL16rr */ /* Table1861 */ - 0x1be, /* CMPXCHG16rm */ - 0x1bf, /* CMPXCHG16rr */ + 0x1c4, /* CMPXCHG16rm */ + 0x1c5, /* CMPXCHG16rr */ /* Table1863 */ - 0x2fc, /* LSS16rm */ + 0x302, /* LSS16rm */ 0x0, /* */ /* Table1865 */ - 0xf8, /* BTR16mr */ - 0xfa, /* BTR16rr */ + 0xfc, /* BTR16mr */ + 0xfe, /* BTR16rr */ /* Table1867 */ - 0x299, /* LFS16rm */ + 0x29f, /* LFS16rm */ 0x0, /* */ /* Table1869 */ - 0x29f, /* LGS16rm */ + 0x2a5, /* LGS16rm */ 0x0, /* */ /* Table1871 */ - 0x36f, /* MOVZX16rm8 */ - 0x370, /* MOVZX16rr8 */ + 0x375, /* MOVZX16rm8 */ + 0x376, /* MOVZX16rr8 */ /* Table1873 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xdf, /* BT16mi8 */ - 0x103, /* BTS16mi8 */ - 0xf7, /* BTR16mi8 */ - 0xeb, /* BTC16mi8 */ + 0xe3, /* BT16mi8 */ + 0x107, /* BTS16mi8 */ + 0xfb, /* BTR16mi8 */ + 0xef, /* BTC16mi8 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xe1, /* BT16ri8 */ - 0x105, /* BTS16ri8 */ - 0xf9, /* BTR16ri8 */ - 0xed, /* BTC16ri8 */ + 0xe5, /* BT16ri8 */ + 0x109, /* BTS16ri8 */ + 0xfd, /* BTR16ri8 */ + 0xf1, /* BTC16ri8 */ /* Table1889 */ - 0xec, /* BTC16mr */ - 0xee, /* BTC16rr */ + 0xf0, /* BTC16mr */ + 0xf2, /* BTC16rr */ /* Table1891 */ - 0xd1, /* BSF16rm */ - 0xd2, /* BSF16rr */ + 0xd5, /* BSF16rm */ + 0xd6, /* BSF16rr */ /* Table1893 */ - 0xd7, /* BSR16rm */ - 0xd8, /* BSR16rr */ + 0xdb, /* BSR16rm */ + 0xdc, /* BSR16rr */ /* Table1895 */ - 0x362, /* MOVSX16rm8 */ - 0x363, /* MOVSX16rr8 */ + 0x368, /* MOVSX16rm8 */ + 0x369, /* MOVSX16rr8 */ /* Table1897 */ - 0x63f, /* XADD16rm */ - 0x640, /* XADD16rr */ + 0x649, /* XADD16rm */ + 0x64a, /* XADD16rr */ /* Table1899 */ 0x0, /* */ - 0x1c4, /* CMPXCHG8B */ + 0x1ca, /* CMPXCHG8B */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x61e, /* VMCLEARm */ - 0x625, /* VMPTRSTm */ + 0x628, /* VMCLEARm */ + 0x62f, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x45f, /* RDRAND16r */ - 0x462, /* RDSEED16r */ + 0x466, /* RDRAND16r */ + 0x469, /* RDSEED16r */ /* Table1915 */ - 0x60e, /* TZCNT32rm */ - 0x60f, /* TZCNT32rr */ + 0x618, /* TZCNT32rm */ + 0x619, /* TZCNT32rr */ /* Table1917 */ - 0x307, /* LZCNT32rm */ - 0x308, /* LZCNT32rr */ + 0x30d, /* LZCNT32rm */ + 0x30e, /* LZCNT32rr */ /* Table1919 */ 0x0, /* */ - 0x1c4, /* CMPXCHG8B */ + 0x1ca, /* CMPXCHG8B */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x634, /* VMXON */ - 0x625, /* VMPTRSTm */ + 0x63e, /* VMXON */ + 0x62f, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x460, /* RDRAND32r */ - 0x463, /* RDSEED32r */ + 0x467, /* RDRAND32r */ + 0x46a, /* RDSEED32r */ /* Table1935 */ - 0x60c, /* TZCNT16rm */ - 0x60d, /* TZCNT16rr */ + 0x616, /* TZCNT16rm */ + 0x617, /* TZCNT16rr */ /* Table1937 */ - 0x305, /* LZCNT16rm */ - 0x306, /* LZCNT16rr */ + 0x30b, /* LZCNT16rm */ + 0x30c, /* LZCNT16rr */ /* Table1939 */ - 0x59b, /* SLDT64m */ - 0x5ad, /* STRm */ - 0x2a5, /* LLDT16m */ - 0x2ff, /* LTRm */ - 0x619, /* VERRm */ - 0x61b, /* VERWm */ + 0x5a4, /* SLDT64m */ + 0x5b6, /* STRm */ + 0x2ab, /* LLDT16m */ + 0x305, /* LTRm */ + 0x623, /* VERRm */ + 0x625, /* VERWm */ 0x0, /* */ 0x0, /* */ - 0x59c, /* SLDT64r */ - 0x5ac, /* STR64r */ - 0x2a6, /* LLDT16r */ - 0x300, /* LTRr */ - 0x61a, /* VERRr */ - 0x61c, /* VERWr */ + 0x5a5, /* SLDT64r */ + 0x5b5, /* STR64r */ + 0x2ac, /* LLDT16r */ + 0x306, /* LTRr */ + 0x624, /* VERRr */ + 0x626, /* VERWr */ 0x0, /* */ 0x0, /* */ /* Table1955 */ - 0x543, /* SGDT64m */ - 0x596, /* SIDT64m */ - 0x29e, /* LGDT64m */ - 0x2a4, /* LIDT64m */ - 0x59d, /* SMSW16m */ + 0x54c, /* SGDT64m */ + 0x59f, /* SIDT64m */ + 0x2a4, /* LGDT64m */ + 0x2aa, /* LIDT64m */ + 0x5a6, /* SMSW16m */ 0x0, /* */ - 0x2a7, /* LMSW16m */ - 0x23a, /* INVLPG */ + 0x2ad, /* LMSW16m */ + 0x240, /* INVLPG */ 0x0, /* */ - 0x61d, /* VMCALL */ - 0x620, /* VMLAUNCH */ - 0x62a, /* VMRESUME */ - 0x633, /* VMXOFF */ + 0x627, /* VMCALL */ + 0x62a, /* VMLAUNCH */ + 0x634, /* VMRESUME */ + 0x63d, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x11f, /* CLAC */ - 0x5a1, /* STAC */ + 0x123, /* CLAC */ + 0x5aa, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x658, /* XGETBV */ - 0x683, /* XSETBV */ + 0x662, /* XGETBV */ + 0x68e, /* XSETBV */ 0x0, /* */ 0x0, /* */ - 0x61f, /* VMFUNC */ + 0x629, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x62c, /* VMRUN64 */ - 0x623, /* VMMCALL */ - 0x622, /* VMLOAD64 */ - 0x62e, /* VMSAVE64 */ - 0x5a4, /* STGI */ - 0x122, /* CLGI */ - 0x597, /* SKINIT */ - 0x23c, /* INVLPGA64 */ - 0x5a0, /* SMSW64r */ - 0x5a0, /* SMSW64r */ - 0x5a0, /* SMSW64r */ - 0x5a0, /* SMSW64r */ - 0x5a0, /* SMSW64r */ - 0x5a0, /* SMSW64r */ - 0x5a0, /* SMSW64r */ - 0x5a0, /* SMSW64r */ + 0x636, /* VMRUN64 */ + 0x62d, /* VMMCALL */ + 0x62c, /* VMLOAD64 */ + 0x638, /* VMSAVE64 */ + 0x5ad, /* STGI */ + 0x126, /* CLGI */ + 0x5a0, /* SKINIT */ + 0x242, /* INVLPGA64 */ + 0x5a9, /* SMSW64r */ + 0x5a9, /* SMSW64r */ + 0x5a9, /* SMSW64r */ + 0x5a9, /* SMSW64r */ + 0x5a9, /* SMSW64r */ + 0x5a9, /* SMSW64r */ + 0x5a9, /* SMSW64r */ + 0x5a9, /* SMSW64r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -28264,16 +28308,16 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x5d1, /* SWAPGS */ - 0x466, /* RDTSCP */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x5db, /* SWAPGS */ + 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -28281,89 +28325,89 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table2027 */ - 0x287, /* LAR64rm */ - 0x288, /* LAR64rr */ + 0x28d, /* LAR64rm */ + 0x28e, /* LAR64rr */ /* Table2029 */ - 0x2fa, /* LSL64rm */ - 0x2fb, /* LSL64rr */ + 0x300, /* LSL64rm */ + 0x301, /* LSL64rr */ /* Table2031 */ - 0x5d7, /* SYSRET64 */ + 0x5e1, /* SYSRET64 */ /* Table2032 */ - 0x5d5, /* SYSEXIT64 */ + 0x5df, /* SYSEXIT64 */ /* Table2033 */ - 0x178, /* CMOVO64rm */ - 0x179, /* CMOVO64rr */ + 0x17c, /* CMOVO64rm */ + 0x17d, /* CMOVO64rr */ /* Table2035 */ - 0x166, /* CMOVNO64rm */ - 0x167, /* CMOVNO64rr */ + 0x16a, /* CMOVNO64rm */ + 0x16b, /* CMOVNO64rr */ /* Table2037 */ - 0x136, /* CMOVB64rm */ - 0x137, /* CMOVB64rr */ + 0x13a, /* CMOVB64rm */ + 0x13b, /* CMOVB64rr */ /* Table2039 */ - 0x130, /* CMOVAE64rm */ - 0x131, /* CMOVAE64rr */ + 0x134, /* CMOVAE64rm */ + 0x135, /* CMOVAE64rr */ /* Table2041 */ - 0x142, /* CMOVE64rm */ - 0x143, /* CMOVE64rr */ + 0x146, /* CMOVE64rm */ + 0x147, /* CMOVE64rr */ /* Table2043 */ - 0x160, /* CMOVNE64rm */ - 0x161, /* CMOVNE64rr */ + 0x164, /* CMOVNE64rm */ + 0x165, /* CMOVNE64rr */ /* Table2045 */ - 0x13c, /* CMOVBE64rm */ - 0x13d, /* CMOVBE64rr */ + 0x140, /* CMOVBE64rm */ + 0x141, /* CMOVBE64rr */ /* Table2047 */ - 0x12a, /* CMOVA64rm */ - 0x12b, /* CMOVA64rr */ + 0x12e, /* CMOVA64rm */ + 0x12f, /* CMOVA64rr */ /* Table2049 */ - 0x184, /* CMOVS64rm */ - 0x185, /* CMOVS64rr */ + 0x188, /* CMOVS64rm */ + 0x189, /* CMOVS64rr */ /* Table2051 */ - 0x172, /* CMOVNS64rm */ - 0x173, /* CMOVNS64rr */ + 0x176, /* CMOVNS64rm */ + 0x177, /* CMOVNS64rr */ /* Table2053 */ - 0x17e, /* CMOVP64rm */ - 0x17f, /* CMOVP64rr */ + 0x182, /* CMOVP64rm */ + 0x183, /* CMOVP64rr */ /* Table2055 */ - 0x16c, /* CMOVNP64rm */ - 0x16d, /* CMOVNP64rr */ + 0x170, /* CMOVNP64rm */ + 0x171, /* CMOVNP64rr */ /* Table2057 */ - 0x154, /* CMOVL64rm */ - 0x155, /* CMOVL64rr */ + 0x158, /* CMOVL64rm */ + 0x159, /* CMOVL64rr */ /* Table2059 */ - 0x14e, /* CMOVGE64rm */ - 0x14f, /* CMOVGE64rr */ + 0x152, /* CMOVGE64rm */ + 0x153, /* CMOVGE64rr */ /* Table2061 */ - 0x15a, /* CMOVLE64rm */ - 0x15b, /* CMOVLE64rr */ + 0x15e, /* CMOVLE64rm */ + 0x15f, /* CMOVLE64rr */ /* Table2063 */ - 0x148, /* CMOVG64rm */ - 0x149, /* CMOVG64rr */ + 0x14c, /* CMOVG64rm */ + 0x14d, /* CMOVG64rr */ /* Table2065 */ - 0xe8, /* BT64mr */ - 0xea, /* BT64rr */ + 0xec, /* BT64mr */ + 0xee, /* BT64rr */ /* Table2067 */ - 0x565, /* SHLD64mri8 */ - 0x567, /* SHLD64rri8 */ + 0x56e, /* SHLD64mri8 */ + 0x570, /* SHLD64rri8 */ /* Table2069 */ - 0x564, /* SHLD64mrCL */ - 0x566, /* SHLD64rrCL */ + 0x56d, /* SHLD64mrCL */ + 0x56f, /* SHLD64rrCL */ /* Table2071 */ - 0x10c, /* BTS64mr */ - 0x10e, /* BTS64rr */ + 0x110, /* BTS64mr */ + 0x112, /* BTS64rr */ /* Table2073 */ - 0x58d, /* SHRD64mri8 */ - 0x58f, /* SHRD64rri8 */ + 0x596, /* SHRD64mri8 */ + 0x598, /* SHRD64rri8 */ /* Table2075 */ - 0x58c, /* SHRD64mrCL */ - 0x58e, /* SHRD64rrCL */ + 0x595, /* SHRD64mrCL */ + 0x597, /* SHRD64rrCL */ /* Table2077 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x680, /* XSAVE64 */ - 0x67e, /* XRSTOR64 */ - 0x682, /* XSAVEOPT64 */ + 0x68b, /* XSAVE64 */ + 0x689, /* XRSTOR64 */ + 0x68d, /* XSAVEOPT64 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -28374,132 +28418,132 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ /* Table2093 */ - 0x214, /* IMUL64rm */ - 0x217, /* IMUL64rr */ + 0x21a, /* IMUL64rm */ + 0x21d, /* IMUL64rr */ /* Table2095 */ - 0x1c2, /* CMPXCHG64rm */ - 0x1c3, /* CMPXCHG64rr */ + 0x1c8, /* CMPXCHG64rm */ + 0x1c9, /* CMPXCHG64rr */ /* Table2097 */ - 0x2fe, /* LSS64rm */ + 0x304, /* LSS64rm */ 0x0, /* */ /* Table2099 */ - 0x100, /* BTR64mr */ - 0x102, /* BTR64rr */ + 0x104, /* BTR64mr */ + 0x106, /* BTR64rr */ /* Table2101 */ - 0x29b, /* LFS64rm */ + 0x2a1, /* LFS64rm */ 0x0, /* */ /* Table2103 */ - 0x2a1, /* LGS64rm */ + 0x2a7, /* LGS64rm */ 0x0, /* */ /* Table2105 */ - 0x378, /* MOVZX64rm8_Q */ - 0x37a, /* MOVZX64rr8_Q */ + 0x37e, /* MOVZX64rm8_Q */ + 0x380, /* MOVZX64rr8_Q */ /* Table2107 */ - 0x377, /* MOVZX64rm16_Q */ - 0x379, /* MOVZX64rr16_Q */ + 0x37d, /* MOVZX64rm16_Q */ + 0x37f, /* MOVZX64rr16_Q */ /* Table2109 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xe7, /* BT64mi8 */ - 0x10b, /* BTS64mi8 */ - 0xff, /* BTR64mi8 */ - 0xf3, /* BTC64mi8 */ + 0xeb, /* BT64mi8 */ + 0x10f, /* BTS64mi8 */ + 0x103, /* BTR64mi8 */ + 0xf7, /* BTC64mi8 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xe9, /* BT64ri8 */ - 0x10d, /* BTS64ri8 */ - 0x101, /* BTR64ri8 */ - 0xf5, /* BTC64ri8 */ + 0xed, /* BT64ri8 */ + 0x111, /* BTS64ri8 */ + 0x105, /* BTR64ri8 */ + 0xf9, /* BTC64ri8 */ /* Table2125 */ - 0xf4, /* BTC64mr */ - 0xf6, /* BTC64rr */ + 0xf8, /* BTC64mr */ + 0xfa, /* BTC64rr */ /* Table2127 */ - 0xd5, /* BSF64rm */ - 0xd6, /* BSF64rr */ + 0xd9, /* BSF64rm */ + 0xda, /* BSF64rr */ /* Table2129 */ - 0xdb, /* BSR64rm */ - 0xdc, /* BSR64rr */ + 0xdf, /* BSR64rm */ + 0xe0, /* BSR64rr */ /* Table2131 */ - 0x36b, /* MOVSX64rm8 */ - 0x36e, /* MOVSX64rr8 */ + 0x371, /* MOVSX64rm8 */ + 0x374, /* MOVSX64rr8 */ /* Table2133 */ - 0x369, /* MOVSX64rm16 */ - 0x36c, /* MOVSX64rr16 */ + 0x36f, /* MOVSX64rm16 */ + 0x372, /* MOVSX64rr16 */ /* Table2135 */ - 0x643, /* XADD64rm */ - 0x644, /* XADD64rr */ + 0x64d, /* XADD64rm */ + 0x64e, /* XADD64rr */ /* Table2137 */ 0x0, /* */ - 0x1bd, /* CMPXCHG16B */ + 0x1c3, /* CMPXCHG16B */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x624, /* VMPTRLDm */ - 0x625, /* VMPTRSTm */ + 0x62e, /* VMPTRLDm */ + 0x62f, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x461, /* RDRAND64r */ - 0x464, /* RDSEED64r */ + 0x468, /* RDRAND64r */ + 0x46b, /* RDSEED64r */ /* Table2153 */ - 0xde, /* BSWAP64r */ + 0xe2, /* BSWAP64r */ /* Table2154 */ - 0x543, /* SGDT64m */ - 0x596, /* SIDT64m */ - 0x29e, /* LGDT64m */ - 0x2a4, /* LIDT64m */ - 0x59d, /* SMSW16m */ + 0x54c, /* SGDT64m */ + 0x59f, /* SIDT64m */ + 0x2a4, /* LGDT64m */ + 0x2aa, /* LIDT64m */ + 0x5a6, /* SMSW16m */ 0x0, /* */ - 0x2a7, /* LMSW16m */ - 0x23a, /* INVLPG */ + 0x2ad, /* LMSW16m */ + 0x240, /* INVLPG */ 0x0, /* */ - 0x61d, /* VMCALL */ - 0x620, /* VMLAUNCH */ - 0x62a, /* VMRESUME */ - 0x633, /* VMXOFF */ + 0x627, /* VMCALL */ + 0x62a, /* VMLAUNCH */ + 0x634, /* VMRESUME */ + 0x63d, /* VMXOFF */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x11f, /* CLAC */ - 0x5a1, /* STAC */ + 0x123, /* CLAC */ + 0x5aa, /* STAC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x658, /* XGETBV */ - 0x683, /* XSETBV */ + 0x662, /* XGETBV */ + 0x68e, /* XSETBV */ 0x0, /* */ 0x0, /* */ - 0x61f, /* VMFUNC */ + 0x629, /* VMFUNC */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x62c, /* VMRUN64 */ - 0x623, /* VMMCALL */ - 0x622, /* VMLOAD64 */ - 0x62e, /* VMSAVE64 */ - 0x5a4, /* STGI */ - 0x122, /* CLGI */ - 0x597, /* SKINIT */ - 0x23c, /* INVLPGA64 */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ - 0x59e, /* SMSW16r */ + 0x636, /* VMRUN64 */ + 0x62d, /* VMMCALL */ + 0x62c, /* VMLOAD64 */ + 0x638, /* VMSAVE64 */ + 0x5ad, /* STGI */ + 0x126, /* CLGI */ + 0x5a0, /* SKINIT */ + 0x242, /* INVLPGA64 */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ + 0x5a7, /* SMSW16r */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -28508,16 +28552,16 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x2a8, /* LMSW16r */ - 0x5d1, /* SWAPGS */ - 0x466, /* RDTSCP */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x2ae, /* LMSW16r */ + 0x5db, /* SWAPGS */ + 0x46d, /* RDTSCP */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -28529,14 +28573,14 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x67f, /* XSAVE */ - 0x67d, /* XRSTOR */ - 0x681, /* XSAVEOPT */ + 0x68a, /* XSAVE */ + 0x688, /* XRSTOR */ + 0x68c, /* XSAVEOPT */ 0x0, /* */ - 0x459, /* RDFSBASE */ - 0x45b, /* RDGSBASE */ - 0x63a, /* WRFSBASE */ - 0x63c, /* WRGSBASE */ + 0x460, /* RDFSBASE */ + 0x462, /* RDGSBASE */ + 0x644, /* WRFSBASE */ + 0x646, /* WRGSBASE */ 0x0, /* */ 0x0, /* */ 0x0, /* */ @@ -28546,274 +28590,274 @@ static const InstrUID modRMTable[] = { 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x680, /* XSAVE64 */ - 0x67e, /* XRSTOR64 */ - 0x682, /* XSAVEOPT64 */ + 0x68b, /* XSAVE64 */ + 0x689, /* XRSTOR64 */ + 0x68d, /* XSAVEOPT64 */ 0x0, /* */ - 0x45a, /* RDFSBASE64 */ - 0x45c, /* RDGSBASE64 */ - 0x63b, /* WRFSBASE64 */ - 0x63d, /* WRGSBASE64 */ + 0x461, /* RDFSBASE64 */ + 0x463, /* RDGSBASE64 */ + 0x645, /* WRFSBASE64 */ + 0x647, /* WRGSBASE64 */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2258 */ - 0x610, /* TZCNT64rm */ - 0x611, /* TZCNT64rr */ + 0x61a, /* TZCNT64rm */ + 0x61b, /* TZCNT64rr */ /* Table2260 */ - 0x309, /* LZCNT64rm */ - 0x30a, /* LZCNT64rr */ + 0x30f, /* LZCNT64rm */ + 0x310, /* LZCNT64rr */ /* Table2262 */ 0x0, /* */ - 0x1bd, /* CMPXCHG16B */ + 0x1c3, /* CMPXCHG16B */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x634, /* VMXON */ - 0x625, /* VMPTRSTm */ + 0x63e, /* VMXON */ + 0x62f, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x461, /* RDRAND64r */ - 0x464, /* RDSEED64r */ + 0x468, /* RDRAND64r */ + 0x46b, /* RDSEED64r */ /* Table2278 */ 0x0, /* */ - 0x1bd, /* CMPXCHG16B */ + 0x1c3, /* CMPXCHG16B */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x61e, /* VMCLEARm */ - 0x625, /* VMPTRSTm */ + 0x628, /* VMCLEARm */ + 0x62f, /* VMPTRSTm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0x461, /* RDRAND64r */ - 0x464, /* RDSEED64r */ + 0x468, /* RDRAND64r */ + 0x46b, /* RDSEED64r */ /* Table2294 */ - 0x35a, /* MOVBE32rm */ + 0x360, /* MOVBE32rm */ 0x0, /* */ /* Table2296 */ - 0x359, /* MOVBE32mr */ + 0x35f, /* MOVBE32mr */ 0x0, /* */ /* Table2298 */ - 0x238, /* INVEPT32 */ + 0x23e, /* INVEPT32 */ 0x0, /* */ /* Table2300 */ - 0x23f, /* INVVPID32 */ + 0x245, /* INVVPID32 */ 0x0, /* */ /* Table2302 */ - 0x23d, /* INVPCID32 */ + 0x243, /* INVPCID32 */ 0x0, /* */ /* Table2304 */ - 0x358, /* MOVBE16rm */ + 0x35e, /* MOVBE16rm */ 0x0, /* */ /* Table2306 */ - 0x357, /* MOVBE16mr */ + 0x35d, /* MOVBE16mr */ 0x0, /* */ /* Table2308 */ - 0x3e, /* ADCX32rm */ - 0x3f, /* ADCX32rr */ + 0x40, /* ADCX32rm */ + 0x41, /* ADCX32rr */ /* Table2310 */ - 0x72, /* ADOX32rm */ - 0x73, /* ADOX32rr */ + 0x75, /* ADOX32rm */ + 0x76, /* ADOX32rr */ /* Table2312 */ - 0x35c, /* MOVBE64rm */ + 0x362, /* MOVBE64rm */ 0x0, /* */ /* Table2314 */ - 0x35b, /* MOVBE64mr */ + 0x361, /* MOVBE64mr */ 0x0, /* */ /* Table2316 */ - 0x239, /* INVEPT64 */ + 0x23f, /* INVEPT64 */ 0x0, /* */ /* Table2318 */ - 0x240, /* INVVPID64 */ + 0x246, /* INVVPID64 */ 0x0, /* */ /* Table2320 */ - 0x23e, /* INVPCID64 */ + 0x244, /* INVPCID64 */ 0x0, /* */ /* Table2322 */ - 0x74, /* ADOX64rm */ - 0x75, /* ADOX64rr */ + 0x77, /* ADOX64rm */ + 0x78, /* ADOX64rr */ /* Table2324 */ - 0x40, /* ADCX64rm */ - 0x41, /* ADCX64rr */ + 0x42, /* ADCX64rm */ + 0x43, /* ADCX64rr */ /* Table2326 */ - 0x99, /* ANDN32rm */ - 0x9a, /* ANDN32rr */ + 0x9d, /* ANDN32rm */ + 0x9e, /* ANDN32rr */ /* Table2328 */ 0x0, /* */ - 0xcb, /* BLSR32rm */ - 0xc7, /* BLSMSK32rm */ - 0xbf, /* BLSI32rm */ + 0xcf, /* BLSR32rm */ + 0xcb, /* BLSMSK32rm */ + 0xc3, /* BLSI32rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xcc, /* BLSR32rr */ - 0xc8, /* BLSMSK32rr */ - 0xc0, /* BLSI32rr */ + 0xd0, /* BLSR32rr */ + 0xcc, /* BLSMSK32rr */ + 0xc4, /* BLSI32rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2344 */ - 0x10f, /* BZHI32rm */ - 0x110, /* BZHI32rr */ + 0x113, /* BZHI32rm */ + 0x114, /* BZHI32rr */ /* Table2346 */ - 0x9f, /* BEXTR32rm */ - 0xa0, /* BEXTR32rr */ + 0xa3, /* BEXTR32rm */ + 0xa4, /* BEXTR32rr */ /* Table2348 */ - 0x3e8, /* PEXT32rm */ - 0x3e9, /* PEXT32rr */ + 0x3ef, /* PEXT32rm */ + 0x3f0, /* PEXT32rr */ /* Table2350 */ - 0x4e9, /* SARX32rm */ - 0x4ea, /* SARX32rr */ + 0x4f0, /* SARX32rm */ + 0x4f1, /* SARX32rr */ /* Table2352 */ - 0x3e4, /* PDEP32rm */ - 0x3e5, /* PDEP32rr */ + 0x3eb, /* PDEP32rm */ + 0x3ec, /* PDEP32rr */ /* Table2354 */ - 0x383, /* MULX32rm */ - 0x384, /* MULX32rr */ + 0x389, /* MULX32rm */ + 0x38a, /* MULX32rr */ /* Table2356 */ - 0x590, /* SHRX32rm */ - 0x591, /* SHRX32rr */ + 0x599, /* SHRX32rm */ + 0x59a, /* SHRX32rr */ /* Table2358 */ - 0x568, /* SHLX32rm */ - 0x569, /* SHLX32rr */ + 0x571, /* SHLX32rm */ + 0x572, /* SHLX32rr */ /* Table2360 */ - 0x9b, /* ANDN64rm */ - 0x9c, /* ANDN64rr */ + 0x9f, /* ANDN64rm */ + 0xa0, /* ANDN64rr */ /* Table2362 */ 0x0, /* */ - 0xcd, /* BLSR64rm */ - 0xc9, /* BLSMSK64rm */ - 0xc1, /* BLSI64rm */ + 0xd1, /* BLSR64rm */ + 0xcd, /* BLSMSK64rm */ + 0xc5, /* BLSI64rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xce, /* BLSR64rr */ - 0xca, /* BLSMSK64rr */ - 0xc2, /* BLSI64rr */ + 0xd2, /* BLSR64rr */ + 0xce, /* BLSMSK64rr */ + 0xc6, /* BLSI64rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ /* Table2378 */ - 0x111, /* BZHI64rm */ - 0x112, /* BZHI64rr */ + 0x115, /* BZHI64rm */ + 0x116, /* BZHI64rr */ /* Table2380 */ - 0xa1, /* BEXTR64rm */ - 0xa2, /* BEXTR64rr */ + 0xa5, /* BEXTR64rm */ + 0xa6, /* BEXTR64rr */ /* Table2382 */ - 0x3ea, /* PEXT64rm */ - 0x3eb, /* PEXT64rr */ + 0x3f1, /* PEXT64rm */ + 0x3f2, /* PEXT64rr */ /* Table2384 */ - 0x4eb, /* SARX64rm */ - 0x4ec, /* SARX64rr */ + 0x4f2, /* SARX64rm */ + 0x4f3, /* SARX64rr */ /* Table2386 */ - 0x3e6, /* PDEP64rm */ - 0x3e7, /* PDEP64rr */ + 0x3ed, /* PDEP64rm */ + 0x3ee, /* PDEP64rr */ /* Table2388 */ - 0x385, /* MULX64rm */ - 0x386, /* MULX64rr */ + 0x38b, /* MULX64rm */ + 0x38c, /* MULX64rr */ /* Table2390 */ - 0x592, /* SHRX64rm */ - 0x593, /* SHRX64rr */ + 0x59b, /* SHRX64rm */ + 0x59c, /* SHRX64rr */ /* Table2392 */ - 0x56a, /* SHLX64rm */ - 0x56b, /* SHLX64rr */ + 0x573, /* SHLX64rm */ + 0x574, /* SHLX64rr */ /* Table2394 */ - 0x4b2, /* RORX32mi */ - 0x4b3, /* RORX32ri */ + 0x4b9, /* RORX32mi */ + 0x4ba, /* RORX32ri */ /* Table2396 */ - 0x4b4, /* RORX64mi */ - 0x4b5, /* RORX64ri */ + 0x4bb, /* RORX64mi */ + 0x4bc, /* RORX64ri */ /* Table2398 */ 0x0, /* */ - 0xa7, /* BLCFILL32rm */ - 0xbb, /* BLSFILL32rm */ - 0xb7, /* BLCS32rm */ - 0x612, /* TZMSK32rm */ - 0xaf, /* BLCIC32rm */ - 0xc3, /* BLSIC32rm */ - 0x5d8, /* T1MSKC32rm */ + 0xab, /* BLCFILL32rm */ + 0xbf, /* BLSFILL32rm */ + 0xbb, /* BLCS32rm */ + 0x61c, /* TZMSK32rm */ + 0xb3, /* BLCIC32rm */ + 0xc7, /* BLSIC32rm */ + 0x5e2, /* T1MSKC32rm */ 0x0, /* */ - 0xa8, /* BLCFILL32rr */ - 0xbc, /* BLSFILL32rr */ - 0xb8, /* BLCS32rr */ - 0x613, /* TZMSK32rr */ - 0xb0, /* BLCIC32rr */ - 0xc4, /* BLSIC32rr */ - 0x5d9, /* T1MSKC32rr */ + 0xac, /* BLCFILL32rr */ + 0xc0, /* BLSFILL32rr */ + 0xbc, /* BLCS32rr */ + 0x61d, /* TZMSK32rr */ + 0xb4, /* BLCIC32rr */ + 0xc8, /* BLSIC32rr */ + 0x5e3, /* T1MSKC32rr */ /* Table2414 */ 0x0, /* */ - 0xb3, /* BLCMSK32rm */ + 0xb7, /* BLCMSK32rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xab, /* BLCI32rm */ + 0xaf, /* BLCI32rm */ 0x0, /* */ 0x0, /* */ - 0xb4, /* BLCMSK32rr */ + 0xb8, /* BLCMSK32rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xac, /* BLCI32rr */ + 0xb0, /* BLCI32rr */ 0x0, /* */ /* Table2430 */ 0x0, /* */ - 0xa9, /* BLCFILL64rm */ - 0xbd, /* BLSFILL64rm */ - 0xb9, /* BLCS64rm */ - 0x614, /* TZMSK64rm */ - 0xb1, /* BLCIC64rm */ - 0xc5, /* BLSIC64rm */ - 0x5da, /* T1MSKC64rm */ + 0xad, /* BLCFILL64rm */ + 0xc1, /* BLSFILL64rm */ + 0xbd, /* BLCS64rm */ + 0x61e, /* TZMSK64rm */ + 0xb5, /* BLCIC64rm */ + 0xc9, /* BLSIC64rm */ + 0x5e4, /* T1MSKC64rm */ 0x0, /* */ - 0xaa, /* BLCFILL64rr */ - 0xbe, /* BLSFILL64rr */ - 0xba, /* BLCS64rr */ - 0x615, /* TZMSK64rr */ - 0xb2, /* BLCIC64rr */ - 0xc6, /* BLSIC64rr */ - 0x5db, /* T1MSKC64rr */ + 0xae, /* BLCFILL64rr */ + 0xc2, /* BLSFILL64rr */ + 0xbe, /* BLCS64rr */ + 0x61f, /* TZMSK64rr */ + 0xb6, /* BLCIC64rr */ + 0xca, /* BLSIC64rr */ + 0x5e5, /* T1MSKC64rr */ /* Table2446 */ 0x0, /* */ - 0xb5, /* BLCMSK64rm */ + 0xb9, /* BLCMSK64rm */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xad, /* BLCI64rm */ + 0xb1, /* BLCI64rm */ 0x0, /* */ 0x0, /* */ - 0xb6, /* BLCMSK64rr */ + 0xba, /* BLCMSK64rr */ 0x0, /* */ 0x0, /* */ 0x0, /* */ 0x0, /* */ - 0xae, /* BLCI64rr */ + 0xb2, /* BLCI64rr */ 0x0, /* */ /* Table2462 */ - 0xa3, /* BEXTRI32mi */ - 0xa4, /* BEXTRI32ri */ + 0xa7, /* BEXTRI32mi */ + 0xa8, /* BEXTRI32ri */ /* Table2464 */ - 0xa5, /* BEXTRI64mi */ - 0xa6, /* BEXTRI64ri */ + 0xa9, /* BEXTRI64mi */ + 0xaa, /* BEXTRI64ri */ 0x0 }; @@ -103363,3 +103407,4 @@ static const struct OpcodeDecision x86DisassemblerThreeByte3AOpcodes[] = { , }; static const uint8_t index_x86DisassemblerThreeByte3AOpcodes[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; + diff --git a/arch/X86/X86GenInstrInfo_reduce.inc b/arch/X86/X86GenInstrInfo_reduce.inc index 6c818e1a..6d0250a9 100644 --- a/arch/X86/X86GenInstrInfo_reduce.inc +++ b/arch/X86/X86GenInstrInfo_reduce.inc @@ -69,1623 +69,1634 @@ enum { X86_ADC64rm = 52, X86_ADC64rr = 53, X86_ADC64rr_REV = 54, - X86_ADC8i8 = 55, - X86_ADC8mi = 56, - X86_ADC8mr = 57, - X86_ADC8ri = 58, - X86_ADC8rm = 59, - X86_ADC8rr = 60, - X86_ADC8rr_REV = 61, - X86_ADCX32rm = 62, - X86_ADCX32rr = 63, - X86_ADCX64rm = 64, - X86_ADCX64rr = 65, - X86_ADD16i16 = 66, - X86_ADD16mi = 67, - X86_ADD16mi8 = 68, - X86_ADD16mr = 69, - X86_ADD16ri = 70, - X86_ADD16ri8 = 71, - X86_ADD16ri8_DB = 72, - X86_ADD16ri_DB = 73, - X86_ADD16rm = 74, - X86_ADD16rr = 75, - X86_ADD16rr_DB = 76, - X86_ADD16rr_REV = 77, - X86_ADD32i32 = 78, - X86_ADD32mi = 79, - X86_ADD32mi8 = 80, - X86_ADD32mr = 81, - X86_ADD32ri = 82, - X86_ADD32ri8 = 83, - X86_ADD32ri8_DB = 84, - X86_ADD32ri_DB = 85, - X86_ADD32rm = 86, - X86_ADD32rr = 87, - X86_ADD32rr_DB = 88, - X86_ADD32rr_REV = 89, - X86_ADD64i32 = 90, - X86_ADD64mi32 = 91, - X86_ADD64mi8 = 92, - X86_ADD64mr = 93, - X86_ADD64ri32 = 94, - X86_ADD64ri32_DB = 95, - X86_ADD64ri8 = 96, - X86_ADD64ri8_DB = 97, - X86_ADD64rm = 98, - X86_ADD64rr = 99, - X86_ADD64rr_DB = 100, - X86_ADD64rr_REV = 101, - X86_ADD8i8 = 102, - X86_ADD8mi = 103, - X86_ADD8mr = 104, - X86_ADD8ri = 105, - X86_ADD8ri8 = 106, - X86_ADD8rm = 107, - X86_ADD8rr = 108, - X86_ADD8rr_REV = 109, - X86_ADJCALLSTACKDOWN32 = 110, - X86_ADJCALLSTACKDOWN64 = 111, - X86_ADJCALLSTACKUP32 = 112, - X86_ADJCALLSTACKUP64 = 113, - X86_ADOX32rm = 114, - X86_ADOX32rr = 115, - X86_ADOX64rm = 116, - X86_ADOX64rr = 117, - X86_AND16i16 = 118, - X86_AND16mi = 119, - X86_AND16mi8 = 120, - X86_AND16mr = 121, - X86_AND16ri = 122, - X86_AND16ri8 = 123, - X86_AND16rm = 124, - X86_AND16rr = 125, - X86_AND16rr_REV = 126, - X86_AND32i32 = 127, - X86_AND32mi = 128, - X86_AND32mi8 = 129, - X86_AND32mr = 130, - X86_AND32ri = 131, - X86_AND32ri8 = 132, - X86_AND32rm = 133, - X86_AND32rr = 134, - X86_AND32rr_REV = 135, - X86_AND64i32 = 136, - X86_AND64mi32 = 137, - X86_AND64mi8 = 138, - X86_AND64mr = 139, - X86_AND64ri32 = 140, - X86_AND64ri8 = 141, - X86_AND64rm = 142, - X86_AND64rr = 143, - X86_AND64rr_REV = 144, - X86_AND8i8 = 145, - X86_AND8mi = 146, - X86_AND8mr = 147, - X86_AND8ri = 148, - X86_AND8ri8 = 149, - X86_AND8rm = 150, - X86_AND8rr = 151, - X86_AND8rr_REV = 152, - X86_ANDN32rm = 153, - X86_ANDN32rr = 154, - X86_ANDN64rm = 155, - X86_ANDN64rr = 156, - X86_ARPL16mr = 157, - X86_ARPL16rr = 158, - X86_BEXTR32rm = 159, - X86_BEXTR32rr = 160, - X86_BEXTR64rm = 161, - X86_BEXTR64rr = 162, - X86_BEXTRI32mi = 163, - X86_BEXTRI32ri = 164, - X86_BEXTRI64mi = 165, - X86_BEXTRI64ri = 166, - X86_BLCFILL32rm = 167, - X86_BLCFILL32rr = 168, - X86_BLCFILL64rm = 169, - X86_BLCFILL64rr = 170, - X86_BLCI32rm = 171, - X86_BLCI32rr = 172, - X86_BLCI64rm = 173, - X86_BLCI64rr = 174, - X86_BLCIC32rm = 175, - X86_BLCIC32rr = 176, - X86_BLCIC64rm = 177, - X86_BLCIC64rr = 178, - X86_BLCMSK32rm = 179, - X86_BLCMSK32rr = 180, - X86_BLCMSK64rm = 181, - X86_BLCMSK64rr = 182, - X86_BLCS32rm = 183, - X86_BLCS32rr = 184, - X86_BLCS64rm = 185, - X86_BLCS64rr = 186, - X86_BLSFILL32rm = 187, - X86_BLSFILL32rr = 188, - X86_BLSFILL64rm = 189, - X86_BLSFILL64rr = 190, - X86_BLSI32rm = 191, - X86_BLSI32rr = 192, - X86_BLSI64rm = 193, - X86_BLSI64rr = 194, - X86_BLSIC32rm = 195, - X86_BLSIC32rr = 196, - X86_BLSIC64rm = 197, - X86_BLSIC64rr = 198, - X86_BLSMSK32rm = 199, - X86_BLSMSK32rr = 200, - X86_BLSMSK64rm = 201, - X86_BLSMSK64rr = 202, - X86_BLSR32rm = 203, - X86_BLSR32rr = 204, - X86_BLSR64rm = 205, - X86_BLSR64rr = 206, - X86_BOUNDS16rm = 207, - X86_BOUNDS32rm = 208, - X86_BSF16rm = 209, - X86_BSF16rr = 210, - X86_BSF32rm = 211, - X86_BSF32rr = 212, - X86_BSF64rm = 213, - X86_BSF64rr = 214, - X86_BSR16rm = 215, - X86_BSR16rr = 216, - X86_BSR32rm = 217, - X86_BSR32rr = 218, - X86_BSR64rm = 219, - X86_BSR64rr = 220, - X86_BSWAP32r = 221, - X86_BSWAP64r = 222, - X86_BT16mi8 = 223, - X86_BT16mr = 224, - X86_BT16ri8 = 225, - X86_BT16rr = 226, - X86_BT32mi8 = 227, - X86_BT32mr = 228, - X86_BT32ri8 = 229, - X86_BT32rr = 230, - X86_BT64mi8 = 231, - X86_BT64mr = 232, - X86_BT64ri8 = 233, - X86_BT64rr = 234, - X86_BTC16mi8 = 235, - X86_BTC16mr = 236, - X86_BTC16ri8 = 237, - X86_BTC16rr = 238, - X86_BTC32mi8 = 239, - X86_BTC32mr = 240, - X86_BTC32ri8 = 241, - X86_BTC32rr = 242, - X86_BTC64mi8 = 243, - X86_BTC64mr = 244, - X86_BTC64ri8 = 245, - X86_BTC64rr = 246, - X86_BTR16mi8 = 247, - X86_BTR16mr = 248, - X86_BTR16ri8 = 249, - X86_BTR16rr = 250, - X86_BTR32mi8 = 251, - X86_BTR32mr = 252, - X86_BTR32ri8 = 253, - X86_BTR32rr = 254, - X86_BTR64mi8 = 255, - X86_BTR64mr = 256, - X86_BTR64ri8 = 257, - X86_BTR64rr = 258, - X86_BTS16mi8 = 259, - X86_BTS16mr = 260, - X86_BTS16ri8 = 261, - X86_BTS16rr = 262, - X86_BTS32mi8 = 263, - X86_BTS32mr = 264, - X86_BTS32ri8 = 265, - X86_BTS32rr = 266, - X86_BTS64mi8 = 267, - X86_BTS64mr = 268, - X86_BTS64ri8 = 269, - X86_BTS64rr = 270, - X86_BZHI32rm = 271, - X86_BZHI32rr = 272, - X86_BZHI64rm = 273, - X86_BZHI64rr = 274, - X86_CALL16m = 275, - X86_CALL16r = 276, - X86_CALL32m = 277, - X86_CALL32r = 278, - X86_CALL64m = 279, - X86_CALL64pcrel32 = 280, - X86_CALL64r = 281, - X86_CALLpcrel16 = 282, - X86_CALLpcrel32 = 283, - X86_CBW = 284, - X86_CDQ = 285, - X86_CDQE = 286, - X86_CLAC = 287, - X86_CLC = 288, - X86_CLD = 289, - X86_CLGI = 290, - X86_CLI = 291, - X86_CLTS = 292, - X86_CMC = 293, - X86_CMOVA16rm = 294, - X86_CMOVA16rr = 295, - X86_CMOVA32rm = 296, - X86_CMOVA32rr = 297, - X86_CMOVA64rm = 298, - X86_CMOVA64rr = 299, - X86_CMOVAE16rm = 300, - X86_CMOVAE16rr = 301, - X86_CMOVAE32rm = 302, - X86_CMOVAE32rr = 303, - X86_CMOVAE64rm = 304, - X86_CMOVAE64rr = 305, - X86_CMOVB16rm = 306, - X86_CMOVB16rr = 307, - X86_CMOVB32rm = 308, - X86_CMOVB32rr = 309, - X86_CMOVB64rm = 310, - X86_CMOVB64rr = 311, - X86_CMOVBE16rm = 312, - X86_CMOVBE16rr = 313, - X86_CMOVBE32rm = 314, - X86_CMOVBE32rr = 315, - X86_CMOVBE64rm = 316, - X86_CMOVBE64rr = 317, - X86_CMOVE16rm = 318, - X86_CMOVE16rr = 319, - X86_CMOVE32rm = 320, - X86_CMOVE32rr = 321, - X86_CMOVE64rm = 322, - X86_CMOVE64rr = 323, - X86_CMOVG16rm = 324, - X86_CMOVG16rr = 325, - X86_CMOVG32rm = 326, - X86_CMOVG32rr = 327, - X86_CMOVG64rm = 328, - X86_CMOVG64rr = 329, - X86_CMOVGE16rm = 330, - X86_CMOVGE16rr = 331, - X86_CMOVGE32rm = 332, - X86_CMOVGE32rr = 333, - X86_CMOVGE64rm = 334, - X86_CMOVGE64rr = 335, - X86_CMOVL16rm = 336, - X86_CMOVL16rr = 337, - X86_CMOVL32rm = 338, - X86_CMOVL32rr = 339, - X86_CMOVL64rm = 340, - X86_CMOVL64rr = 341, - X86_CMOVLE16rm = 342, - X86_CMOVLE16rr = 343, - X86_CMOVLE32rm = 344, - X86_CMOVLE32rr = 345, - X86_CMOVLE64rm = 346, - X86_CMOVLE64rr = 347, - X86_CMOVNE16rm = 348, - X86_CMOVNE16rr = 349, - X86_CMOVNE32rm = 350, - X86_CMOVNE32rr = 351, - X86_CMOVNE64rm = 352, - X86_CMOVNE64rr = 353, - X86_CMOVNO16rm = 354, - X86_CMOVNO16rr = 355, - X86_CMOVNO32rm = 356, - X86_CMOVNO32rr = 357, - X86_CMOVNO64rm = 358, - X86_CMOVNO64rr = 359, - X86_CMOVNP16rm = 360, - X86_CMOVNP16rr = 361, - X86_CMOVNP32rm = 362, - X86_CMOVNP32rr = 363, - X86_CMOVNP64rm = 364, - X86_CMOVNP64rr = 365, - X86_CMOVNS16rm = 366, - X86_CMOVNS16rr = 367, - X86_CMOVNS32rm = 368, - X86_CMOVNS32rr = 369, - X86_CMOVNS64rm = 370, - X86_CMOVNS64rr = 371, - X86_CMOVO16rm = 372, - X86_CMOVO16rr = 373, - X86_CMOVO32rm = 374, - X86_CMOVO32rr = 375, - X86_CMOVO64rm = 376, - X86_CMOVO64rr = 377, - X86_CMOVP16rm = 378, - X86_CMOVP16rr = 379, - X86_CMOVP32rm = 380, - X86_CMOVP32rr = 381, - X86_CMOVP64rm = 382, - X86_CMOVP64rr = 383, - X86_CMOVS16rm = 384, - X86_CMOVS16rr = 385, - X86_CMOVS32rm = 386, - X86_CMOVS32rr = 387, - X86_CMOVS64rm = 388, - X86_CMOVS64rr = 389, - X86_CMOV_FR32 = 390, - X86_CMOV_FR64 = 391, - X86_CMOV_GR16 = 392, - X86_CMOV_GR32 = 393, - X86_CMOV_GR8 = 394, - X86_CMOV_RFP32 = 395, - X86_CMOV_RFP64 = 396, - X86_CMOV_RFP80 = 397, - X86_CMOV_V16F32 = 398, - X86_CMOV_V2F64 = 399, - X86_CMOV_V2I64 = 400, - X86_CMOV_V4F32 = 401, - X86_CMOV_V4F64 = 402, - X86_CMOV_V4I64 = 403, - X86_CMOV_V8F32 = 404, - X86_CMOV_V8F64 = 405, - X86_CMOV_V8I64 = 406, - X86_CMP16i16 = 407, - X86_CMP16mi = 408, - X86_CMP16mi8 = 409, - X86_CMP16mr = 410, - X86_CMP16ri = 411, - X86_CMP16ri8 = 412, - X86_CMP16rm = 413, - X86_CMP16rr = 414, - X86_CMP16rr_REV = 415, - X86_CMP32i32 = 416, - X86_CMP32mi = 417, - X86_CMP32mi8 = 418, - X86_CMP32mr = 419, - X86_CMP32ri = 420, - X86_CMP32ri8 = 421, - X86_CMP32rm = 422, - X86_CMP32rr = 423, - X86_CMP32rr_REV = 424, - X86_CMP64i32 = 425, - X86_CMP64mi32 = 426, - X86_CMP64mi8 = 427, - X86_CMP64mr = 428, - X86_CMP64ri32 = 429, - X86_CMP64ri8 = 430, - X86_CMP64rm = 431, - X86_CMP64rr = 432, - X86_CMP64rr_REV = 433, - X86_CMP8i8 = 434, - X86_CMP8mi = 435, - X86_CMP8mr = 436, - X86_CMP8ri = 437, - X86_CMP8rm = 438, - X86_CMP8rr = 439, - X86_CMP8rr_REV = 440, - X86_CMPSB = 441, - X86_CMPSL = 442, - X86_CMPSQ = 443, - X86_CMPSW = 444, - X86_CMPXCHG16B = 445, - X86_CMPXCHG16rm = 446, - X86_CMPXCHG16rr = 447, - X86_CMPXCHG32rm = 448, - X86_CMPXCHG32rr = 449, - X86_CMPXCHG64rm = 450, - X86_CMPXCHG64rr = 451, - X86_CMPXCHG8B = 452, - X86_CMPXCHG8rm = 453, - X86_CMPXCHG8rr = 454, - X86_CPUID32 = 455, - X86_CPUID64 = 456, - X86_CQO = 457, - X86_CWD = 458, - X86_CWDE = 459, - X86_DAA = 460, - X86_DAS = 461, - X86_DATA16_PREFIX = 462, - X86_DEC16m = 463, - X86_DEC16r = 464, - X86_DEC32_16r = 465, - X86_DEC32_32r = 466, - X86_DEC32m = 467, - X86_DEC32r = 468, - X86_DEC64_16m = 469, - X86_DEC64_16r = 470, - X86_DEC64_32m = 471, - X86_DEC64_32r = 472, - X86_DEC64m = 473, - X86_DEC64r = 474, - X86_DEC8m = 475, - X86_DEC8r = 476, - X86_DIV16m = 477, - X86_DIV16r = 478, - X86_DIV32m = 479, - X86_DIV32r = 480, - X86_DIV64m = 481, - X86_DIV64r = 482, - X86_DIV8m = 483, - X86_DIV8r = 484, - X86_EH_RETURN = 485, - X86_EH_RETURN64 = 486, - X86_EH_SjLj_LongJmp32 = 487, - X86_EH_SjLj_LongJmp64 = 488, - X86_EH_SjLj_SetJmp32 = 489, - X86_EH_SjLj_SetJmp64 = 490, - X86_EH_SjLj_Setup = 491, - X86_ENTER = 492, - X86_FARCALL16i = 493, - X86_FARCALL16m = 494, - X86_FARCALL32i = 495, - X86_FARCALL32m = 496, - X86_FARCALL64 = 497, - X86_FARJMP16i = 498, - X86_FARJMP16m = 499, - X86_FARJMP32i = 500, - X86_FARJMP32m = 501, - X86_FARJMP64 = 502, - X86_FSETPM = 503, - X86_GETSEC = 504, - X86_HLT = 505, - X86_IDIV16m = 506, - X86_IDIV16r = 507, - X86_IDIV32m = 508, - X86_IDIV32r = 509, - X86_IDIV64m = 510, - X86_IDIV64r = 511, - X86_IDIV8m = 512, - X86_IDIV8r = 513, - X86_IMUL16m = 514, - X86_IMUL16r = 515, - X86_IMUL16rm = 516, - X86_IMUL16rmi = 517, - X86_IMUL16rmi8 = 518, - X86_IMUL16rr = 519, - X86_IMUL16rri = 520, - X86_IMUL16rri8 = 521, - X86_IMUL32m = 522, - X86_IMUL32r = 523, - X86_IMUL32rm = 524, - X86_IMUL32rmi = 525, - X86_IMUL32rmi8 = 526, - X86_IMUL32rr = 527, - X86_IMUL32rri = 528, - X86_IMUL32rri8 = 529, - X86_IMUL64m = 530, - X86_IMUL64r = 531, - X86_IMUL64rm = 532, - X86_IMUL64rmi32 = 533, - X86_IMUL64rmi8 = 534, - X86_IMUL64rr = 535, - X86_IMUL64rri32 = 536, - X86_IMUL64rri8 = 537, - X86_IMUL8m = 538, - X86_IMUL8r = 539, - X86_IN16ri = 540, - X86_IN16rr = 541, - X86_IN32ri = 542, - X86_IN32rr = 543, - X86_IN8ri = 544, - X86_IN8rr = 545, - X86_INC16m = 546, - X86_INC16r = 547, - X86_INC32_16r = 548, - X86_INC32_32r = 549, - X86_INC32m = 550, - X86_INC32r = 551, - X86_INC64_16m = 552, - X86_INC64_16r = 553, - X86_INC64_32m = 554, - X86_INC64_32r = 555, - X86_INC64m = 556, - X86_INC64r = 557, - X86_INC8m = 558, - X86_INC8r = 559, - X86_INSB = 560, - X86_INSL = 561, - X86_INSW = 562, - X86_INT = 563, - X86_INT1 = 564, - X86_INT3 = 565, - X86_INTO = 566, - X86_INVD = 567, - X86_INVEPT32 = 568, - X86_INVEPT64 = 569, - X86_INVLPG = 570, - X86_INVLPGA32 = 571, - X86_INVLPGA64 = 572, - X86_INVPCID32 = 573, - X86_INVPCID64 = 574, - X86_INVVPID32 = 575, - X86_INVVPID64 = 576, - X86_IRET16 = 577, - X86_IRET32 = 578, - X86_IRET64 = 579, - X86_Int_MemBarrier = 580, - X86_JAE_1 = 581, - X86_JAE_2 = 582, - X86_JAE_4 = 583, - X86_JA_1 = 584, - X86_JA_2 = 585, - X86_JA_4 = 586, - X86_JBE_1 = 587, - X86_JBE_2 = 588, - X86_JBE_4 = 589, - X86_JB_1 = 590, - X86_JB_2 = 591, - X86_JB_4 = 592, - X86_JCXZ = 593, - X86_JECXZ_32 = 594, - X86_JECXZ_64 = 595, - X86_JE_1 = 596, - X86_JE_2 = 597, - X86_JE_4 = 598, - X86_JGE_1 = 599, - X86_JGE_2 = 600, - X86_JGE_4 = 601, - X86_JG_1 = 602, - X86_JG_2 = 603, - X86_JG_4 = 604, - X86_JLE_1 = 605, - X86_JLE_2 = 606, - X86_JLE_4 = 607, - X86_JL_1 = 608, - X86_JL_2 = 609, - X86_JL_4 = 610, - X86_JMP16m = 611, - X86_JMP16r = 612, - X86_JMP32m = 613, - X86_JMP32r = 614, - X86_JMP64m = 615, - X86_JMP64r = 616, - X86_JMP_1 = 617, - X86_JMP_2 = 618, - X86_JMP_4 = 619, - X86_JNE_1 = 620, - X86_JNE_2 = 621, - X86_JNE_4 = 622, - X86_JNO_1 = 623, - X86_JNO_2 = 624, - X86_JNO_4 = 625, - X86_JNP_1 = 626, - X86_JNP_2 = 627, - X86_JNP_4 = 628, - X86_JNS_1 = 629, - X86_JNS_2 = 630, - X86_JNS_4 = 631, - X86_JO_1 = 632, - X86_JO_2 = 633, - X86_JO_4 = 634, - X86_JP_1 = 635, - X86_JP_2 = 636, - X86_JP_4 = 637, - X86_JRCXZ = 638, - X86_JS_1 = 639, - X86_JS_2 = 640, - X86_JS_4 = 641, - X86_LAHF = 642, - X86_LAR16rm = 643, - X86_LAR16rr = 644, - X86_LAR32rm = 645, - X86_LAR32rr = 646, - X86_LAR64rm = 647, - X86_LAR64rr = 648, - X86_LCMPXCHG16 = 649, - X86_LCMPXCHG16B = 650, - X86_LCMPXCHG32 = 651, - X86_LCMPXCHG64 = 652, - X86_LCMPXCHG8 = 653, - X86_LCMPXCHG8B = 654, - X86_LDS16rm = 655, - X86_LDS32rm = 656, - X86_LEA16r = 657, - X86_LEA32r = 658, - X86_LEA64_32r = 659, - X86_LEA64r = 660, - X86_LEAVE = 661, - X86_LEAVE64 = 662, - X86_LES16rm = 663, - X86_LES32rm = 664, - X86_LFS16rm = 665, - X86_LFS32rm = 666, - X86_LFS64rm = 667, - X86_LGDT16m = 668, - X86_LGDT32m = 669, - X86_LGDT64m = 670, - X86_LGS16rm = 671, - X86_LGS32rm = 672, - X86_LGS64rm = 673, - X86_LIDT16m = 674, - X86_LIDT32m = 675, - X86_LIDT64m = 676, - X86_LLDT16m = 677, - X86_LLDT16r = 678, - X86_LMSW16m = 679, - X86_LMSW16r = 680, - X86_LOCK_ADD16mi = 681, - X86_LOCK_ADD16mi8 = 682, - X86_LOCK_ADD16mr = 683, - X86_LOCK_ADD32mi = 684, - X86_LOCK_ADD32mi8 = 685, - X86_LOCK_ADD32mr = 686, - X86_LOCK_ADD64mi32 = 687, - X86_LOCK_ADD64mi8 = 688, - X86_LOCK_ADD64mr = 689, - X86_LOCK_ADD8mi = 690, - X86_LOCK_ADD8mr = 691, - X86_LOCK_AND16mi = 692, - X86_LOCK_AND16mi8 = 693, - X86_LOCK_AND16mr = 694, - X86_LOCK_AND32mi = 695, - X86_LOCK_AND32mi8 = 696, - X86_LOCK_AND32mr = 697, - X86_LOCK_AND64mi32 = 698, - X86_LOCK_AND64mi8 = 699, - X86_LOCK_AND64mr = 700, - X86_LOCK_AND8mi = 701, - X86_LOCK_AND8mr = 702, - X86_LOCK_DEC16m = 703, - X86_LOCK_DEC32m = 704, - X86_LOCK_DEC64m = 705, - X86_LOCK_DEC8m = 706, - X86_LOCK_INC16m = 707, - X86_LOCK_INC32m = 708, - X86_LOCK_INC64m = 709, - X86_LOCK_INC8m = 710, - X86_LOCK_OR16mi = 711, - X86_LOCK_OR16mi8 = 712, - X86_LOCK_OR16mr = 713, - X86_LOCK_OR32mi = 714, - X86_LOCK_OR32mi8 = 715, - X86_LOCK_OR32mr = 716, - X86_LOCK_OR64mi32 = 717, - X86_LOCK_OR64mi8 = 718, - X86_LOCK_OR64mr = 719, - X86_LOCK_OR8mi = 720, - X86_LOCK_OR8mr = 721, - X86_LOCK_PREFIX = 722, - X86_LOCK_SUB16mi = 723, - X86_LOCK_SUB16mi8 = 724, - X86_LOCK_SUB16mr = 725, - X86_LOCK_SUB32mi = 726, - X86_LOCK_SUB32mi8 = 727, - X86_LOCK_SUB32mr = 728, - X86_LOCK_SUB64mi32 = 729, - X86_LOCK_SUB64mi8 = 730, - X86_LOCK_SUB64mr = 731, - X86_LOCK_SUB8mi = 732, - X86_LOCK_SUB8mr = 733, - X86_LOCK_XOR16mi = 734, - X86_LOCK_XOR16mi8 = 735, - X86_LOCK_XOR16mr = 736, - X86_LOCK_XOR32mi = 737, - X86_LOCK_XOR32mi8 = 738, - X86_LOCK_XOR32mr = 739, - X86_LOCK_XOR64mi32 = 740, - X86_LOCK_XOR64mi8 = 741, - X86_LOCK_XOR64mr = 742, - X86_LOCK_XOR8mi = 743, - X86_LOCK_XOR8mr = 744, - X86_LODSB = 745, - X86_LODSL = 746, - X86_LODSQ = 747, - X86_LODSW = 748, - X86_LOOP = 749, - X86_LOOPE = 750, - X86_LOOPNE = 751, - X86_LRETIL = 752, - X86_LRETIQ = 753, - X86_LRETIW = 754, - X86_LRETL = 755, - X86_LRETQ = 756, - X86_LRETW = 757, - X86_LSL16rm = 758, - X86_LSL16rr = 759, - X86_LSL32rm = 760, - X86_LSL32rr = 761, - X86_LSL64rm = 762, - X86_LSL64rr = 763, - X86_LSS16rm = 764, - X86_LSS32rm = 765, - X86_LSS64rm = 766, - X86_LTRm = 767, - X86_LTRr = 768, - X86_LXADD16 = 769, - X86_LXADD32 = 770, - X86_LXADD64 = 771, - X86_LXADD8 = 772, - X86_LZCNT16rm = 773, - X86_LZCNT16rr = 774, - X86_LZCNT32rm = 775, - X86_LZCNT32rr = 776, - X86_LZCNT64rm = 777, - X86_LZCNT64rr = 778, - X86_MONTMUL = 779, - X86_MORESTACK_RET = 780, - X86_MORESTACK_RET_RESTORE_R10 = 781, - X86_MOV16ao16 = 782, - X86_MOV16ao16_16 = 783, - X86_MOV16mi = 784, - X86_MOV16mr = 785, - X86_MOV16ms = 786, - X86_MOV16o16a = 787, - X86_MOV16o16a_16 = 788, - X86_MOV16ri = 789, - X86_MOV16ri_alt = 790, - X86_MOV16rm = 791, - X86_MOV16rr = 792, - X86_MOV16rr_REV = 793, - X86_MOV16rs = 794, - X86_MOV16sm = 795, - X86_MOV16sr = 796, - X86_MOV32ao32 = 797, - X86_MOV32ao32_16 = 798, - X86_MOV32cr = 799, - X86_MOV32dr = 800, - X86_MOV32mi = 801, - X86_MOV32mr = 802, - X86_MOV32ms = 803, - X86_MOV32o32a = 804, - X86_MOV32o32a_16 = 805, - X86_MOV32r0 = 806, - X86_MOV32rc = 807, - X86_MOV32rd = 808, - X86_MOV32ri = 809, - X86_MOV32ri64 = 810, - X86_MOV32ri_alt = 811, - X86_MOV32rm = 812, - X86_MOV32rr = 813, - X86_MOV32rr_REV = 814, - X86_MOV32rs = 815, - X86_MOV32sm = 816, - X86_MOV32sr = 817, - X86_MOV64ao16 = 818, - X86_MOV64ao32 = 819, - X86_MOV64ao64 = 820, - X86_MOV64ao8 = 821, - X86_MOV64cr = 822, - X86_MOV64dr = 823, - X86_MOV64mi32 = 824, - X86_MOV64mr = 825, - X86_MOV64ms = 826, - X86_MOV64o16a = 827, - X86_MOV64o32a = 828, - X86_MOV64o64a = 829, - X86_MOV64o8a = 830, - X86_MOV64rc = 831, - X86_MOV64rd = 832, - X86_MOV64ri = 833, - X86_MOV64ri32 = 834, - X86_MOV64rm = 835, - X86_MOV64rr = 836, - X86_MOV64rr_REV = 837, - X86_MOV64rs = 838, - X86_MOV64sm = 839, - X86_MOV64sr = 840, - X86_MOV8ao8 = 841, - X86_MOV8ao8_16 = 842, - X86_MOV8mi = 843, - X86_MOV8mr = 844, - X86_MOV8mr_NOREX = 845, - X86_MOV8o8a = 846, - X86_MOV8o8a_16 = 847, - X86_MOV8ri = 848, - X86_MOV8ri_alt = 849, - X86_MOV8rm = 850, - X86_MOV8rm_NOREX = 851, - X86_MOV8rr = 852, - X86_MOV8rr_NOREX = 853, - X86_MOV8rr_REV = 854, - X86_MOVBE16mr = 855, - X86_MOVBE16rm = 856, - X86_MOVBE32mr = 857, - X86_MOVBE32rm = 858, - X86_MOVBE64mr = 859, - X86_MOVBE64rm = 860, - X86_MOVPC32r = 861, - X86_MOVSB = 862, - X86_MOVSL = 863, - X86_MOVSQ = 864, - X86_MOVSW = 865, - X86_MOVSX16rm8 = 866, - X86_MOVSX16rr8 = 867, - X86_MOVSX32rm16 = 868, - X86_MOVSX32rm8 = 869, - X86_MOVSX32rr16 = 870, - X86_MOVSX32rr8 = 871, - X86_MOVSX64_NOREXrr32 = 872, - X86_MOVSX64rm16 = 873, - X86_MOVSX64rm32 = 874, - X86_MOVSX64rm8 = 875, - X86_MOVSX64rr16 = 876, - X86_MOVSX64rr32 = 877, - X86_MOVSX64rr8 = 878, - X86_MOVZX16rm8 = 879, - X86_MOVZX16rr8 = 880, - X86_MOVZX32_NOREXrm8 = 881, - X86_MOVZX32_NOREXrr8 = 882, - X86_MOVZX32rm16 = 883, - X86_MOVZX32rm8 = 884, - X86_MOVZX32rr16 = 885, - X86_MOVZX32rr8 = 886, - X86_MOVZX64rm16_Q = 887, - X86_MOVZX64rm8_Q = 888, - X86_MOVZX64rr16_Q = 889, - X86_MOVZX64rr8_Q = 890, - X86_MUL16m = 891, - X86_MUL16r = 892, - X86_MUL32m = 893, - X86_MUL32r = 894, - X86_MUL64m = 895, - X86_MUL64r = 896, - X86_MUL8m = 897, - X86_MUL8r = 898, - X86_MULX32rm = 899, - X86_MULX32rr = 900, - X86_MULX64rm = 901, - X86_MULX64rr = 902, - X86_NEG16m = 903, - X86_NEG16r = 904, - X86_NEG32m = 905, - X86_NEG32r = 906, - X86_NEG64m = 907, - X86_NEG64r = 908, - X86_NEG8m = 909, - X86_NEG8r = 910, - X86_NOOP = 911, - X86_NOOP18_16m4 = 912, - X86_NOOP18_16m5 = 913, - X86_NOOP18_16m6 = 914, - X86_NOOP18_16m7 = 915, - X86_NOOP18_16r4 = 916, - X86_NOOP18_16r5 = 917, - X86_NOOP18_16r6 = 918, - X86_NOOP18_16r7 = 919, - X86_NOOP18_m4 = 920, - X86_NOOP18_m5 = 921, - X86_NOOP18_m6 = 922, - X86_NOOP18_m7 = 923, - X86_NOOP18_r4 = 924, - X86_NOOP18_r5 = 925, - X86_NOOP18_r6 = 926, - X86_NOOP18_r7 = 927, - X86_NOOP19rr = 928, - X86_NOOPL = 929, - X86_NOOPL_19 = 930, - X86_NOOPL_1a = 931, - X86_NOOPL_1b = 932, - X86_NOOPL_1c = 933, - X86_NOOPL_1d = 934, - X86_NOOPL_1e = 935, - X86_NOOPW = 936, - X86_NOOPW_19 = 937, - X86_NOOPW_1a = 938, - X86_NOOPW_1b = 939, - X86_NOOPW_1c = 940, - X86_NOOPW_1d = 941, - X86_NOOPW_1e = 942, - X86_NOT16m = 943, - X86_NOT16r = 944, - X86_NOT32m = 945, - X86_NOT32r = 946, - X86_NOT64m = 947, - X86_NOT64r = 948, - X86_NOT8m = 949, - X86_NOT8r = 950, - X86_OR16i16 = 951, - X86_OR16mi = 952, - X86_OR16mi8 = 953, - X86_OR16mr = 954, - X86_OR16ri = 955, - X86_OR16ri8 = 956, - X86_OR16rm = 957, - X86_OR16rr = 958, - X86_OR16rr_REV = 959, - X86_OR32i32 = 960, - X86_OR32mi = 961, - X86_OR32mi8 = 962, - X86_OR32mr = 963, - X86_OR32mrLocked = 964, - X86_OR32ri = 965, - X86_OR32ri8 = 966, - X86_OR32rm = 967, - X86_OR32rr = 968, - X86_OR32rr_REV = 969, - X86_OR64i32 = 970, - X86_OR64mi32 = 971, - X86_OR64mi8 = 972, - X86_OR64mr = 973, - X86_OR64ri32 = 974, - X86_OR64ri8 = 975, - X86_OR64rm = 976, - X86_OR64rr = 977, - X86_OR64rr_REV = 978, - X86_OR8i8 = 979, - X86_OR8mi = 980, - X86_OR8mr = 981, - X86_OR8ri = 982, - X86_OR8ri8 = 983, - X86_OR8rm = 984, - X86_OR8rr = 985, - X86_OR8rr_REV = 986, - X86_OUT16ir = 987, - X86_OUT16rr = 988, - X86_OUT32ir = 989, - X86_OUT32rr = 990, - X86_OUT8ir = 991, - X86_OUT8rr = 992, - X86_OUTSB = 993, - X86_OUTSL = 994, - X86_OUTSW = 995, - X86_PDEP32rm = 996, - X86_PDEP32rr = 997, - X86_PDEP64rm = 998, - X86_PDEP64rr = 999, - X86_PEXT32rm = 1000, - X86_PEXT32rr = 1001, - X86_PEXT64rm = 1002, - X86_PEXT64rr = 1003, - X86_POP16r = 1004, - X86_POP16rmm = 1005, - X86_POP16rmr = 1006, - X86_POP32r = 1007, - X86_POP32rmm = 1008, - X86_POP32rmr = 1009, - X86_POP64r = 1010, - X86_POP64rmm = 1011, - X86_POP64rmr = 1012, - X86_POPA16 = 1013, - X86_POPA32 = 1014, - X86_POPDS16 = 1015, - X86_POPDS32 = 1016, - X86_POPES16 = 1017, - X86_POPES32 = 1018, - X86_POPF16 = 1019, - X86_POPF32 = 1020, - X86_POPF64 = 1021, - X86_POPFS16 = 1022, - X86_POPFS32 = 1023, - X86_POPFS64 = 1024, - X86_POPGS16 = 1025, - X86_POPGS32 = 1026, - X86_POPGS64 = 1027, - X86_POPSS16 = 1028, - X86_POPSS32 = 1029, - X86_PUSH16i8 = 1030, - X86_PUSH16r = 1031, - X86_PUSH16rmm = 1032, - X86_PUSH16rmr = 1033, - X86_PUSH32i8 = 1034, - X86_PUSH32r = 1035, - X86_PUSH32rmm = 1036, - X86_PUSH32rmr = 1037, - X86_PUSH64i16 = 1038, - X86_PUSH64i32 = 1039, - X86_PUSH64i8 = 1040, - X86_PUSH64r = 1041, - X86_PUSH64rmm = 1042, - X86_PUSH64rmr = 1043, - X86_PUSHA16 = 1044, - X86_PUSHA32 = 1045, - X86_PUSHCS16 = 1046, - X86_PUSHCS32 = 1047, - X86_PUSHDS16 = 1048, - X86_PUSHDS32 = 1049, - X86_PUSHES16 = 1050, - X86_PUSHES32 = 1051, - X86_PUSHF16 = 1052, - X86_PUSHF32 = 1053, - X86_PUSHF64 = 1054, - X86_PUSHFS16 = 1055, - X86_PUSHFS32 = 1056, - X86_PUSHFS64 = 1057, - X86_PUSHGS16 = 1058, - X86_PUSHGS32 = 1059, - X86_PUSHGS64 = 1060, - X86_PUSHSS16 = 1061, - X86_PUSHSS32 = 1062, - X86_PUSHi16 = 1063, - X86_PUSHi32 = 1064, - X86_RCL16m1 = 1065, - X86_RCL16mCL = 1066, - X86_RCL16mi = 1067, - X86_RCL16r1 = 1068, - X86_RCL16rCL = 1069, - X86_RCL16ri = 1070, - X86_RCL32m1 = 1071, - X86_RCL32mCL = 1072, - X86_RCL32mi = 1073, - X86_RCL32r1 = 1074, - X86_RCL32rCL = 1075, - X86_RCL32ri = 1076, - X86_RCL64m1 = 1077, - X86_RCL64mCL = 1078, - X86_RCL64mi = 1079, - X86_RCL64r1 = 1080, - X86_RCL64rCL = 1081, - X86_RCL64ri = 1082, - X86_RCL8m1 = 1083, - X86_RCL8mCL = 1084, - X86_RCL8mi = 1085, - X86_RCL8r1 = 1086, - X86_RCL8rCL = 1087, - X86_RCL8ri = 1088, - X86_RCR16m1 = 1089, - X86_RCR16mCL = 1090, - X86_RCR16mi = 1091, - X86_RCR16r1 = 1092, - X86_RCR16rCL = 1093, - X86_RCR16ri = 1094, - X86_RCR32m1 = 1095, - X86_RCR32mCL = 1096, - X86_RCR32mi = 1097, - X86_RCR32r1 = 1098, - X86_RCR32rCL = 1099, - X86_RCR32ri = 1100, - X86_RCR64m1 = 1101, - X86_RCR64mCL = 1102, - X86_RCR64mi = 1103, - X86_RCR64r1 = 1104, - X86_RCR64rCL = 1105, - X86_RCR64ri = 1106, - X86_RCR8m1 = 1107, - X86_RCR8mCL = 1108, - X86_RCR8mi = 1109, - X86_RCR8r1 = 1110, - X86_RCR8rCL = 1111, - X86_RCR8ri = 1112, - X86_RDFSBASE = 1113, - X86_RDFSBASE64 = 1114, - X86_RDGSBASE = 1115, - X86_RDGSBASE64 = 1116, - X86_RDMSR = 1117, - X86_RDPMC = 1118, - X86_RDRAND16r = 1119, - X86_RDRAND32r = 1120, - X86_RDRAND64r = 1121, - X86_RDSEED16r = 1122, - X86_RDSEED32r = 1123, - X86_RDSEED64r = 1124, - X86_RDTSC = 1125, - X86_RDTSCP = 1126, - X86_RELEASE_MOV16mr = 1127, - X86_RELEASE_MOV32mr = 1128, - X86_RELEASE_MOV64mr = 1129, - X86_RELEASE_MOV8mr = 1130, - X86_REPNE_PREFIX = 1131, - X86_REP_MOVSB_32 = 1132, - X86_REP_MOVSB_64 = 1133, - X86_REP_MOVSD_32 = 1134, - X86_REP_MOVSD_64 = 1135, - X86_REP_MOVSQ_64 = 1136, - X86_REP_MOVSW_32 = 1137, - X86_REP_MOVSW_64 = 1138, - X86_REP_PREFIX = 1139, - X86_REP_STOSB_32 = 1140, - X86_REP_STOSB_64 = 1141, - X86_REP_STOSD_32 = 1142, - X86_REP_STOSD_64 = 1143, - X86_REP_STOSQ_64 = 1144, - X86_REP_STOSW_32 = 1145, - X86_REP_STOSW_64 = 1146, - X86_RETIL = 1147, - X86_RETIQ = 1148, - X86_RETIW = 1149, - X86_RETL = 1150, - X86_RETQ = 1151, - X86_RETW = 1152, - X86_REX64_PREFIX = 1153, - X86_ROL16m1 = 1154, - X86_ROL16mCL = 1155, - X86_ROL16mi = 1156, - X86_ROL16r1 = 1157, - X86_ROL16rCL = 1158, - X86_ROL16ri = 1159, - X86_ROL32m1 = 1160, - X86_ROL32mCL = 1161, - X86_ROL32mi = 1162, - X86_ROL32r1 = 1163, - X86_ROL32rCL = 1164, - X86_ROL32ri = 1165, - X86_ROL64m1 = 1166, - X86_ROL64mCL = 1167, - X86_ROL64mi = 1168, - X86_ROL64r1 = 1169, - X86_ROL64rCL = 1170, - X86_ROL64ri = 1171, - X86_ROL8m1 = 1172, - X86_ROL8mCL = 1173, - X86_ROL8mi = 1174, - X86_ROL8r1 = 1175, - X86_ROL8rCL = 1176, - X86_ROL8ri = 1177, - X86_ROR16m1 = 1178, - X86_ROR16mCL = 1179, - X86_ROR16mi = 1180, - X86_ROR16r1 = 1181, - X86_ROR16rCL = 1182, - X86_ROR16ri = 1183, - X86_ROR32m1 = 1184, - X86_ROR32mCL = 1185, - X86_ROR32mi = 1186, - X86_ROR32r1 = 1187, - X86_ROR32rCL = 1188, - X86_ROR32ri = 1189, - X86_ROR64m1 = 1190, - X86_ROR64mCL = 1191, - X86_ROR64mi = 1192, - X86_ROR64r1 = 1193, - X86_ROR64rCL = 1194, - X86_ROR64ri = 1195, - X86_ROR8m1 = 1196, - X86_ROR8mCL = 1197, - X86_ROR8mi = 1198, - X86_ROR8r1 = 1199, - X86_ROR8rCL = 1200, - X86_ROR8ri = 1201, - X86_RORX32mi = 1202, - X86_RORX32ri = 1203, - X86_RORX64mi = 1204, - X86_RORX64ri = 1205, - X86_RSM = 1206, - X86_SAHF = 1207, - X86_SAL16m1 = 1208, - X86_SAL16mCL = 1209, - X86_SAL16mi = 1210, - X86_SAL16r1 = 1211, - X86_SAL16rCL = 1212, - X86_SAL16ri = 1213, - X86_SAL32m1 = 1214, - X86_SAL32mCL = 1215, - X86_SAL32mi = 1216, - X86_SAL32r1 = 1217, - X86_SAL32rCL = 1218, - X86_SAL32ri = 1219, - X86_SAL64m1 = 1220, - X86_SAL64mCL = 1221, - X86_SAL64mi = 1222, - X86_SAL64r1 = 1223, - X86_SAL64rCL = 1224, - X86_SAL64ri = 1225, - X86_SAL8m1 = 1226, - X86_SAL8mCL = 1227, - X86_SAL8mi = 1228, - X86_SAL8r1 = 1229, - X86_SAL8rCL = 1230, - X86_SAL8ri = 1231, - X86_SALC = 1232, - X86_SAR16m1 = 1233, - X86_SAR16mCL = 1234, - X86_SAR16mi = 1235, - X86_SAR16r1 = 1236, - X86_SAR16rCL = 1237, - X86_SAR16ri = 1238, - X86_SAR32m1 = 1239, - X86_SAR32mCL = 1240, - X86_SAR32mi = 1241, - X86_SAR32r1 = 1242, - X86_SAR32rCL = 1243, - X86_SAR32ri = 1244, - X86_SAR64m1 = 1245, - X86_SAR64mCL = 1246, - X86_SAR64mi = 1247, - X86_SAR64r1 = 1248, - X86_SAR64rCL = 1249, - X86_SAR64ri = 1250, - X86_SAR8m1 = 1251, - X86_SAR8mCL = 1252, - X86_SAR8mi = 1253, - X86_SAR8r1 = 1254, - X86_SAR8rCL = 1255, - X86_SAR8ri = 1256, - X86_SARX32rm = 1257, - X86_SARX32rr = 1258, - X86_SARX64rm = 1259, - X86_SARX64rr = 1260, - X86_SBB16i16 = 1261, - X86_SBB16mi = 1262, - X86_SBB16mi8 = 1263, - X86_SBB16mr = 1264, - X86_SBB16ri = 1265, - X86_SBB16ri8 = 1266, - X86_SBB16rm = 1267, - X86_SBB16rr = 1268, - X86_SBB16rr_REV = 1269, - X86_SBB32i32 = 1270, - X86_SBB32mi = 1271, - X86_SBB32mi8 = 1272, - X86_SBB32mr = 1273, - X86_SBB32ri = 1274, - X86_SBB32ri8 = 1275, - X86_SBB32rm = 1276, - X86_SBB32rr = 1277, - X86_SBB32rr_REV = 1278, - X86_SBB64i32 = 1279, - X86_SBB64mi32 = 1280, - X86_SBB64mi8 = 1281, - X86_SBB64mr = 1282, - X86_SBB64ri32 = 1283, - X86_SBB64ri8 = 1284, - X86_SBB64rm = 1285, - X86_SBB64rr = 1286, - X86_SBB64rr_REV = 1287, - X86_SBB8i8 = 1288, - X86_SBB8mi = 1289, - X86_SBB8mr = 1290, - X86_SBB8ri = 1291, - X86_SBB8rm = 1292, - X86_SBB8rr = 1293, - X86_SBB8rr_REV = 1294, - X86_SCASB = 1295, - X86_SCASL = 1296, - X86_SCASQ = 1297, - X86_SCASW = 1298, - X86_SEG_ALLOCA_32 = 1299, - X86_SEG_ALLOCA_64 = 1300, - X86_SEH_EndPrologue = 1301, - X86_SEH_Epilogue = 1302, - X86_SEH_PushFrame = 1303, - X86_SEH_PushReg = 1304, - X86_SEH_SaveReg = 1305, - X86_SEH_SaveXMM = 1306, - X86_SEH_SetFrame = 1307, - X86_SEH_StackAlloc = 1308, - X86_SETAEm = 1309, - X86_SETAEr = 1310, - X86_SETAm = 1311, - X86_SETAr = 1312, - X86_SETBEm = 1313, - X86_SETBEr = 1314, - X86_SETB_C16r = 1315, - X86_SETB_C32r = 1316, - X86_SETB_C64r = 1317, - X86_SETB_C8r = 1318, - X86_SETBm = 1319, - X86_SETBr = 1320, - X86_SETEm = 1321, - X86_SETEr = 1322, - X86_SETGEm = 1323, - X86_SETGEr = 1324, - X86_SETGm = 1325, - X86_SETGr = 1326, - X86_SETLEm = 1327, - X86_SETLEr = 1328, - X86_SETLm = 1329, - X86_SETLr = 1330, - X86_SETNEm = 1331, - X86_SETNEr = 1332, - X86_SETNOm = 1333, - X86_SETNOr = 1334, - X86_SETNPm = 1335, - X86_SETNPr = 1336, - X86_SETNSm = 1337, - X86_SETNSr = 1338, - X86_SETOm = 1339, - X86_SETOr = 1340, - X86_SETPm = 1341, - X86_SETPr = 1342, - X86_SETSm = 1343, - X86_SETSr = 1344, - X86_SGDT16m = 1345, - X86_SGDT32m = 1346, - X86_SGDT64m = 1347, - X86_SHL16m1 = 1348, - X86_SHL16mCL = 1349, - X86_SHL16mi = 1350, - X86_SHL16r1 = 1351, - X86_SHL16rCL = 1352, - X86_SHL16ri = 1353, - X86_SHL32m1 = 1354, - X86_SHL32mCL = 1355, - X86_SHL32mi = 1356, - X86_SHL32r1 = 1357, - X86_SHL32rCL = 1358, - X86_SHL32ri = 1359, - X86_SHL64m1 = 1360, - X86_SHL64mCL = 1361, - X86_SHL64mi = 1362, - X86_SHL64r1 = 1363, - X86_SHL64rCL = 1364, - X86_SHL64ri = 1365, - X86_SHL8m1 = 1366, - X86_SHL8mCL = 1367, - X86_SHL8mi = 1368, - X86_SHL8r1 = 1369, - X86_SHL8rCL = 1370, - X86_SHL8ri = 1371, - X86_SHLD16mrCL = 1372, - X86_SHLD16mri8 = 1373, - X86_SHLD16rrCL = 1374, - X86_SHLD16rri8 = 1375, - X86_SHLD32mrCL = 1376, - X86_SHLD32mri8 = 1377, - X86_SHLD32rrCL = 1378, - X86_SHLD32rri8 = 1379, - X86_SHLD64mrCL = 1380, - X86_SHLD64mri8 = 1381, - X86_SHLD64rrCL = 1382, - X86_SHLD64rri8 = 1383, - X86_SHLX32rm = 1384, - X86_SHLX32rr = 1385, - X86_SHLX64rm = 1386, - X86_SHLX64rr = 1387, - X86_SHR16m1 = 1388, - X86_SHR16mCL = 1389, - X86_SHR16mi = 1390, - X86_SHR16r1 = 1391, - X86_SHR16rCL = 1392, - X86_SHR16ri = 1393, - X86_SHR32m1 = 1394, - X86_SHR32mCL = 1395, - X86_SHR32mi = 1396, - X86_SHR32r1 = 1397, - X86_SHR32rCL = 1398, - X86_SHR32ri = 1399, - X86_SHR64m1 = 1400, - X86_SHR64mCL = 1401, - X86_SHR64mi = 1402, - X86_SHR64r1 = 1403, - X86_SHR64rCL = 1404, - X86_SHR64ri = 1405, - X86_SHR8m1 = 1406, - X86_SHR8mCL = 1407, - X86_SHR8mi = 1408, - X86_SHR8r1 = 1409, - X86_SHR8rCL = 1410, - X86_SHR8ri = 1411, - X86_SHRD16mrCL = 1412, - X86_SHRD16mri8 = 1413, - X86_SHRD16rrCL = 1414, - X86_SHRD16rri8 = 1415, - X86_SHRD32mrCL = 1416, - X86_SHRD32mri8 = 1417, - X86_SHRD32rrCL = 1418, - X86_SHRD32rri8 = 1419, - X86_SHRD64mrCL = 1420, - X86_SHRD64mri8 = 1421, - X86_SHRD64rrCL = 1422, - X86_SHRD64rri8 = 1423, - X86_SHRX32rm = 1424, - X86_SHRX32rr = 1425, - X86_SHRX64rm = 1426, - X86_SHRX64rr = 1427, - X86_SIDT16m = 1428, - X86_SIDT32m = 1429, - X86_SIDT64m = 1430, - X86_SKINIT = 1431, - X86_SLDT16m = 1432, - X86_SLDT16r = 1433, - X86_SLDT32r = 1434, - X86_SLDT64m = 1435, - X86_SLDT64r = 1436, - X86_SMSW16m = 1437, - X86_SMSW16r = 1438, - X86_SMSW32r = 1439, - X86_SMSW64r = 1440, - X86_STAC = 1441, - X86_STC = 1442, - X86_STD = 1443, - X86_STGI = 1444, - X86_STI = 1445, - X86_STOSB = 1446, - X86_STOSL = 1447, - X86_STOSQ = 1448, - X86_STOSW = 1449, - X86_STR16r = 1450, - X86_STR32r = 1451, - X86_STR64r = 1452, - X86_STRm = 1453, - X86_SUB16i16 = 1454, - X86_SUB16mi = 1455, - X86_SUB16mi8 = 1456, - X86_SUB16mr = 1457, - X86_SUB16ri = 1458, - X86_SUB16ri8 = 1459, - X86_SUB16rm = 1460, - X86_SUB16rr = 1461, - X86_SUB16rr_REV = 1462, - X86_SUB32i32 = 1463, - X86_SUB32mi = 1464, - X86_SUB32mi8 = 1465, - X86_SUB32mr = 1466, - X86_SUB32ri = 1467, - X86_SUB32ri8 = 1468, - X86_SUB32rm = 1469, - X86_SUB32rr = 1470, - X86_SUB32rr_REV = 1471, - X86_SUB64i32 = 1472, - X86_SUB64mi32 = 1473, - X86_SUB64mi8 = 1474, - X86_SUB64mr = 1475, - X86_SUB64ri32 = 1476, - X86_SUB64ri8 = 1477, - X86_SUB64rm = 1478, - X86_SUB64rr = 1479, - X86_SUB64rr_REV = 1480, - X86_SUB8i8 = 1481, - X86_SUB8mi = 1482, - X86_SUB8mr = 1483, - X86_SUB8ri = 1484, - X86_SUB8ri8 = 1485, - X86_SUB8rm = 1486, - X86_SUB8rr = 1487, - X86_SUB8rr_REV = 1488, - X86_SWAPGS = 1489, - X86_SYSCALL = 1490, - X86_SYSENTER = 1491, - X86_SYSEXIT = 1492, - X86_SYSEXIT64 = 1493, - X86_SYSRET = 1494, - X86_SYSRET64 = 1495, - X86_T1MSKC32rm = 1496, - X86_T1MSKC32rr = 1497, - X86_T1MSKC64rm = 1498, - X86_T1MSKC64rr = 1499, - X86_TAILJMPd = 1500, - X86_TAILJMPd64 = 1501, - X86_TAILJMPm = 1502, - X86_TAILJMPm64 = 1503, - X86_TAILJMPr = 1504, - X86_TAILJMPr64 = 1505, - X86_TCRETURNdi = 1506, - X86_TCRETURNdi64 = 1507, - X86_TCRETURNmi = 1508, - X86_TCRETURNmi64 = 1509, - X86_TCRETURNri = 1510, - X86_TCRETURNri64 = 1511, - X86_TEST16i16 = 1512, - X86_TEST16mi = 1513, - X86_TEST16mi_alt = 1514, - X86_TEST16ri = 1515, - X86_TEST16ri_alt = 1516, - X86_TEST16rm = 1517, - X86_TEST16rr = 1518, - X86_TEST32i32 = 1519, - X86_TEST32mi = 1520, - X86_TEST32mi_alt = 1521, - X86_TEST32ri = 1522, - X86_TEST32ri_alt = 1523, - X86_TEST32rm = 1524, - X86_TEST32rr = 1525, - X86_TEST64i32 = 1526, - X86_TEST64mi32 = 1527, - X86_TEST64mi32_alt = 1528, - X86_TEST64ri32 = 1529, - X86_TEST64ri32_alt = 1530, - X86_TEST64rm = 1531, - X86_TEST64rr = 1532, - X86_TEST8i8 = 1533, - X86_TEST8mi = 1534, - X86_TEST8mi_alt = 1535, - X86_TEST8ri = 1536, - X86_TEST8ri_NOREX = 1537, - X86_TEST8ri_alt = 1538, - X86_TEST8rm = 1539, - X86_TEST8rr = 1540, - X86_TLSCall_32 = 1541, - X86_TLSCall_64 = 1542, - X86_TLS_addr32 = 1543, - X86_TLS_addr64 = 1544, - X86_TLS_base_addr32 = 1545, - X86_TLS_base_addr64 = 1546, - X86_TRAP = 1547, - X86_TZCNT16rm = 1548, - X86_TZCNT16rr = 1549, - X86_TZCNT32rm = 1550, - X86_TZCNT32rr = 1551, - X86_TZCNT64rm = 1552, - X86_TZCNT64rr = 1553, - X86_TZMSK32rm = 1554, - X86_TZMSK32rr = 1555, - X86_TZMSK64rm = 1556, - X86_TZMSK64rr = 1557, - X86_UD2B = 1558, - X86_VAARG_64 = 1559, - X86_VASTART_SAVE_XMM_REGS = 1560, - X86_VERRm = 1561, - X86_VERRr = 1562, - X86_VERWm = 1563, - X86_VERWr = 1564, - X86_VMCALL = 1565, - X86_VMCLEARm = 1566, - X86_VMFUNC = 1567, - X86_VMLAUNCH = 1568, - X86_VMLOAD32 = 1569, - X86_VMLOAD64 = 1570, - X86_VMMCALL = 1571, - X86_VMPTRLDm = 1572, - X86_VMPTRSTm = 1573, - X86_VMREAD32rm = 1574, - X86_VMREAD32rr = 1575, - X86_VMREAD64rm = 1576, - X86_VMREAD64rr = 1577, - X86_VMRESUME = 1578, - X86_VMRUN32 = 1579, - X86_VMRUN64 = 1580, - X86_VMSAVE32 = 1581, - X86_VMSAVE64 = 1582, - X86_VMWRITE32rm = 1583, - X86_VMWRITE32rr = 1584, - X86_VMWRITE64rm = 1585, - X86_VMWRITE64rr = 1586, - X86_VMXOFF = 1587, - X86_VMXON = 1588, - X86_W64ALLOCA = 1589, - X86_WBINVD = 1590, - X86_WIN_ALLOCA = 1591, - X86_WIN_FTOL_32 = 1592, - X86_WIN_FTOL_64 = 1593, - X86_WRFSBASE = 1594, - X86_WRFSBASE64 = 1595, - X86_WRGSBASE = 1596, - X86_WRGSBASE64 = 1597, - X86_WRMSR = 1598, - X86_XADD16rm = 1599, - X86_XADD16rr = 1600, - X86_XADD32rm = 1601, - X86_XADD32rr = 1602, - X86_XADD64rm = 1603, - X86_XADD64rr = 1604, - X86_XADD8rm = 1605, - X86_XADD8rr = 1606, - X86_XCHG16ar = 1607, - X86_XCHG16rm = 1608, - X86_XCHG16rr = 1609, - X86_XCHG32ar = 1610, - X86_XCHG32ar64 = 1611, - X86_XCHG32rm = 1612, - X86_XCHG32rr = 1613, - X86_XCHG64ar = 1614, - X86_XCHG64rm = 1615, - X86_XCHG64rr = 1616, - X86_XCHG8rm = 1617, - X86_XCHG8rr = 1618, - X86_XCRYPTCBC = 1619, - X86_XCRYPTCFB = 1620, - X86_XCRYPTCTR = 1621, - X86_XCRYPTECB = 1622, - X86_XCRYPTOFB = 1623, - X86_XGETBV = 1624, - X86_XLAT = 1625, - X86_XOR16i16 = 1626, - X86_XOR16mi = 1627, - X86_XOR16mi8 = 1628, - X86_XOR16mr = 1629, - X86_XOR16ri = 1630, - X86_XOR16ri8 = 1631, - X86_XOR16rm = 1632, - X86_XOR16rr = 1633, - X86_XOR16rr_REV = 1634, - X86_XOR32i32 = 1635, - X86_XOR32mi = 1636, - X86_XOR32mi8 = 1637, - X86_XOR32mr = 1638, - X86_XOR32ri = 1639, - X86_XOR32ri8 = 1640, - X86_XOR32rm = 1641, - X86_XOR32rr = 1642, - X86_XOR32rr_REV = 1643, - X86_XOR64i32 = 1644, - X86_XOR64mi32 = 1645, - X86_XOR64mi8 = 1646, - X86_XOR64mr = 1647, - X86_XOR64ri32 = 1648, - X86_XOR64ri8 = 1649, - X86_XOR64rm = 1650, - X86_XOR64rr = 1651, - X86_XOR64rr_REV = 1652, - X86_XOR8i8 = 1653, - X86_XOR8mi = 1654, - X86_XOR8mr = 1655, - X86_XOR8ri = 1656, - X86_XOR8ri8 = 1657, - X86_XOR8rm = 1658, - X86_XOR8rr = 1659, - X86_XOR8rr_REV = 1660, - X86_XRSTOR = 1661, - X86_XRSTOR64 = 1662, - X86_XSAVE = 1663, - X86_XSAVE64 = 1664, - X86_XSAVEOPT = 1665, - X86_XSAVEOPT64 = 1666, - X86_XSETBV = 1667, - X86_XSHA1 = 1668, - X86_XSHA256 = 1669, - X86_XSTORE = 1670, - X86_INSTRUCTION_LIST_END = 1671 + X86_ADC82_8ri8 = 55, + X86_ADC8i8 = 56, + X86_ADC8mi = 57, + X86_ADC8mi8 = 58, + X86_ADC8mr = 59, + X86_ADC8ri = 60, + X86_ADC8rm = 61, + X86_ADC8rr = 62, + X86_ADC8rr_REV = 63, + X86_ADCX32rm = 64, + X86_ADCX32rr = 65, + X86_ADCX64rm = 66, + X86_ADCX64rr = 67, + X86_ADD16i16 = 68, + X86_ADD16mi = 69, + X86_ADD16mi8 = 70, + X86_ADD16mr = 71, + X86_ADD16ri = 72, + X86_ADD16ri8 = 73, + X86_ADD16ri8_DB = 74, + X86_ADD16ri_DB = 75, + X86_ADD16rm = 76, + X86_ADD16rr = 77, + X86_ADD16rr_DB = 78, + X86_ADD16rr_REV = 79, + X86_ADD32i32 = 80, + X86_ADD32mi = 81, + X86_ADD32mi8 = 82, + X86_ADD32mr = 83, + X86_ADD32ri = 84, + X86_ADD32ri8 = 85, + X86_ADD32ri8_DB = 86, + X86_ADD32ri_DB = 87, + X86_ADD32rm = 88, + X86_ADD32rr = 89, + X86_ADD32rr_DB = 90, + X86_ADD32rr_REV = 91, + X86_ADD64i32 = 92, + X86_ADD64mi32 = 93, + X86_ADD64mi8 = 94, + X86_ADD64mr = 95, + X86_ADD64ri32 = 96, + X86_ADD64ri32_DB = 97, + X86_ADD64ri8 = 98, + X86_ADD64ri8_DB = 99, + X86_ADD64rm = 100, + X86_ADD64rr = 101, + X86_ADD64rr_DB = 102, + X86_ADD64rr_REV = 103, + X86_ADD82_8mi8 = 104, + X86_ADD82_8ri8 = 105, + X86_ADD8i8 = 106, + X86_ADD8mi = 107, + X86_ADD8mr = 108, + X86_ADD8ri = 109, + X86_ADD8rm = 110, + X86_ADD8rr = 111, + X86_ADD8rr_REV = 112, + X86_ADJCALLSTACKDOWN32 = 113, + X86_ADJCALLSTACKDOWN64 = 114, + X86_ADJCALLSTACKUP32 = 115, + X86_ADJCALLSTACKUP64 = 116, + X86_ADOX32rm = 117, + X86_ADOX32rr = 118, + X86_ADOX64rm = 119, + X86_ADOX64rr = 120, + X86_AND16i16 = 121, + X86_AND16mi = 122, + X86_AND16mi8 = 123, + X86_AND16mr = 124, + X86_AND16ri = 125, + X86_AND16ri8 = 126, + X86_AND16rm = 127, + X86_AND16rr = 128, + X86_AND16rr_REV = 129, + X86_AND32i32 = 130, + X86_AND32mi = 131, + X86_AND32mi8 = 132, + X86_AND32mr = 133, + X86_AND32ri = 134, + X86_AND32ri8 = 135, + X86_AND32rm = 136, + X86_AND32rr = 137, + X86_AND32rr_REV = 138, + X86_AND64i32 = 139, + X86_AND64mi32 = 140, + X86_AND64mi8 = 141, + X86_AND64mr = 142, + X86_AND64ri32 = 143, + X86_AND64ri8 = 144, + X86_AND64rm = 145, + X86_AND64rr = 146, + X86_AND64rr_REV = 147, + X86_AND82_8mi8 = 148, + X86_AND82_8ri8 = 149, + X86_AND8i8 = 150, + X86_AND8mi = 151, + X86_AND8mr = 152, + X86_AND8ri = 153, + X86_AND8rm = 154, + X86_AND8rr = 155, + X86_AND8rr_REV = 156, + X86_ANDN32rm = 157, + X86_ANDN32rr = 158, + X86_ANDN64rm = 159, + X86_ANDN64rr = 160, + X86_ARPL16mr = 161, + X86_ARPL16rr = 162, + X86_BEXTR32rm = 163, + X86_BEXTR32rr = 164, + X86_BEXTR64rm = 165, + X86_BEXTR64rr = 166, + X86_BEXTRI32mi = 167, + X86_BEXTRI32ri = 168, + X86_BEXTRI64mi = 169, + X86_BEXTRI64ri = 170, + X86_BLCFILL32rm = 171, + X86_BLCFILL32rr = 172, + X86_BLCFILL64rm = 173, + X86_BLCFILL64rr = 174, + X86_BLCI32rm = 175, + X86_BLCI32rr = 176, + X86_BLCI64rm = 177, + X86_BLCI64rr = 178, + X86_BLCIC32rm = 179, + X86_BLCIC32rr = 180, + X86_BLCIC64rm = 181, + X86_BLCIC64rr = 182, + X86_BLCMSK32rm = 183, + X86_BLCMSK32rr = 184, + X86_BLCMSK64rm = 185, + X86_BLCMSK64rr = 186, + X86_BLCS32rm = 187, + X86_BLCS32rr = 188, + X86_BLCS64rm = 189, + X86_BLCS64rr = 190, + X86_BLSFILL32rm = 191, + X86_BLSFILL32rr = 192, + X86_BLSFILL64rm = 193, + X86_BLSFILL64rr = 194, + X86_BLSI32rm = 195, + X86_BLSI32rr = 196, + X86_BLSI64rm = 197, + X86_BLSI64rr = 198, + X86_BLSIC32rm = 199, + X86_BLSIC32rr = 200, + X86_BLSIC64rm = 201, + X86_BLSIC64rr = 202, + X86_BLSMSK32rm = 203, + X86_BLSMSK32rr = 204, + X86_BLSMSK64rm = 205, + X86_BLSMSK64rr = 206, + X86_BLSR32rm = 207, + X86_BLSR32rr = 208, + X86_BLSR64rm = 209, + X86_BLSR64rr = 210, + X86_BOUNDS16rm = 211, + X86_BOUNDS32rm = 212, + X86_BSF16rm = 213, + X86_BSF16rr = 214, + X86_BSF32rm = 215, + X86_BSF32rr = 216, + X86_BSF64rm = 217, + X86_BSF64rr = 218, + X86_BSR16rm = 219, + X86_BSR16rr = 220, + X86_BSR32rm = 221, + X86_BSR32rr = 222, + X86_BSR64rm = 223, + X86_BSR64rr = 224, + X86_BSWAP32r = 225, + X86_BSWAP64r = 226, + X86_BT16mi8 = 227, + X86_BT16mr = 228, + X86_BT16ri8 = 229, + X86_BT16rr = 230, + X86_BT32mi8 = 231, + X86_BT32mr = 232, + X86_BT32ri8 = 233, + X86_BT32rr = 234, + X86_BT64mi8 = 235, + X86_BT64mr = 236, + X86_BT64ri8 = 237, + X86_BT64rr = 238, + X86_BTC16mi8 = 239, + X86_BTC16mr = 240, + X86_BTC16ri8 = 241, + X86_BTC16rr = 242, + X86_BTC32mi8 = 243, + X86_BTC32mr = 244, + X86_BTC32ri8 = 245, + X86_BTC32rr = 246, + X86_BTC64mi8 = 247, + X86_BTC64mr = 248, + X86_BTC64ri8 = 249, + X86_BTC64rr = 250, + X86_BTR16mi8 = 251, + X86_BTR16mr = 252, + X86_BTR16ri8 = 253, + X86_BTR16rr = 254, + X86_BTR32mi8 = 255, + X86_BTR32mr = 256, + X86_BTR32ri8 = 257, + X86_BTR32rr = 258, + X86_BTR64mi8 = 259, + X86_BTR64mr = 260, + X86_BTR64ri8 = 261, + X86_BTR64rr = 262, + X86_BTS16mi8 = 263, + X86_BTS16mr = 264, + X86_BTS16ri8 = 265, + X86_BTS16rr = 266, + X86_BTS32mi8 = 267, + X86_BTS32mr = 268, + X86_BTS32ri8 = 269, + X86_BTS32rr = 270, + X86_BTS64mi8 = 271, + X86_BTS64mr = 272, + X86_BTS64ri8 = 273, + X86_BTS64rr = 274, + X86_BZHI32rm = 275, + X86_BZHI32rr = 276, + X86_BZHI64rm = 277, + X86_BZHI64rr = 278, + X86_CALL16m = 279, + X86_CALL16r = 280, + X86_CALL32m = 281, + X86_CALL32r = 282, + X86_CALL64m = 283, + X86_CALL64pcrel32 = 284, + X86_CALL64r = 285, + X86_CALLpcrel16 = 286, + X86_CALLpcrel32 = 287, + X86_CBW = 288, + X86_CDQ = 289, + X86_CDQE = 290, + X86_CLAC = 291, + X86_CLC = 292, + X86_CLD = 293, + X86_CLGI = 294, + X86_CLI = 295, + X86_CLTS = 296, + X86_CMC = 297, + X86_CMOVA16rm = 298, + X86_CMOVA16rr = 299, + X86_CMOVA32rm = 300, + X86_CMOVA32rr = 301, + X86_CMOVA64rm = 302, + X86_CMOVA64rr = 303, + X86_CMOVAE16rm = 304, + X86_CMOVAE16rr = 305, + X86_CMOVAE32rm = 306, + X86_CMOVAE32rr = 307, + X86_CMOVAE64rm = 308, + X86_CMOVAE64rr = 309, + X86_CMOVB16rm = 310, + X86_CMOVB16rr = 311, + X86_CMOVB32rm = 312, + X86_CMOVB32rr = 313, + X86_CMOVB64rm = 314, + X86_CMOVB64rr = 315, + X86_CMOVBE16rm = 316, + X86_CMOVBE16rr = 317, + X86_CMOVBE32rm = 318, + X86_CMOVBE32rr = 319, + X86_CMOVBE64rm = 320, + X86_CMOVBE64rr = 321, + X86_CMOVE16rm = 322, + X86_CMOVE16rr = 323, + X86_CMOVE32rm = 324, + X86_CMOVE32rr = 325, + X86_CMOVE64rm = 326, + X86_CMOVE64rr = 327, + X86_CMOVG16rm = 328, + X86_CMOVG16rr = 329, + X86_CMOVG32rm = 330, + X86_CMOVG32rr = 331, + X86_CMOVG64rm = 332, + X86_CMOVG64rr = 333, + X86_CMOVGE16rm = 334, + X86_CMOVGE16rr = 335, + X86_CMOVGE32rm = 336, + X86_CMOVGE32rr = 337, + X86_CMOVGE64rm = 338, + X86_CMOVGE64rr = 339, + X86_CMOVL16rm = 340, + X86_CMOVL16rr = 341, + X86_CMOVL32rm = 342, + X86_CMOVL32rr = 343, + X86_CMOVL64rm = 344, + X86_CMOVL64rr = 345, + X86_CMOVLE16rm = 346, + X86_CMOVLE16rr = 347, + X86_CMOVLE32rm = 348, + X86_CMOVLE32rr = 349, + X86_CMOVLE64rm = 350, + X86_CMOVLE64rr = 351, + X86_CMOVNE16rm = 352, + X86_CMOVNE16rr = 353, + X86_CMOVNE32rm = 354, + X86_CMOVNE32rr = 355, + X86_CMOVNE64rm = 356, + X86_CMOVNE64rr = 357, + X86_CMOVNO16rm = 358, + X86_CMOVNO16rr = 359, + X86_CMOVNO32rm = 360, + X86_CMOVNO32rr = 361, + X86_CMOVNO64rm = 362, + X86_CMOVNO64rr = 363, + X86_CMOVNP16rm = 364, + X86_CMOVNP16rr = 365, + X86_CMOVNP32rm = 366, + X86_CMOVNP32rr = 367, + X86_CMOVNP64rm = 368, + X86_CMOVNP64rr = 369, + X86_CMOVNS16rm = 370, + X86_CMOVNS16rr = 371, + X86_CMOVNS32rm = 372, + X86_CMOVNS32rr = 373, + X86_CMOVNS64rm = 374, + X86_CMOVNS64rr = 375, + X86_CMOVO16rm = 376, + X86_CMOVO16rr = 377, + X86_CMOVO32rm = 378, + X86_CMOVO32rr = 379, + X86_CMOVO64rm = 380, + X86_CMOVO64rr = 381, + X86_CMOVP16rm = 382, + X86_CMOVP16rr = 383, + X86_CMOVP32rm = 384, + X86_CMOVP32rr = 385, + X86_CMOVP64rm = 386, + X86_CMOVP64rr = 387, + X86_CMOVS16rm = 388, + X86_CMOVS16rr = 389, + X86_CMOVS32rm = 390, + X86_CMOVS32rr = 391, + X86_CMOVS64rm = 392, + X86_CMOVS64rr = 393, + X86_CMOV_FR32 = 394, + X86_CMOV_FR64 = 395, + X86_CMOV_GR16 = 396, + X86_CMOV_GR32 = 397, + X86_CMOV_GR8 = 398, + X86_CMOV_RFP32 = 399, + X86_CMOV_RFP64 = 400, + X86_CMOV_RFP80 = 401, + X86_CMOV_V16F32 = 402, + X86_CMOV_V2F64 = 403, + X86_CMOV_V2I64 = 404, + X86_CMOV_V4F32 = 405, + X86_CMOV_V4F64 = 406, + X86_CMOV_V4I64 = 407, + X86_CMOV_V8F32 = 408, + X86_CMOV_V8F64 = 409, + X86_CMOV_V8I64 = 410, + X86_CMP16i16 = 411, + X86_CMP16mi = 412, + X86_CMP16mi8 = 413, + X86_CMP16mr = 414, + X86_CMP16ri = 415, + X86_CMP16ri8 = 416, + X86_CMP16rm = 417, + X86_CMP16rr = 418, + X86_CMP16rr_REV = 419, + X86_CMP32i32 = 420, + X86_CMP32mi = 421, + X86_CMP32mi8 = 422, + X86_CMP32mr = 423, + X86_CMP32ri = 424, + X86_CMP32ri8 = 425, + X86_CMP32rm = 426, + X86_CMP32rr = 427, + X86_CMP32rr_REV = 428, + X86_CMP64i32 = 429, + X86_CMP64mi32 = 430, + X86_CMP64mi8 = 431, + X86_CMP64mr = 432, + X86_CMP64ri32 = 433, + X86_CMP64ri8 = 434, + X86_CMP64rm = 435, + X86_CMP64rr = 436, + X86_CMP64rr_REV = 437, + X86_CMP82_8ri8 = 438, + X86_CMP8i8 = 439, + X86_CMP8mi = 440, + X86_CMP8mi8 = 441, + X86_CMP8mr = 442, + X86_CMP8ri = 443, + X86_CMP8rm = 444, + X86_CMP8rr = 445, + X86_CMP8rr_REV = 446, + X86_CMPSB = 447, + X86_CMPSL = 448, + X86_CMPSQ = 449, + X86_CMPSW = 450, + X86_CMPXCHG16B = 451, + X86_CMPXCHG16rm = 452, + X86_CMPXCHG16rr = 453, + X86_CMPXCHG32rm = 454, + X86_CMPXCHG32rr = 455, + X86_CMPXCHG64rm = 456, + X86_CMPXCHG64rr = 457, + X86_CMPXCHG8B = 458, + X86_CMPXCHG8rm = 459, + X86_CMPXCHG8rr = 460, + X86_CPUID32 = 461, + X86_CPUID64 = 462, + X86_CQO = 463, + X86_CWD = 464, + X86_CWDE = 465, + X86_DAA = 466, + X86_DAS = 467, + X86_DATA16_PREFIX = 468, + X86_DEC16m = 469, + X86_DEC16r = 470, + X86_DEC32_16r = 471, + X86_DEC32_32r = 472, + X86_DEC32m = 473, + X86_DEC32r = 474, + X86_DEC64_16m = 475, + X86_DEC64_16r = 476, + X86_DEC64_32m = 477, + X86_DEC64_32r = 478, + X86_DEC64m = 479, + X86_DEC64r = 480, + X86_DEC8m = 481, + X86_DEC8r = 482, + X86_DIV16m = 483, + X86_DIV16r = 484, + X86_DIV32m = 485, + X86_DIV32r = 486, + X86_DIV64m = 487, + X86_DIV64r = 488, + X86_DIV8m = 489, + X86_DIV8r = 490, + X86_EH_RETURN = 491, + X86_EH_RETURN64 = 492, + X86_EH_SjLj_LongJmp32 = 493, + X86_EH_SjLj_LongJmp64 = 494, + X86_EH_SjLj_SetJmp32 = 495, + X86_EH_SjLj_SetJmp64 = 496, + X86_EH_SjLj_Setup = 497, + X86_ENTER = 498, + X86_FARCALL16i = 499, + X86_FARCALL16m = 500, + X86_FARCALL32i = 501, + X86_FARCALL32m = 502, + X86_FARCALL64 = 503, + X86_FARJMP16i = 504, + X86_FARJMP16m = 505, + X86_FARJMP32i = 506, + X86_FARJMP32m = 507, + X86_FARJMP64 = 508, + X86_FSETPM = 509, + X86_GETSEC = 510, + X86_HLT = 511, + X86_IDIV16m = 512, + X86_IDIV16r = 513, + X86_IDIV32m = 514, + X86_IDIV32r = 515, + X86_IDIV64m = 516, + X86_IDIV64r = 517, + X86_IDIV8m = 518, + X86_IDIV8r = 519, + X86_IMUL16m = 520, + X86_IMUL16r = 521, + X86_IMUL16rm = 522, + X86_IMUL16rmi = 523, + X86_IMUL16rmi8 = 524, + X86_IMUL16rr = 525, + X86_IMUL16rri = 526, + X86_IMUL16rri8 = 527, + X86_IMUL32m = 528, + X86_IMUL32r = 529, + X86_IMUL32rm = 530, + X86_IMUL32rmi = 531, + X86_IMUL32rmi8 = 532, + X86_IMUL32rr = 533, + X86_IMUL32rri = 534, + X86_IMUL32rri8 = 535, + X86_IMUL64m = 536, + X86_IMUL64r = 537, + X86_IMUL64rm = 538, + X86_IMUL64rmi32 = 539, + X86_IMUL64rmi8 = 540, + X86_IMUL64rr = 541, + X86_IMUL64rri32 = 542, + X86_IMUL64rri8 = 543, + X86_IMUL8m = 544, + X86_IMUL8r = 545, + X86_IN16ri = 546, + X86_IN16rr = 547, + X86_IN32ri = 548, + X86_IN32rr = 549, + X86_IN8ri = 550, + X86_IN8rr = 551, + X86_INC16m = 552, + X86_INC16r = 553, + X86_INC32_16r = 554, + X86_INC32_32r = 555, + X86_INC32m = 556, + X86_INC32r = 557, + X86_INC64_16m = 558, + X86_INC64_16r = 559, + X86_INC64_32m = 560, + X86_INC64_32r = 561, + X86_INC64m = 562, + X86_INC64r = 563, + X86_INC8m = 564, + X86_INC8r = 565, + X86_INSB = 566, + X86_INSL = 567, + X86_INSW = 568, + X86_INT = 569, + X86_INT1 = 570, + X86_INT3 = 571, + X86_INTO = 572, + X86_INVD = 573, + X86_INVEPT32 = 574, + X86_INVEPT64 = 575, + X86_INVLPG = 576, + X86_INVLPGA32 = 577, + X86_INVLPGA64 = 578, + X86_INVPCID32 = 579, + X86_INVPCID64 = 580, + X86_INVVPID32 = 581, + X86_INVVPID64 = 582, + X86_IRET16 = 583, + X86_IRET32 = 584, + X86_IRET64 = 585, + X86_Int_MemBarrier = 586, + X86_JAE_1 = 587, + X86_JAE_2 = 588, + X86_JAE_4 = 589, + X86_JA_1 = 590, + X86_JA_2 = 591, + X86_JA_4 = 592, + X86_JBE_1 = 593, + X86_JBE_2 = 594, + X86_JBE_4 = 595, + X86_JB_1 = 596, + X86_JB_2 = 597, + X86_JB_4 = 598, + X86_JCXZ = 599, + X86_JECXZ_32 = 600, + X86_JECXZ_64 = 601, + X86_JE_1 = 602, + X86_JE_2 = 603, + X86_JE_4 = 604, + X86_JGE_1 = 605, + X86_JGE_2 = 606, + X86_JGE_4 = 607, + X86_JG_1 = 608, + X86_JG_2 = 609, + X86_JG_4 = 610, + X86_JLE_1 = 611, + X86_JLE_2 = 612, + X86_JLE_4 = 613, + X86_JL_1 = 614, + X86_JL_2 = 615, + X86_JL_4 = 616, + X86_JMP16m = 617, + X86_JMP16r = 618, + X86_JMP32m = 619, + X86_JMP32r = 620, + X86_JMP64m = 621, + X86_JMP64r = 622, + X86_JMP_1 = 623, + X86_JMP_2 = 624, + X86_JMP_4 = 625, + X86_JNE_1 = 626, + X86_JNE_2 = 627, + X86_JNE_4 = 628, + X86_JNO_1 = 629, + X86_JNO_2 = 630, + X86_JNO_4 = 631, + X86_JNP_1 = 632, + X86_JNP_2 = 633, + X86_JNP_4 = 634, + X86_JNS_1 = 635, + X86_JNS_2 = 636, + X86_JNS_4 = 637, + X86_JO_1 = 638, + X86_JO_2 = 639, + X86_JO_4 = 640, + X86_JP_1 = 641, + X86_JP_2 = 642, + X86_JP_4 = 643, + X86_JRCXZ = 644, + X86_JS_1 = 645, + X86_JS_2 = 646, + X86_JS_4 = 647, + X86_LAHF = 648, + X86_LAR16rm = 649, + X86_LAR16rr = 650, + X86_LAR32rm = 651, + X86_LAR32rr = 652, + X86_LAR64rm = 653, + X86_LAR64rr = 654, + X86_LCMPXCHG16 = 655, + X86_LCMPXCHG16B = 656, + X86_LCMPXCHG32 = 657, + X86_LCMPXCHG64 = 658, + X86_LCMPXCHG8 = 659, + X86_LCMPXCHG8B = 660, + X86_LDS16rm = 661, + X86_LDS32rm = 662, + X86_LEA16r = 663, + X86_LEA32r = 664, + X86_LEA64_32r = 665, + X86_LEA64r = 666, + X86_LEAVE = 667, + X86_LEAVE64 = 668, + X86_LES16rm = 669, + X86_LES32rm = 670, + X86_LFS16rm = 671, + X86_LFS32rm = 672, + X86_LFS64rm = 673, + X86_LGDT16m = 674, + X86_LGDT32m = 675, + X86_LGDT64m = 676, + X86_LGS16rm = 677, + X86_LGS32rm = 678, + X86_LGS64rm = 679, + X86_LIDT16m = 680, + X86_LIDT32m = 681, + X86_LIDT64m = 682, + X86_LLDT16m = 683, + X86_LLDT16r = 684, + X86_LMSW16m = 685, + X86_LMSW16r = 686, + X86_LOCK_ADD16mi = 687, + X86_LOCK_ADD16mi8 = 688, + X86_LOCK_ADD16mr = 689, + X86_LOCK_ADD32mi = 690, + X86_LOCK_ADD32mi8 = 691, + X86_LOCK_ADD32mr = 692, + X86_LOCK_ADD64mi32 = 693, + X86_LOCK_ADD64mi8 = 694, + X86_LOCK_ADD64mr = 695, + X86_LOCK_ADD8mi = 696, + X86_LOCK_ADD8mr = 697, + X86_LOCK_AND16mi = 698, + X86_LOCK_AND16mi8 = 699, + X86_LOCK_AND16mr = 700, + X86_LOCK_AND32mi = 701, + X86_LOCK_AND32mi8 = 702, + X86_LOCK_AND32mr = 703, + X86_LOCK_AND64mi32 = 704, + X86_LOCK_AND64mi8 = 705, + X86_LOCK_AND64mr = 706, + X86_LOCK_AND8mi = 707, + X86_LOCK_AND8mr = 708, + X86_LOCK_DEC16m = 709, + X86_LOCK_DEC32m = 710, + X86_LOCK_DEC64m = 711, + X86_LOCK_DEC8m = 712, + X86_LOCK_INC16m = 713, + X86_LOCK_INC32m = 714, + X86_LOCK_INC64m = 715, + X86_LOCK_INC8m = 716, + X86_LOCK_OR16mi = 717, + X86_LOCK_OR16mi8 = 718, + X86_LOCK_OR16mr = 719, + X86_LOCK_OR32mi = 720, + X86_LOCK_OR32mi8 = 721, + X86_LOCK_OR32mr = 722, + X86_LOCK_OR64mi32 = 723, + X86_LOCK_OR64mi8 = 724, + X86_LOCK_OR64mr = 725, + X86_LOCK_OR8mi = 726, + X86_LOCK_OR8mr = 727, + X86_LOCK_PREFIX = 728, + X86_LOCK_SUB16mi = 729, + X86_LOCK_SUB16mi8 = 730, + X86_LOCK_SUB16mr = 731, + X86_LOCK_SUB32mi = 732, + X86_LOCK_SUB32mi8 = 733, + X86_LOCK_SUB32mr = 734, + X86_LOCK_SUB64mi32 = 735, + X86_LOCK_SUB64mi8 = 736, + X86_LOCK_SUB64mr = 737, + X86_LOCK_SUB8mi = 738, + X86_LOCK_SUB8mr = 739, + X86_LOCK_XOR16mi = 740, + X86_LOCK_XOR16mi8 = 741, + X86_LOCK_XOR16mr = 742, + X86_LOCK_XOR32mi = 743, + X86_LOCK_XOR32mi8 = 744, + X86_LOCK_XOR32mr = 745, + X86_LOCK_XOR64mi32 = 746, + X86_LOCK_XOR64mi8 = 747, + X86_LOCK_XOR64mr = 748, + X86_LOCK_XOR8mi = 749, + X86_LOCK_XOR8mr = 750, + X86_LODSB = 751, + X86_LODSL = 752, + X86_LODSQ = 753, + X86_LODSW = 754, + X86_LOOP = 755, + X86_LOOPE = 756, + X86_LOOPNE = 757, + X86_LRETIL = 758, + X86_LRETIQ = 759, + X86_LRETIW = 760, + X86_LRETL = 761, + X86_LRETQ = 762, + X86_LRETW = 763, + X86_LSL16rm = 764, + X86_LSL16rr = 765, + X86_LSL32rm = 766, + X86_LSL32rr = 767, + X86_LSL64rm = 768, + X86_LSL64rr = 769, + X86_LSS16rm = 770, + X86_LSS32rm = 771, + X86_LSS64rm = 772, + X86_LTRm = 773, + X86_LTRr = 774, + X86_LXADD16 = 775, + X86_LXADD32 = 776, + X86_LXADD64 = 777, + X86_LXADD8 = 778, + X86_LZCNT16rm = 779, + X86_LZCNT16rr = 780, + X86_LZCNT32rm = 781, + X86_LZCNT32rr = 782, + X86_LZCNT64rm = 783, + X86_LZCNT64rr = 784, + X86_MONTMUL = 785, + X86_MORESTACK_RET = 786, + X86_MORESTACK_RET_RESTORE_R10 = 787, + X86_MOV16ao16 = 788, + X86_MOV16ao16_16 = 789, + X86_MOV16mi = 790, + X86_MOV16mr = 791, + X86_MOV16ms = 792, + X86_MOV16o16a = 793, + X86_MOV16o16a_16 = 794, + X86_MOV16ri = 795, + X86_MOV16ri_alt = 796, + X86_MOV16rm = 797, + X86_MOV16rr = 798, + X86_MOV16rr_REV = 799, + X86_MOV16rs = 800, + X86_MOV16sm = 801, + X86_MOV16sr = 802, + X86_MOV32ao32 = 803, + X86_MOV32ao32_16 = 804, + X86_MOV32cr = 805, + X86_MOV32dr = 806, + X86_MOV32mi = 807, + X86_MOV32mr = 808, + X86_MOV32ms = 809, + X86_MOV32o32a = 810, + X86_MOV32o32a_16 = 811, + X86_MOV32r0 = 812, + X86_MOV32rc = 813, + X86_MOV32rd = 814, + X86_MOV32ri = 815, + X86_MOV32ri64 = 816, + X86_MOV32ri_alt = 817, + X86_MOV32rm = 818, + X86_MOV32rr = 819, + X86_MOV32rr_REV = 820, + X86_MOV32rs = 821, + X86_MOV32sm = 822, + X86_MOV32sr = 823, + X86_MOV64ao16 = 824, + X86_MOV64ao32 = 825, + X86_MOV64ao64 = 826, + X86_MOV64ao8 = 827, + X86_MOV64cr = 828, + X86_MOV64dr = 829, + X86_MOV64mi32 = 830, + X86_MOV64mr = 831, + X86_MOV64ms = 832, + X86_MOV64o16a = 833, + X86_MOV64o32a = 834, + X86_MOV64o64a = 835, + X86_MOV64o8a = 836, + X86_MOV64rc = 837, + X86_MOV64rd = 838, + X86_MOV64ri = 839, + X86_MOV64ri32 = 840, + X86_MOV64rm = 841, + X86_MOV64rr = 842, + X86_MOV64rr_REV = 843, + X86_MOV64rs = 844, + X86_MOV64sm = 845, + X86_MOV64sr = 846, + X86_MOV8ao8 = 847, + X86_MOV8ao8_16 = 848, + X86_MOV8mi = 849, + X86_MOV8mr = 850, + X86_MOV8mr_NOREX = 851, + X86_MOV8o8a = 852, + X86_MOV8o8a_16 = 853, + X86_MOV8ri = 854, + X86_MOV8ri_alt = 855, + X86_MOV8rm = 856, + X86_MOV8rm_NOREX = 857, + X86_MOV8rr = 858, + X86_MOV8rr_NOREX = 859, + X86_MOV8rr_REV = 860, + X86_MOVBE16mr = 861, + X86_MOVBE16rm = 862, + X86_MOVBE32mr = 863, + X86_MOVBE32rm = 864, + X86_MOVBE64mr = 865, + X86_MOVBE64rm = 866, + X86_MOVPC32r = 867, + X86_MOVSB = 868, + X86_MOVSL = 869, + X86_MOVSQ = 870, + X86_MOVSW = 871, + X86_MOVSX16rm8 = 872, + X86_MOVSX16rr8 = 873, + X86_MOVSX32rm16 = 874, + X86_MOVSX32rm8 = 875, + X86_MOVSX32rr16 = 876, + X86_MOVSX32rr8 = 877, + X86_MOVSX64_NOREXrr32 = 878, + X86_MOVSX64rm16 = 879, + X86_MOVSX64rm32 = 880, + X86_MOVSX64rm8 = 881, + X86_MOVSX64rr16 = 882, + X86_MOVSX64rr32 = 883, + X86_MOVSX64rr8 = 884, + X86_MOVZX16rm8 = 885, + X86_MOVZX16rr8 = 886, + X86_MOVZX32_NOREXrm8 = 887, + X86_MOVZX32_NOREXrr8 = 888, + X86_MOVZX32rm16 = 889, + X86_MOVZX32rm8 = 890, + X86_MOVZX32rr16 = 891, + X86_MOVZX32rr8 = 892, + X86_MOVZX64rm16_Q = 893, + X86_MOVZX64rm8_Q = 894, + X86_MOVZX64rr16_Q = 895, + X86_MOVZX64rr8_Q = 896, + X86_MUL16m = 897, + X86_MUL16r = 898, + X86_MUL32m = 899, + X86_MUL32r = 900, + X86_MUL64m = 901, + X86_MUL64r = 902, + X86_MUL8m = 903, + X86_MUL8r = 904, + X86_MULX32rm = 905, + X86_MULX32rr = 906, + X86_MULX64rm = 907, + X86_MULX64rr = 908, + X86_NEG16m = 909, + X86_NEG16r = 910, + X86_NEG32m = 911, + X86_NEG32r = 912, + X86_NEG64m = 913, + X86_NEG64r = 914, + X86_NEG8m = 915, + X86_NEG8r = 916, + X86_NOOP = 917, + X86_NOOP18_16m4 = 918, + X86_NOOP18_16m5 = 919, + X86_NOOP18_16m6 = 920, + X86_NOOP18_16m7 = 921, + X86_NOOP18_16r4 = 922, + X86_NOOP18_16r5 = 923, + X86_NOOP18_16r6 = 924, + X86_NOOP18_16r7 = 925, + X86_NOOP18_m4 = 926, + X86_NOOP18_m5 = 927, + X86_NOOP18_m6 = 928, + X86_NOOP18_m7 = 929, + X86_NOOP18_r4 = 930, + X86_NOOP18_r5 = 931, + X86_NOOP18_r6 = 932, + X86_NOOP18_r7 = 933, + X86_NOOP19rr = 934, + X86_NOOPL = 935, + X86_NOOPL_19 = 936, + X86_NOOPL_1a = 937, + X86_NOOPL_1b = 938, + X86_NOOPL_1c = 939, + X86_NOOPL_1d = 940, + X86_NOOPL_1e = 941, + X86_NOOPW = 942, + X86_NOOPW_19 = 943, + X86_NOOPW_1a = 944, + X86_NOOPW_1b = 945, + X86_NOOPW_1c = 946, + X86_NOOPW_1d = 947, + X86_NOOPW_1e = 948, + X86_NOT16m = 949, + X86_NOT16r = 950, + X86_NOT32m = 951, + X86_NOT32r = 952, + X86_NOT64m = 953, + X86_NOT64r = 954, + X86_NOT8m = 955, + X86_NOT8r = 956, + X86_OR16i16 = 957, + X86_OR16mi = 958, + X86_OR16mi8 = 959, + X86_OR16mr = 960, + X86_OR16ri = 961, + X86_OR16ri8 = 962, + X86_OR16rm = 963, + X86_OR16rr = 964, + X86_OR16rr_REV = 965, + X86_OR32i32 = 966, + X86_OR32mi = 967, + X86_OR32mi8 = 968, + X86_OR32mr = 969, + X86_OR32mrLocked = 970, + X86_OR32ri = 971, + X86_OR32ri8 = 972, + X86_OR32rm = 973, + X86_OR32rr = 974, + X86_OR32rr_REV = 975, + X86_OR64i32 = 976, + X86_OR64mi32 = 977, + X86_OR64mi8 = 978, + X86_OR64mr = 979, + X86_OR64ri32 = 980, + X86_OR64ri8 = 981, + X86_OR64rm = 982, + X86_OR64rr = 983, + X86_OR64rr_REV = 984, + X86_OR82_8mi8 = 985, + X86_OR82_8ri8 = 986, + X86_OR8i8 = 987, + X86_OR8mi = 988, + X86_OR8mr = 989, + X86_OR8ri = 990, + X86_OR8rm = 991, + X86_OR8rr = 992, + X86_OR8rr_REV = 993, + X86_OUT16ir = 994, + X86_OUT16rr = 995, + X86_OUT32ir = 996, + X86_OUT32rr = 997, + X86_OUT8ir = 998, + X86_OUT8rr = 999, + X86_OUTSB = 1000, + X86_OUTSL = 1001, + X86_OUTSW = 1002, + X86_PDEP32rm = 1003, + X86_PDEP32rr = 1004, + X86_PDEP64rm = 1005, + X86_PDEP64rr = 1006, + X86_PEXT32rm = 1007, + X86_PEXT32rr = 1008, + X86_PEXT64rm = 1009, + X86_PEXT64rr = 1010, + X86_POP16r = 1011, + X86_POP16rmm = 1012, + X86_POP16rmr = 1013, + X86_POP32r = 1014, + X86_POP32rmm = 1015, + X86_POP32rmr = 1016, + X86_POP64r = 1017, + X86_POP64rmm = 1018, + X86_POP64rmr = 1019, + X86_POPA16 = 1020, + X86_POPA32 = 1021, + X86_POPDS16 = 1022, + X86_POPDS32 = 1023, + X86_POPES16 = 1024, + X86_POPES32 = 1025, + X86_POPF16 = 1026, + X86_POPF32 = 1027, + X86_POPF64 = 1028, + X86_POPFS16 = 1029, + X86_POPFS32 = 1030, + X86_POPFS64 = 1031, + X86_POPGS16 = 1032, + X86_POPGS32 = 1033, + X86_POPGS64 = 1034, + X86_POPSS16 = 1035, + X86_POPSS32 = 1036, + X86_PUSH16i8 = 1037, + X86_PUSH16r = 1038, + X86_PUSH16rmm = 1039, + X86_PUSH16rmr = 1040, + X86_PUSH32i8 = 1041, + X86_PUSH32r = 1042, + X86_PUSH32rmm = 1043, + X86_PUSH32rmr = 1044, + X86_PUSH64i16 = 1045, + X86_PUSH64i32 = 1046, + X86_PUSH64i8 = 1047, + X86_PUSH64r = 1048, + X86_PUSH64rmm = 1049, + X86_PUSH64rmr = 1050, + X86_PUSHA16 = 1051, + X86_PUSHA32 = 1052, + X86_PUSHCS16 = 1053, + X86_PUSHCS32 = 1054, + X86_PUSHDS16 = 1055, + X86_PUSHDS32 = 1056, + X86_PUSHES16 = 1057, + X86_PUSHES32 = 1058, + X86_PUSHF16 = 1059, + X86_PUSHF32 = 1060, + X86_PUSHF64 = 1061, + X86_PUSHFS16 = 1062, + X86_PUSHFS32 = 1063, + X86_PUSHFS64 = 1064, + X86_PUSHGS16 = 1065, + X86_PUSHGS32 = 1066, + X86_PUSHGS64 = 1067, + X86_PUSHSS16 = 1068, + X86_PUSHSS32 = 1069, + X86_PUSHi16 = 1070, + X86_PUSHi32 = 1071, + X86_RCL16m1 = 1072, + X86_RCL16mCL = 1073, + X86_RCL16mi = 1074, + X86_RCL16r1 = 1075, + X86_RCL16rCL = 1076, + X86_RCL16ri = 1077, + X86_RCL32m1 = 1078, + X86_RCL32mCL = 1079, + X86_RCL32mi = 1080, + X86_RCL32r1 = 1081, + X86_RCL32rCL = 1082, + X86_RCL32ri = 1083, + X86_RCL64m1 = 1084, + X86_RCL64mCL = 1085, + X86_RCL64mi = 1086, + X86_RCL64r1 = 1087, + X86_RCL64rCL = 1088, + X86_RCL64ri = 1089, + X86_RCL8m1 = 1090, + X86_RCL8mCL = 1091, + X86_RCL8mi = 1092, + X86_RCL8r1 = 1093, + X86_RCL8rCL = 1094, + X86_RCL8ri = 1095, + X86_RCR16m1 = 1096, + X86_RCR16mCL = 1097, + X86_RCR16mi = 1098, + X86_RCR16r1 = 1099, + X86_RCR16rCL = 1100, + X86_RCR16ri = 1101, + X86_RCR32m1 = 1102, + X86_RCR32mCL = 1103, + X86_RCR32mi = 1104, + X86_RCR32r1 = 1105, + X86_RCR32rCL = 1106, + X86_RCR32ri = 1107, + X86_RCR64m1 = 1108, + X86_RCR64mCL = 1109, + X86_RCR64mi = 1110, + X86_RCR64r1 = 1111, + X86_RCR64rCL = 1112, + X86_RCR64ri = 1113, + X86_RCR8m1 = 1114, + X86_RCR8mCL = 1115, + X86_RCR8mi = 1116, + X86_RCR8r1 = 1117, + X86_RCR8rCL = 1118, + X86_RCR8ri = 1119, + X86_RDFSBASE = 1120, + X86_RDFSBASE64 = 1121, + X86_RDGSBASE = 1122, + X86_RDGSBASE64 = 1123, + X86_RDMSR = 1124, + X86_RDPMC = 1125, + X86_RDRAND16r = 1126, + X86_RDRAND32r = 1127, + X86_RDRAND64r = 1128, + X86_RDSEED16r = 1129, + X86_RDSEED32r = 1130, + X86_RDSEED64r = 1131, + X86_RDTSC = 1132, + X86_RDTSCP = 1133, + X86_RELEASE_MOV16mr = 1134, + X86_RELEASE_MOV32mr = 1135, + X86_RELEASE_MOV64mr = 1136, + X86_RELEASE_MOV8mr = 1137, + X86_REPNE_PREFIX = 1138, + X86_REP_MOVSB_32 = 1139, + X86_REP_MOVSB_64 = 1140, + X86_REP_MOVSD_32 = 1141, + X86_REP_MOVSD_64 = 1142, + X86_REP_MOVSQ_64 = 1143, + X86_REP_MOVSW_32 = 1144, + X86_REP_MOVSW_64 = 1145, + X86_REP_PREFIX = 1146, + X86_REP_STOSB_32 = 1147, + X86_REP_STOSB_64 = 1148, + X86_REP_STOSD_32 = 1149, + X86_REP_STOSD_64 = 1150, + X86_REP_STOSQ_64 = 1151, + X86_REP_STOSW_32 = 1152, + X86_REP_STOSW_64 = 1153, + X86_RETIL = 1154, + X86_RETIQ = 1155, + X86_RETIW = 1156, + X86_RETL = 1157, + X86_RETQ = 1158, + X86_RETW = 1159, + X86_REX64_PREFIX = 1160, + X86_ROL16m1 = 1161, + X86_ROL16mCL = 1162, + X86_ROL16mi = 1163, + X86_ROL16r1 = 1164, + X86_ROL16rCL = 1165, + X86_ROL16ri = 1166, + X86_ROL32m1 = 1167, + X86_ROL32mCL = 1168, + X86_ROL32mi = 1169, + X86_ROL32r1 = 1170, + X86_ROL32rCL = 1171, + X86_ROL32ri = 1172, + X86_ROL64m1 = 1173, + X86_ROL64mCL = 1174, + X86_ROL64mi = 1175, + X86_ROL64r1 = 1176, + X86_ROL64rCL = 1177, + X86_ROL64ri = 1178, + X86_ROL8m1 = 1179, + X86_ROL8mCL = 1180, + X86_ROL8mi = 1181, + X86_ROL8r1 = 1182, + X86_ROL8rCL = 1183, + X86_ROL8ri = 1184, + X86_ROR16m1 = 1185, + X86_ROR16mCL = 1186, + X86_ROR16mi = 1187, + X86_ROR16r1 = 1188, + X86_ROR16rCL = 1189, + X86_ROR16ri = 1190, + X86_ROR32m1 = 1191, + X86_ROR32mCL = 1192, + X86_ROR32mi = 1193, + X86_ROR32r1 = 1194, + X86_ROR32rCL = 1195, + X86_ROR32ri = 1196, + X86_ROR64m1 = 1197, + X86_ROR64mCL = 1198, + X86_ROR64mi = 1199, + X86_ROR64r1 = 1200, + X86_ROR64rCL = 1201, + X86_ROR64ri = 1202, + X86_ROR8m1 = 1203, + X86_ROR8mCL = 1204, + X86_ROR8mi = 1205, + X86_ROR8r1 = 1206, + X86_ROR8rCL = 1207, + X86_ROR8ri = 1208, + X86_RORX32mi = 1209, + X86_RORX32ri = 1210, + X86_RORX64mi = 1211, + X86_RORX64ri = 1212, + X86_RSM = 1213, + X86_SAHF = 1214, + X86_SAL16m1 = 1215, + X86_SAL16mCL = 1216, + X86_SAL16mi = 1217, + X86_SAL16r1 = 1218, + X86_SAL16rCL = 1219, + X86_SAL16ri = 1220, + X86_SAL32m1 = 1221, + X86_SAL32mCL = 1222, + X86_SAL32mi = 1223, + X86_SAL32r1 = 1224, + X86_SAL32rCL = 1225, + X86_SAL32ri = 1226, + X86_SAL64m1 = 1227, + X86_SAL64mCL = 1228, + X86_SAL64mi = 1229, + X86_SAL64r1 = 1230, + X86_SAL64rCL = 1231, + X86_SAL64ri = 1232, + X86_SAL8m1 = 1233, + X86_SAL8mCL = 1234, + X86_SAL8mi = 1235, + X86_SAL8r1 = 1236, + X86_SAL8rCL = 1237, + X86_SAL8ri = 1238, + X86_SALC = 1239, + X86_SAR16m1 = 1240, + X86_SAR16mCL = 1241, + X86_SAR16mi = 1242, + X86_SAR16r1 = 1243, + X86_SAR16rCL = 1244, + X86_SAR16ri = 1245, + X86_SAR32m1 = 1246, + X86_SAR32mCL = 1247, + X86_SAR32mi = 1248, + X86_SAR32r1 = 1249, + X86_SAR32rCL = 1250, + X86_SAR32ri = 1251, + X86_SAR64m1 = 1252, + X86_SAR64mCL = 1253, + X86_SAR64mi = 1254, + X86_SAR64r1 = 1255, + X86_SAR64rCL = 1256, + X86_SAR64ri = 1257, + X86_SAR8m1 = 1258, + X86_SAR8mCL = 1259, + X86_SAR8mi = 1260, + X86_SAR8r1 = 1261, + X86_SAR8rCL = 1262, + X86_SAR8ri = 1263, + X86_SARX32rm = 1264, + X86_SARX32rr = 1265, + X86_SARX64rm = 1266, + X86_SARX64rr = 1267, + X86_SBB16i16 = 1268, + X86_SBB16mi = 1269, + X86_SBB16mi8 = 1270, + X86_SBB16mr = 1271, + X86_SBB16ri = 1272, + X86_SBB16ri8 = 1273, + X86_SBB16rm = 1274, + X86_SBB16rr = 1275, + X86_SBB16rr_REV = 1276, + X86_SBB32i32 = 1277, + X86_SBB32mi = 1278, + X86_SBB32mi8 = 1279, + X86_SBB32mr = 1280, + X86_SBB32ri = 1281, + X86_SBB32ri8 = 1282, + X86_SBB32rm = 1283, + X86_SBB32rr = 1284, + X86_SBB32rr_REV = 1285, + X86_SBB64i32 = 1286, + X86_SBB64mi32 = 1287, + X86_SBB64mi8 = 1288, + X86_SBB64mr = 1289, + X86_SBB64ri32 = 1290, + X86_SBB64ri8 = 1291, + X86_SBB64rm = 1292, + X86_SBB64rr = 1293, + X86_SBB64rr_REV = 1294, + X86_SBB82_8ri8 = 1295, + X86_SBB8i8 = 1296, + X86_SBB8mi = 1297, + X86_SBB8mi8 = 1298, + X86_SBB8mr = 1299, + X86_SBB8ri = 1300, + X86_SBB8rm = 1301, + X86_SBB8rr = 1302, + X86_SBB8rr_REV = 1303, + X86_SCASB = 1304, + X86_SCASL = 1305, + X86_SCASQ = 1306, + X86_SCASW = 1307, + X86_SEG_ALLOCA_32 = 1308, + X86_SEG_ALLOCA_64 = 1309, + X86_SEH_EndPrologue = 1310, + X86_SEH_Epilogue = 1311, + X86_SEH_PushFrame = 1312, + X86_SEH_PushReg = 1313, + X86_SEH_SaveReg = 1314, + X86_SEH_SaveXMM = 1315, + X86_SEH_SetFrame = 1316, + X86_SEH_StackAlloc = 1317, + X86_SETAEm = 1318, + X86_SETAEr = 1319, + X86_SETAm = 1320, + X86_SETAr = 1321, + X86_SETBEm = 1322, + X86_SETBEr = 1323, + X86_SETB_C16r = 1324, + X86_SETB_C32r = 1325, + X86_SETB_C64r = 1326, + X86_SETB_C8r = 1327, + X86_SETBm = 1328, + X86_SETBr = 1329, + X86_SETEm = 1330, + X86_SETEr = 1331, + X86_SETGEm = 1332, + X86_SETGEr = 1333, + X86_SETGm = 1334, + X86_SETGr = 1335, + X86_SETLEm = 1336, + X86_SETLEr = 1337, + X86_SETLm = 1338, + X86_SETLr = 1339, + X86_SETNEm = 1340, + X86_SETNEr = 1341, + X86_SETNOm = 1342, + X86_SETNOr = 1343, + X86_SETNPm = 1344, + X86_SETNPr = 1345, + X86_SETNSm = 1346, + X86_SETNSr = 1347, + X86_SETOm = 1348, + X86_SETOr = 1349, + X86_SETPm = 1350, + X86_SETPr = 1351, + X86_SETSm = 1352, + X86_SETSr = 1353, + X86_SGDT16m = 1354, + X86_SGDT32m = 1355, + X86_SGDT64m = 1356, + X86_SHL16m1 = 1357, + X86_SHL16mCL = 1358, + X86_SHL16mi = 1359, + X86_SHL16r1 = 1360, + X86_SHL16rCL = 1361, + X86_SHL16ri = 1362, + X86_SHL32m1 = 1363, + X86_SHL32mCL = 1364, + X86_SHL32mi = 1365, + X86_SHL32r1 = 1366, + X86_SHL32rCL = 1367, + X86_SHL32ri = 1368, + X86_SHL64m1 = 1369, + X86_SHL64mCL = 1370, + X86_SHL64mi = 1371, + X86_SHL64r1 = 1372, + X86_SHL64rCL = 1373, + X86_SHL64ri = 1374, + X86_SHL8m1 = 1375, + X86_SHL8mCL = 1376, + X86_SHL8mi = 1377, + X86_SHL8r1 = 1378, + X86_SHL8rCL = 1379, + X86_SHL8ri = 1380, + X86_SHLD16mrCL = 1381, + X86_SHLD16mri8 = 1382, + X86_SHLD16rrCL = 1383, + X86_SHLD16rri8 = 1384, + X86_SHLD32mrCL = 1385, + X86_SHLD32mri8 = 1386, + X86_SHLD32rrCL = 1387, + X86_SHLD32rri8 = 1388, + X86_SHLD64mrCL = 1389, + X86_SHLD64mri8 = 1390, + X86_SHLD64rrCL = 1391, + X86_SHLD64rri8 = 1392, + X86_SHLX32rm = 1393, + X86_SHLX32rr = 1394, + X86_SHLX64rm = 1395, + X86_SHLX64rr = 1396, + X86_SHR16m1 = 1397, + X86_SHR16mCL = 1398, + X86_SHR16mi = 1399, + X86_SHR16r1 = 1400, + X86_SHR16rCL = 1401, + X86_SHR16ri = 1402, + X86_SHR32m1 = 1403, + X86_SHR32mCL = 1404, + X86_SHR32mi = 1405, + X86_SHR32r1 = 1406, + X86_SHR32rCL = 1407, + X86_SHR32ri = 1408, + X86_SHR64m1 = 1409, + X86_SHR64mCL = 1410, + X86_SHR64mi = 1411, + X86_SHR64r1 = 1412, + X86_SHR64rCL = 1413, + X86_SHR64ri = 1414, + X86_SHR8m1 = 1415, + X86_SHR8mCL = 1416, + X86_SHR8mi = 1417, + X86_SHR8r1 = 1418, + X86_SHR8rCL = 1419, + X86_SHR8ri = 1420, + X86_SHRD16mrCL = 1421, + X86_SHRD16mri8 = 1422, + X86_SHRD16rrCL = 1423, + X86_SHRD16rri8 = 1424, + X86_SHRD32mrCL = 1425, + X86_SHRD32mri8 = 1426, + X86_SHRD32rrCL = 1427, + X86_SHRD32rri8 = 1428, + X86_SHRD64mrCL = 1429, + X86_SHRD64mri8 = 1430, + X86_SHRD64rrCL = 1431, + X86_SHRD64rri8 = 1432, + X86_SHRX32rm = 1433, + X86_SHRX32rr = 1434, + X86_SHRX64rm = 1435, + X86_SHRX64rr = 1436, + X86_SIDT16m = 1437, + X86_SIDT32m = 1438, + X86_SIDT64m = 1439, + X86_SKINIT = 1440, + X86_SLDT16m = 1441, + X86_SLDT16r = 1442, + X86_SLDT32r = 1443, + X86_SLDT64m = 1444, + X86_SLDT64r = 1445, + X86_SMSW16m = 1446, + X86_SMSW16r = 1447, + X86_SMSW32r = 1448, + X86_SMSW64r = 1449, + X86_STAC = 1450, + X86_STC = 1451, + X86_STD = 1452, + X86_STGI = 1453, + X86_STI = 1454, + X86_STOSB = 1455, + X86_STOSL = 1456, + X86_STOSQ = 1457, + X86_STOSW = 1458, + X86_STR16r = 1459, + X86_STR32r = 1460, + X86_STR64r = 1461, + X86_STRm = 1462, + X86_SUB16i16 = 1463, + X86_SUB16mi = 1464, + X86_SUB16mi8 = 1465, + X86_SUB16mr = 1466, + X86_SUB16ri = 1467, + X86_SUB16ri8 = 1468, + X86_SUB16rm = 1469, + X86_SUB16rr = 1470, + X86_SUB16rr_REV = 1471, + X86_SUB32i32 = 1472, + X86_SUB32mi = 1473, + X86_SUB32mi8 = 1474, + X86_SUB32mr = 1475, + X86_SUB32ri = 1476, + X86_SUB32ri8 = 1477, + X86_SUB32rm = 1478, + X86_SUB32rr = 1479, + X86_SUB32rr_REV = 1480, + X86_SUB64i32 = 1481, + X86_SUB64mi32 = 1482, + X86_SUB64mi8 = 1483, + X86_SUB64mr = 1484, + X86_SUB64ri32 = 1485, + X86_SUB64ri8 = 1486, + X86_SUB64rm = 1487, + X86_SUB64rr = 1488, + X86_SUB64rr_REV = 1489, + X86_SUB82_8mi8 = 1490, + X86_SUB82_8ri8 = 1491, + X86_SUB8i8 = 1492, + X86_SUB8mi = 1493, + X86_SUB8mr = 1494, + X86_SUB8ri = 1495, + X86_SUB8rm = 1496, + X86_SUB8rr = 1497, + X86_SUB8rr_REV = 1498, + X86_SWAPGS = 1499, + X86_SYSCALL = 1500, + X86_SYSENTER = 1501, + X86_SYSEXIT = 1502, + X86_SYSEXIT64 = 1503, + X86_SYSRET = 1504, + X86_SYSRET64 = 1505, + X86_T1MSKC32rm = 1506, + X86_T1MSKC32rr = 1507, + X86_T1MSKC64rm = 1508, + X86_T1MSKC64rr = 1509, + X86_TAILJMPd = 1510, + X86_TAILJMPd64 = 1511, + X86_TAILJMPm = 1512, + X86_TAILJMPm64 = 1513, + X86_TAILJMPr = 1514, + X86_TAILJMPr64 = 1515, + X86_TCRETURNdi = 1516, + X86_TCRETURNdi64 = 1517, + X86_TCRETURNmi = 1518, + X86_TCRETURNmi64 = 1519, + X86_TCRETURNri = 1520, + X86_TCRETURNri64 = 1521, + X86_TEST16i16 = 1522, + X86_TEST16mi = 1523, + X86_TEST16mi_alt = 1524, + X86_TEST16ri = 1525, + X86_TEST16ri_alt = 1526, + X86_TEST16rm = 1527, + X86_TEST16rr = 1528, + X86_TEST32i32 = 1529, + X86_TEST32mi = 1530, + X86_TEST32mi_alt = 1531, + X86_TEST32ri = 1532, + X86_TEST32ri_alt = 1533, + X86_TEST32rm = 1534, + X86_TEST32rr = 1535, + X86_TEST64i32 = 1536, + X86_TEST64mi32 = 1537, + X86_TEST64mi32_alt = 1538, + X86_TEST64ri32 = 1539, + X86_TEST64ri32_alt = 1540, + X86_TEST64rm = 1541, + X86_TEST64rr = 1542, + X86_TEST8i8 = 1543, + X86_TEST8mi = 1544, + X86_TEST8mi_alt = 1545, + X86_TEST8ri = 1546, + X86_TEST8ri_NOREX = 1547, + X86_TEST8ri_alt = 1548, + X86_TEST8rm = 1549, + X86_TEST8rr = 1550, + X86_TLSCall_32 = 1551, + X86_TLSCall_64 = 1552, + X86_TLS_addr32 = 1553, + X86_TLS_addr64 = 1554, + X86_TLS_base_addr32 = 1555, + X86_TLS_base_addr64 = 1556, + X86_TRAP = 1557, + X86_TZCNT16rm = 1558, + X86_TZCNT16rr = 1559, + X86_TZCNT32rm = 1560, + X86_TZCNT32rr = 1561, + X86_TZCNT64rm = 1562, + X86_TZCNT64rr = 1563, + X86_TZMSK32rm = 1564, + X86_TZMSK32rr = 1565, + X86_TZMSK64rm = 1566, + X86_TZMSK64rr = 1567, + X86_UD2B = 1568, + X86_VAARG_64 = 1569, + X86_VASTART_SAVE_XMM_REGS = 1570, + X86_VERRm = 1571, + X86_VERRr = 1572, + X86_VERWm = 1573, + X86_VERWr = 1574, + X86_VMCALL = 1575, + X86_VMCLEARm = 1576, + X86_VMFUNC = 1577, + X86_VMLAUNCH = 1578, + X86_VMLOAD32 = 1579, + X86_VMLOAD64 = 1580, + X86_VMMCALL = 1581, + X86_VMPTRLDm = 1582, + X86_VMPTRSTm = 1583, + X86_VMREAD32rm = 1584, + X86_VMREAD32rr = 1585, + X86_VMREAD64rm = 1586, + X86_VMREAD64rr = 1587, + X86_VMRESUME = 1588, + X86_VMRUN32 = 1589, + X86_VMRUN64 = 1590, + X86_VMSAVE32 = 1591, + X86_VMSAVE64 = 1592, + X86_VMWRITE32rm = 1593, + X86_VMWRITE32rr = 1594, + X86_VMWRITE64rm = 1595, + X86_VMWRITE64rr = 1596, + X86_VMXOFF = 1597, + X86_VMXON = 1598, + X86_W64ALLOCA = 1599, + X86_WBINVD = 1600, + X86_WIN_ALLOCA = 1601, + X86_WIN_FTOL_32 = 1602, + X86_WIN_FTOL_64 = 1603, + X86_WRFSBASE = 1604, + X86_WRFSBASE64 = 1605, + X86_WRGSBASE = 1606, + X86_WRGSBASE64 = 1607, + X86_WRMSR = 1608, + X86_XADD16rm = 1609, + X86_XADD16rr = 1610, + X86_XADD32rm = 1611, + X86_XADD32rr = 1612, + X86_XADD64rm = 1613, + X86_XADD64rr = 1614, + X86_XADD8rm = 1615, + X86_XADD8rr = 1616, + X86_XCHG16ar = 1617, + X86_XCHG16rm = 1618, + X86_XCHG16rr = 1619, + X86_XCHG32ar = 1620, + X86_XCHG32ar64 = 1621, + X86_XCHG32rm = 1622, + X86_XCHG32rr = 1623, + X86_XCHG64ar = 1624, + X86_XCHG64rm = 1625, + X86_XCHG64rr = 1626, + X86_XCHG8rm = 1627, + X86_XCHG8rr = 1628, + X86_XCRYPTCBC = 1629, + X86_XCRYPTCFB = 1630, + X86_XCRYPTCTR = 1631, + X86_XCRYPTECB = 1632, + X86_XCRYPTOFB = 1633, + X86_XGETBV = 1634, + X86_XLAT = 1635, + X86_XOR16i16 = 1636, + X86_XOR16mi = 1637, + X86_XOR16mi8 = 1638, + X86_XOR16mr = 1639, + X86_XOR16ri = 1640, + X86_XOR16ri8 = 1641, + X86_XOR16rm = 1642, + X86_XOR16rr = 1643, + X86_XOR16rr_REV = 1644, + X86_XOR32i32 = 1645, + X86_XOR32mi = 1646, + X86_XOR32mi8 = 1647, + X86_XOR32mr = 1648, + X86_XOR32ri = 1649, + X86_XOR32ri8 = 1650, + X86_XOR32rm = 1651, + X86_XOR32rr = 1652, + X86_XOR32rr_REV = 1653, + X86_XOR64i32 = 1654, + X86_XOR64mi32 = 1655, + X86_XOR64mi8 = 1656, + X86_XOR64mr = 1657, + X86_XOR64ri32 = 1658, + X86_XOR64ri8 = 1659, + X86_XOR64rm = 1660, + X86_XOR64rr = 1661, + X86_XOR64rr_REV = 1662, + X86_XOR82_8mi8 = 1663, + X86_XOR82_8ri8 = 1664, + X86_XOR8i8 = 1665, + X86_XOR8mi = 1666, + X86_XOR8mr = 1667, + X86_XOR8ri = 1668, + X86_XOR8rm = 1669, + X86_XOR8rr = 1670, + X86_XOR8rr_REV = 1671, + X86_XRSTOR = 1672, + X86_XRSTOR64 = 1673, + X86_XSAVE = 1674, + X86_XSAVE64 = 1675, + X86_XSAVEOPT = 1676, + X86_XSAVEOPT64 = 1677, + X86_XSETBV = 1678, + X86_XSHA1 = 1679, + X86_XSHA256 = 1680, + X86_XSTORE = 1681, + X86_INSTRUCTION_LIST_END = 1682 }; #endif // GET_INSTRINFO_ENUM @@ -1718,8 +1729,6 @@ static const x86_op_id_pair x86_16_bit_eq_tbl[] = { { 52, 34 }, { 53, 35 }, { 54, 36 }, - { 78, 66 }, - { 79, 67 }, { 80, 68 }, { 81, 69 }, { 82, 70 }, @@ -1730,620 +1739,622 @@ static const x86_op_id_pair x86_16_bit_eq_tbl[] = { { 87, 75 }, { 88, 76 }, { 89, 77 }, - { 90, 66 }, + { 90, 78 }, + { 91, 79 }, { 92, 68 }, - { 93, 69 }, - { 96, 71 }, - { 97, 72 }, - { 98, 74 }, - { 99, 75 }, + { 94, 70 }, + { 95, 71 }, + { 98, 73 }, + { 99, 74 }, { 100, 76 }, { 101, 77 }, - { 127, 118 }, - { 128, 119 }, - { 129, 120 }, + { 102, 78 }, + { 103, 79 }, { 130, 121 }, { 131, 122 }, { 132, 123 }, { 133, 124 }, { 134, 125 }, { 135, 126 }, - { 136, 118 }, - { 138, 120 }, + { 136, 127 }, + { 137, 128 }, + { 138, 129 }, { 139, 121 }, { 141, 123 }, { 142, 124 }, - { 143, 125 }, { 144, 126 }, - { 208, 207 }, - { 211, 209 }, - { 212, 210 }, - { 213, 209 }, - { 214, 210 }, - { 217, 215 }, - { 218, 216 }, - { 219, 215 }, - { 220, 216 }, - { 227, 223 }, - { 228, 224 }, - { 229, 225 }, - { 230, 226 }, - { 231, 223 }, - { 232, 224 }, - { 233, 225 }, - { 234, 226 }, - { 239, 235 }, - { 240, 236 }, - { 241, 237 }, - { 242, 238 }, - { 243, 235 }, - { 244, 236 }, - { 245, 237 }, - { 246, 238 }, - { 251, 247 }, - { 252, 248 }, - { 253, 249 }, - { 254, 250 }, - { 255, 247 }, - { 256, 248 }, - { 257, 249 }, - { 258, 250 }, - { 263, 259 }, - { 264, 260 }, - { 265, 261 }, - { 266, 262 }, - { 267, 259 }, - { 268, 260 }, - { 269, 261 }, - { 270, 262 }, - { 277, 275 }, - { 278, 276 }, - { 279, 275 }, - { 281, 276 }, - { 283, 282 }, - { 289, 458 }, - { 296, 294 }, - { 297, 295 }, - { 298, 294 }, - { 299, 295 }, - { 302, 300 }, - { 303, 301 }, - { 304, 300 }, - { 305, 301 }, - { 308, 306 }, - { 309, 307 }, - { 310, 306 }, - { 311, 307 }, - { 314, 312 }, - { 315, 313 }, - { 316, 312 }, - { 317, 313 }, - { 320, 318 }, - { 321, 319 }, - { 322, 318 }, - { 323, 319 }, - { 326, 324 }, - { 327, 325 }, - { 328, 324 }, - { 329, 325 }, - { 332, 330 }, - { 333, 331 }, - { 334, 330 }, - { 335, 331 }, - { 338, 336 }, - { 339, 337 }, - { 340, 336 }, - { 341, 337 }, - { 344, 342 }, - { 345, 343 }, - { 346, 342 }, - { 347, 343 }, - { 350, 348 }, - { 351, 349 }, - { 352, 348 }, - { 353, 349 }, - { 356, 354 }, - { 357, 355 }, - { 358, 354 }, - { 359, 355 }, - { 362, 360 }, - { 363, 361 }, - { 364, 360 }, - { 365, 361 }, - { 368, 366 }, - { 369, 367 }, - { 370, 366 }, - { 371, 367 }, - { 374, 372 }, - { 375, 373 }, - { 376, 372 }, - { 377, 373 }, - { 380, 378 }, - { 381, 379 }, - { 382, 378 }, - { 383, 379 }, - { 386, 384 }, - { 387, 385 }, - { 388, 384 }, - { 389, 385 }, - { 393, 392 }, - { 416, 407 }, - { 417, 408 }, - { 418, 409 }, - { 419, 410 }, + { 145, 127 }, + { 146, 128 }, + { 147, 129 }, + { 212, 211 }, + { 215, 213 }, + { 216, 214 }, + { 217, 213 }, + { 218, 214 }, + { 221, 219 }, + { 222, 220 }, + { 223, 219 }, + { 224, 220 }, + { 231, 227 }, + { 232, 228 }, + { 233, 229 }, + { 234, 230 }, + { 235, 227 }, + { 236, 228 }, + { 237, 229 }, + { 238, 230 }, + { 243, 239 }, + { 244, 240 }, + { 245, 241 }, + { 246, 242 }, + { 247, 239 }, + { 248, 240 }, + { 249, 241 }, + { 250, 242 }, + { 255, 251 }, + { 256, 252 }, + { 257, 253 }, + { 258, 254 }, + { 259, 251 }, + { 260, 252 }, + { 261, 253 }, + { 262, 254 }, + { 267, 263 }, + { 268, 264 }, + { 269, 265 }, + { 270, 266 }, + { 271, 263 }, + { 272, 264 }, + { 273, 265 }, + { 274, 266 }, + { 281, 279 }, + { 282, 280 }, + { 283, 279 }, + { 285, 280 }, + { 287, 286 }, + { 293, 464 }, + { 300, 298 }, + { 301, 299 }, + { 302, 298 }, + { 303, 299 }, + { 306, 304 }, + { 307, 305 }, + { 308, 304 }, + { 309, 305 }, + { 312, 310 }, + { 313, 311 }, + { 314, 310 }, + { 315, 311 }, + { 318, 316 }, + { 319, 317 }, + { 320, 316 }, + { 321, 317 }, + { 324, 322 }, + { 325, 323 }, + { 326, 322 }, + { 327, 323 }, + { 330, 328 }, + { 331, 329 }, + { 332, 328 }, + { 333, 329 }, + { 336, 334 }, + { 337, 335 }, + { 338, 334 }, + { 339, 335 }, + { 342, 340 }, + { 343, 341 }, + { 344, 340 }, + { 345, 341 }, + { 348, 346 }, + { 349, 347 }, + { 350, 346 }, + { 351, 347 }, + { 354, 352 }, + { 355, 353 }, + { 356, 352 }, + { 357, 353 }, + { 360, 358 }, + { 361, 359 }, + { 362, 358 }, + { 363, 359 }, + { 366, 364 }, + { 367, 365 }, + { 368, 364 }, + { 369, 365 }, + { 372, 370 }, + { 373, 371 }, + { 374, 370 }, + { 375, 371 }, + { 378, 376 }, + { 379, 377 }, + { 380, 376 }, + { 381, 377 }, + { 384, 382 }, + { 385, 383 }, + { 386, 382 }, + { 387, 383 }, + { 390, 388 }, + { 391, 389 }, + { 392, 388 }, + { 393, 389 }, + { 397, 396 }, { 420, 411 }, { 421, 412 }, { 422, 413 }, { 423, 414 }, { 424, 415 }, - { 425, 407 }, - { 427, 409 }, - { 428, 410 }, - { 430, 412 }, + { 425, 416 }, + { 426, 417 }, + { 427, 418 }, + { 428, 419 }, + { 429, 411 }, { 431, 413 }, { 432, 414 }, - { 433, 415 }, - { 442, 444 }, - { 443, 444 }, - { 448, 446 }, - { 449, 447 }, - { 450, 446 }, - { 451, 447 }, - { 466, 465 }, - { 467, 463 }, - { 468, 464 }, - { 471, 469 }, - { 472, 470 }, - { 473, 463 }, - { 474, 464 }, - { 479, 477 }, - { 480, 478 }, - { 481, 477 }, - { 482, 478 }, - { 495, 493 }, - { 496, 494 }, - { 500, 498 }, + { 434, 416 }, + { 435, 417 }, + { 436, 418 }, + { 437, 419 }, + { 448, 450 }, + { 449, 450 }, + { 454, 452 }, + { 455, 453 }, + { 456, 452 }, + { 457, 453 }, + { 472, 471 }, + { 473, 469 }, + { 474, 470 }, + { 477, 475 }, + { 478, 476 }, + { 479, 469 }, + { 480, 470 }, + { 485, 483 }, + { 486, 484 }, + { 487, 483 }, + { 488, 484 }, { 501, 499 }, - { 508, 506 }, - { 509, 507 }, - { 510, 506 }, - { 511, 507 }, - { 522, 514 }, - { 523, 515 }, - { 524, 516 }, - { 525, 517 }, - { 526, 518 }, - { 527, 519 }, + { 502, 500 }, + { 506, 504 }, + { 507, 505 }, + { 514, 512 }, + { 515, 513 }, + { 516, 512 }, + { 517, 513 }, { 528, 520 }, { 529, 521 }, - { 530, 514 }, - { 531, 515 }, - { 532, 516 }, - { 534, 518 }, - { 535, 519 }, + { 530, 522 }, + { 531, 523 }, + { 532, 524 }, + { 533, 525 }, + { 534, 526 }, + { 535, 527 }, + { 536, 520 }, { 537, 521 }, - { 542, 540 }, - { 543, 541 }, - { 549, 548 }, - { 550, 546 }, - { 551, 547 }, - { 554, 552 }, - { 555, 553 }, - { 556, 546 }, - { 557, 547 }, - { 561, 562 }, - { 565, 564 }, - { 578, 577 }, - { 579, 577 }, - { 613, 611 }, - { 614, 612 }, - { 615, 611 }, - { 616, 612 }, - { 645, 643 }, - { 646, 644 }, - { 647, 643 }, - { 648, 644 }, + { 538, 522 }, + { 540, 524 }, + { 541, 525 }, + { 543, 527 }, + { 548, 546 }, + { 549, 547 }, + { 555, 554 }, + { 556, 552 }, + { 557, 553 }, + { 560, 558 }, + { 561, 559 }, + { 562, 552 }, + { 563, 553 }, + { 567, 568 }, + { 571, 570 }, + { 584, 583 }, + { 585, 583 }, + { 619, 617 }, + { 620, 618 }, + { 621, 617 }, + { 622, 618 }, { 651, 649 }, - { 652, 649 }, - { 656, 655 }, - { 658, 657 }, - { 660, 657 }, + { 652, 650 }, + { 653, 649 }, + { 654, 650 }, + { 657, 655 }, + { 658, 655 }, + { 662, 661 }, { 664, 663 }, - { 666, 665 }, - { 667, 665 }, - { 669, 668 }, - { 670, 668 }, + { 666, 663 }, + { 670, 669 }, { 672, 671 }, { 673, 671 }, { 675, 674 }, { 676, 674 }, - { 684, 681 }, - { 685, 682 }, - { 686, 683 }, - { 688, 682 }, - { 689, 683 }, - { 695, 692 }, - { 696, 693 }, - { 697, 694 }, - { 699, 693 }, - { 700, 694 }, - { 704, 703 }, - { 705, 703 }, - { 708, 707 }, - { 709, 707 }, - { 714, 711 }, - { 715, 712 }, - { 716, 713 }, - { 718, 712 }, - { 719, 713 }, - { 726, 723 }, - { 727, 724 }, - { 728, 725 }, - { 730, 724 }, - { 731, 725 }, - { 737, 734 }, - { 738, 735 }, - { 739, 736 }, - { 741, 735 }, - { 742, 736 }, - { 746, 748 }, - { 747, 748 }, + { 678, 677 }, + { 679, 677 }, + { 681, 680 }, + { 682, 680 }, + { 690, 687 }, + { 691, 688 }, + { 692, 689 }, + { 694, 688 }, + { 695, 689 }, + { 701, 698 }, + { 702, 699 }, + { 703, 700 }, + { 705, 699 }, + { 706, 700 }, + { 710, 709 }, + { 711, 709 }, + { 714, 713 }, + { 715, 713 }, + { 720, 717 }, + { 721, 718 }, + { 722, 719 }, + { 724, 718 }, + { 725, 719 }, + { 732, 729 }, + { 733, 730 }, + { 734, 731 }, + { 736, 730 }, + { 737, 731 }, + { 743, 740 }, + { 744, 741 }, + { 745, 742 }, + { 747, 741 }, + { 748, 742 }, { 752, 754 }, { 753, 754 }, - { 755, 757 }, - { 756, 757 }, - { 760, 758 }, - { 761, 759 }, - { 762, 758 }, - { 763, 759 }, - { 765, 764 }, + { 758, 760 }, + { 759, 760 }, + { 761, 763 }, + { 762, 763 }, { 766, 764 }, - { 770, 769 }, - { 771, 769 }, - { 775, 773 }, - { 776, 774 }, - { 777, 773 }, - { 778, 774 }, - { 797, 782 }, - { 798, 783 }, - { 801, 784 }, - { 802, 785 }, - { 803, 786 }, - { 804, 787 }, - { 805, 788 }, - { 809, 789 }, - { 811, 790 }, - { 812, 791 }, - { 813, 792 }, - { 814, 793 }, - { 815, 794 }, - { 816, 795 }, + { 767, 765 }, + { 768, 764 }, + { 769, 765 }, + { 771, 770 }, + { 772, 770 }, + { 776, 775 }, + { 777, 775 }, + { 781, 779 }, + { 782, 780 }, + { 783, 779 }, + { 784, 780 }, + { 803, 788 }, + { 804, 789 }, + { 807, 790 }, + { 808, 791 }, + { 809, 792 }, + { 810, 793 }, + { 811, 794 }, + { 815, 795 }, { 817, 796 }, - { 818, 782 }, - { 819, 782 }, - { 819, 818 }, - { 820, 782 }, - { 820, 818 }, - { 825, 785 }, - { 826, 786 }, - { 827, 787 }, - { 828, 787 }, - { 828, 827 }, - { 829, 787 }, - { 829, 827 }, - { 833, 789 }, - { 835, 791 }, - { 836, 792 }, - { 837, 793 }, - { 838, 794 }, + { 818, 797 }, + { 819, 798 }, + { 820, 799 }, + { 821, 800 }, + { 822, 801 }, + { 823, 802 }, + { 824, 788 }, + { 825, 788 }, + { 825, 824 }, + { 826, 788 }, + { 826, 824 }, + { 831, 791 }, + { 832, 792 }, + { 833, 793 }, + { 834, 793 }, + { 834, 833 }, + { 835, 793 }, + { 835, 833 }, { 839, 795 }, - { 840, 796 }, - { 857, 855 }, - { 858, 856 }, - { 859, 855 }, - { 860, 856 }, - { 863, 865 }, - { 864, 865 }, - { 869, 866 }, - { 871, 867 }, - { 874, 873 }, - { 875, 866 }, - { 877, 876 }, - { 878, 867 }, - { 884, 879 }, - { 886, 880 }, - { 893, 891 }, - { 894, 892 }, - { 895, 891 }, - { 896, 892 }, - { 905, 903 }, - { 906, 904 }, - { 907, 903 }, - { 908, 904 }, - { 912, 914 }, - { 916, 918 }, - { 920, 922 }, - { 924, 926 }, - { 929, 936 }, - { 930, 937 }, - { 931, 938 }, - { 932, 939 }, - { 933, 940 }, - { 934, 941 }, + { 841, 797 }, + { 842, 798 }, + { 843, 799 }, + { 844, 800 }, + { 845, 801 }, + { 846, 802 }, + { 863, 861 }, + { 864, 862 }, + { 865, 861 }, + { 866, 862 }, + { 869, 871 }, + { 870, 871 }, + { 875, 872 }, + { 877, 873 }, + { 880, 879 }, + { 881, 872 }, + { 883, 882 }, + { 884, 873 }, + { 890, 885 }, + { 892, 886 }, + { 899, 897 }, + { 900, 898 }, + { 901, 897 }, + { 902, 898 }, + { 911, 909 }, + { 912, 910 }, + { 913, 909 }, + { 914, 910 }, + { 918, 920 }, + { 922, 924 }, + { 926, 928 }, + { 930, 932 }, { 935, 942 }, - { 945, 943 }, - { 946, 944 }, - { 947, 943 }, - { 948, 944 }, - { 960, 951 }, - { 961, 952 }, - { 962, 953 }, - { 963, 954 }, - { 965, 955 }, - { 966, 956 }, - { 967, 957 }, - { 968, 958 }, - { 969, 959 }, - { 970, 951 }, - { 972, 953 }, - { 973, 954 }, - { 975, 956 }, + { 936, 943 }, + { 937, 944 }, + { 938, 945 }, + { 939, 946 }, + { 940, 947 }, + { 941, 948 }, + { 951, 949 }, + { 952, 950 }, + { 953, 949 }, + { 954, 950 }, + { 966, 957 }, + { 967, 958 }, + { 968, 959 }, + { 969, 960 }, + { 971, 961 }, + { 972, 962 }, + { 973, 963 }, + { 974, 964 }, + { 975, 965 }, { 976, 957 }, - { 977, 958 }, { 978, 959 }, - { 989, 987 }, - { 990, 988 }, - { 994, 995 }, - { 1007, 1004 }, - { 1008, 1005 }, - { 1009, 1006 }, - { 1010, 1004 }, - { 1011, 1005 }, - { 1012, 1006 }, - { 1014, 1013 }, - { 1016, 1015 }, - { 1018, 1017 }, - { 1020, 1019 }, - { 1021, 1019 }, + { 979, 960 }, + { 981, 962 }, + { 982, 963 }, + { 983, 964 }, + { 984, 965 }, + { 996, 994 }, + { 997, 995 }, + { 1001, 1002 }, + { 1014, 1011 }, + { 1015, 1012 }, + { 1016, 1013 }, + { 1017, 1011 }, + { 1018, 1012 }, + { 1019, 1013 }, + { 1021, 1020 }, { 1023, 1022 }, - { 1024, 1022 }, - { 1026, 1025 }, - { 1027, 1025 }, - { 1029, 1028 }, - { 1034, 1030 }, - { 1035, 1031 }, - { 1036, 1032 }, - { 1037, 1033 }, - { 1039, 1038 }, - { 1040, 1030 }, - { 1041, 1031 }, - { 1042, 1032 }, - { 1043, 1033 }, - { 1045, 1044 }, - { 1047, 1046 }, - { 1049, 1048 }, - { 1051, 1050 }, - { 1053, 1052 }, - { 1054, 1052 }, + { 1025, 1024 }, + { 1027, 1026 }, + { 1028, 1026 }, + { 1030, 1029 }, + { 1031, 1029 }, + { 1033, 1032 }, + { 1034, 1032 }, + { 1036, 1035 }, + { 1041, 1037 }, + { 1042, 1038 }, + { 1043, 1039 }, + { 1044, 1040 }, + { 1046, 1045 }, + { 1047, 1037 }, + { 1048, 1038 }, + { 1049, 1039 }, + { 1050, 1040 }, + { 1052, 1051 }, + { 1054, 1053 }, { 1056, 1055 }, - { 1057, 1055 }, - { 1059, 1058 }, - { 1060, 1058 }, - { 1062, 1061 }, - { 1064, 1063 }, - { 1071, 1065 }, - { 1072, 1066 }, - { 1073, 1067 }, - { 1074, 1068 }, - { 1075, 1069 }, - { 1076, 1070 }, - { 1077, 1065 }, - { 1078, 1066 }, - { 1079, 1067 }, - { 1080, 1068 }, - { 1081, 1069 }, - { 1082, 1070 }, - { 1095, 1089 }, - { 1096, 1090 }, - { 1097, 1091 }, - { 1098, 1092 }, - { 1099, 1093 }, - { 1100, 1094 }, - { 1101, 1089 }, - { 1102, 1090 }, - { 1103, 1091 }, - { 1104, 1092 }, - { 1105, 1093 }, - { 1106, 1094 }, - { 1120, 1119 }, - { 1121, 1119 }, - { 1123, 1122 }, - { 1124, 1122 }, - { 1128, 1127 }, - { 1129, 1127 }, - { 1136, 1138 }, - { 1144, 1146 }, - { 1147, 1149 }, - { 1148, 1149 }, - { 1150, 1152 }, - { 1151, 1152 }, - { 1160, 1154 }, - { 1161, 1155 }, - { 1162, 1156 }, - { 1163, 1157 }, - { 1164, 1158 }, - { 1165, 1159 }, - { 1166, 1154 }, - { 1167, 1155 }, - { 1168, 1156 }, - { 1169, 1157 }, - { 1170, 1158 }, - { 1171, 1159 }, - { 1184, 1178 }, - { 1185, 1179 }, - { 1186, 1180 }, - { 1187, 1181 }, - { 1188, 1182 }, - { 1189, 1183 }, - { 1190, 1178 }, - { 1191, 1179 }, - { 1192, 1180 }, - { 1193, 1181 }, - { 1194, 1182 }, - { 1195, 1183 }, - { 1214, 1208 }, - { 1215, 1209 }, - { 1216, 1210 }, - { 1217, 1211 }, - { 1218, 1212 }, - { 1219, 1213 }, - { 1220, 1208 }, - { 1221, 1209 }, - { 1222, 1210 }, - { 1223, 1211 }, - { 1224, 1212 }, - { 1225, 1213 }, - { 1239, 1233 }, - { 1240, 1234 }, - { 1241, 1235 }, - { 1242, 1236 }, - { 1243, 1237 }, - { 1244, 1238 }, - { 1245, 1233 }, - { 1246, 1234 }, - { 1247, 1235 }, - { 1248, 1236 }, - { 1249, 1237 }, - { 1250, 1238 }, - { 1270, 1261 }, - { 1271, 1262 }, - { 1272, 1263 }, - { 1273, 1264 }, - { 1274, 1265 }, - { 1275, 1266 }, - { 1276, 1267 }, + { 1058, 1057 }, + { 1060, 1059 }, + { 1061, 1059 }, + { 1063, 1062 }, + { 1064, 1062 }, + { 1066, 1065 }, + { 1067, 1065 }, + { 1069, 1068 }, + { 1071, 1070 }, + { 1078, 1072 }, + { 1079, 1073 }, + { 1080, 1074 }, + { 1081, 1075 }, + { 1082, 1076 }, + { 1083, 1077 }, + { 1084, 1072 }, + { 1085, 1073 }, + { 1086, 1074 }, + { 1087, 1075 }, + { 1088, 1076 }, + { 1089, 1077 }, + { 1102, 1096 }, + { 1103, 1097 }, + { 1104, 1098 }, + { 1105, 1099 }, + { 1106, 1100 }, + { 1107, 1101 }, + { 1108, 1096 }, + { 1109, 1097 }, + { 1110, 1098 }, + { 1111, 1099 }, + { 1112, 1100 }, + { 1113, 1101 }, + { 1127, 1126 }, + { 1128, 1126 }, + { 1130, 1129 }, + { 1131, 1129 }, + { 1135, 1134 }, + { 1136, 1134 }, + { 1143, 1145 }, + { 1151, 1153 }, + { 1154, 1156 }, + { 1155, 1156 }, + { 1157, 1159 }, + { 1158, 1159 }, + { 1167, 1161 }, + { 1168, 1162 }, + { 1169, 1163 }, + { 1170, 1164 }, + { 1171, 1165 }, + { 1172, 1166 }, + { 1173, 1161 }, + { 1174, 1162 }, + { 1175, 1163 }, + { 1176, 1164 }, + { 1177, 1165 }, + { 1178, 1166 }, + { 1191, 1185 }, + { 1192, 1186 }, + { 1193, 1187 }, + { 1194, 1188 }, + { 1195, 1189 }, + { 1196, 1190 }, + { 1197, 1185 }, + { 1198, 1186 }, + { 1199, 1187 }, + { 1200, 1188 }, + { 1201, 1189 }, + { 1202, 1190 }, + { 1221, 1215 }, + { 1222, 1216 }, + { 1223, 1217 }, + { 1224, 1218 }, + { 1225, 1219 }, + { 1226, 1220 }, + { 1227, 1215 }, + { 1228, 1216 }, + { 1229, 1217 }, + { 1230, 1218 }, + { 1231, 1219 }, + { 1232, 1220 }, + { 1246, 1240 }, + { 1247, 1241 }, + { 1248, 1242 }, + { 1249, 1243 }, + { 1250, 1244 }, + { 1251, 1245 }, + { 1252, 1240 }, + { 1253, 1241 }, + { 1254, 1242 }, + { 1255, 1243 }, + { 1256, 1244 }, + { 1257, 1245 }, { 1277, 1268 }, { 1278, 1269 }, - { 1279, 1261 }, - { 1281, 1263 }, - { 1282, 1264 }, - { 1284, 1266 }, - { 1285, 1267 }, + { 1279, 1270 }, + { 1280, 1271 }, + { 1281, 1272 }, + { 1282, 1273 }, + { 1283, 1274 }, + { 1284, 1275 }, + { 1285, 1276 }, { 1286, 1268 }, - { 1287, 1269 }, - { 1296, 1298 }, - { 1297, 1298 }, - { 1316, 1315 }, - { 1317, 1315 }, - { 1346, 1345 }, - { 1347, 1345 }, - { 1354, 1348 }, - { 1355, 1349 }, - { 1356, 1350 }, - { 1357, 1351 }, - { 1358, 1352 }, - { 1359, 1353 }, - { 1360, 1348 }, - { 1361, 1349 }, - { 1362, 1350 }, - { 1363, 1351 }, - { 1364, 1352 }, - { 1365, 1353 }, - { 1376, 1372 }, - { 1377, 1373 }, - { 1378, 1374 }, - { 1379, 1375 }, - { 1380, 1372 }, - { 1381, 1373 }, - { 1382, 1374 }, - { 1383, 1375 }, - { 1394, 1388 }, - { 1395, 1389 }, - { 1396, 1390 }, - { 1397, 1391 }, - { 1398, 1392 }, - { 1399, 1393 }, - { 1400, 1388 }, - { 1401, 1389 }, - { 1402, 1390 }, - { 1403, 1391 }, - { 1404, 1392 }, - { 1405, 1393 }, - { 1416, 1412 }, - { 1417, 1413 }, - { 1418, 1414 }, - { 1419, 1415 }, - { 1420, 1412 }, - { 1421, 1413 }, - { 1422, 1414 }, - { 1423, 1415 }, - { 1429, 1428 }, - { 1430, 1428 }, - { 1434, 1433 }, - { 1435, 1432 }, - { 1436, 1433 }, - { 1439, 1438 }, - { 1440, 1438 }, - { 1447, 1449 }, - { 1448, 1449 }, - { 1451, 1450 }, - { 1452, 1450 }, - { 1463, 1454 }, - { 1464, 1455 }, - { 1465, 1456 }, - { 1466, 1457 }, - { 1467, 1458 }, - { 1468, 1459 }, - { 1469, 1460 }, - { 1470, 1461 }, - { 1471, 1462 }, - { 1472, 1454 }, - { 1474, 1456 }, - { 1475, 1457 }, - { 1477, 1459 }, - { 1478, 1460 }, - { 1479, 1461 }, - { 1480, 1462 }, - { 1519, 1512 }, - { 1520, 1513 }, - { 1521, 1514 }, - { 1522, 1515 }, - { 1523, 1516 }, - { 1524, 1517 }, - { 1525, 1518 }, - { 1526, 1512 }, - { 1531, 1517 }, - { 1532, 1518 }, - { 1550, 1548 }, - { 1551, 1549 }, - { 1552, 1548 }, - { 1553, 1549 }, - { 1601, 1599 }, - { 1602, 1600 }, - { 1603, 1599 }, - { 1604, 1600 }, - { 1610, 1607 }, - { 1612, 1608 }, + { 1288, 1270 }, + { 1289, 1271 }, + { 1291, 1273 }, + { 1292, 1274 }, + { 1293, 1275 }, + { 1294, 1276 }, + { 1305, 1307 }, + { 1306, 1307 }, + { 1325, 1324 }, + { 1326, 1324 }, + { 1355, 1354 }, + { 1356, 1354 }, + { 1363, 1357 }, + { 1364, 1358 }, + { 1365, 1359 }, + { 1366, 1360 }, + { 1367, 1361 }, + { 1368, 1362 }, + { 1369, 1357 }, + { 1370, 1358 }, + { 1371, 1359 }, + { 1372, 1360 }, + { 1373, 1361 }, + { 1374, 1362 }, + { 1385, 1381 }, + { 1386, 1382 }, + { 1387, 1383 }, + { 1388, 1384 }, + { 1389, 1381 }, + { 1390, 1382 }, + { 1391, 1383 }, + { 1392, 1384 }, + { 1403, 1397 }, + { 1404, 1398 }, + { 1405, 1399 }, + { 1406, 1400 }, + { 1407, 1401 }, + { 1408, 1402 }, + { 1409, 1397 }, + { 1410, 1398 }, + { 1411, 1399 }, + { 1412, 1400 }, + { 1413, 1401 }, + { 1414, 1402 }, + { 1425, 1421 }, + { 1426, 1422 }, + { 1427, 1423 }, + { 1428, 1424 }, + { 1429, 1421 }, + { 1430, 1422 }, + { 1431, 1423 }, + { 1432, 1424 }, + { 1438, 1437 }, + { 1439, 1437 }, + { 1443, 1442 }, + { 1444, 1441 }, + { 1445, 1442 }, + { 1448, 1447 }, + { 1449, 1447 }, + { 1456, 1458 }, + { 1457, 1458 }, + { 1460, 1459 }, + { 1461, 1459 }, + { 1472, 1463 }, + { 1473, 1464 }, + { 1474, 1465 }, + { 1475, 1466 }, + { 1476, 1467 }, + { 1477, 1468 }, + { 1478, 1469 }, + { 1479, 1470 }, + { 1480, 1471 }, + { 1481, 1463 }, + { 1483, 1465 }, + { 1484, 1466 }, + { 1486, 1468 }, + { 1487, 1469 }, + { 1488, 1470 }, + { 1489, 1471 }, + { 1529, 1522 }, + { 1530, 1523 }, + { 1531, 1524 }, + { 1532, 1525 }, + { 1533, 1526 }, + { 1534, 1527 }, + { 1535, 1528 }, + { 1536, 1522 }, + { 1541, 1527 }, + { 1542, 1528 }, + { 1560, 1558 }, + { 1561, 1559 }, + { 1562, 1558 }, + { 1563, 1559 }, + { 1611, 1609 }, + { 1612, 1610 }, { 1613, 1609 }, - { 1614, 1607 }, - { 1615, 1608 }, - { 1616, 1609 }, - { 1635, 1626 }, - { 1636, 1627 }, - { 1637, 1628 }, - { 1638, 1629 }, - { 1639, 1630 }, - { 1640, 1631 }, - { 1641, 1632 }, - { 1642, 1633 }, - { 1643, 1634 }, - { 1644, 1626 }, - { 1646, 1628 }, - { 1647, 1629 }, - { 1649, 1631 }, - { 1650, 1632 }, - { 1651, 1633 }, - { 1652, 1634 }, + { 1614, 1610 }, + { 1620, 1617 }, + { 1622, 1618 }, + { 1623, 1619 }, + { 1624, 1617 }, + { 1625, 1618 }, + { 1626, 1619 }, + { 1645, 1636 }, + { 1646, 1637 }, + { 1647, 1638 }, + { 1648, 1639 }, + { 1649, 1640 }, + { 1650, 1641 }, + { 1651, 1642 }, + { 1652, 1643 }, + { 1653, 1644 }, + { 1654, 1636 }, + { 1656, 1638 }, + { 1657, 1639 }, + { 1659, 1641 }, + { 1660, 1642 }, + { 1661, 1643 }, + { 1662, 1644 }, }; static const uint16_t x86_16_bit_eq_lookup[] = { @@ -2353,140 +2364,141 @@ static const uint16_t x86_16_bit_eq_lookup[] = { 0, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 0, 13, 14, 0, 15, 16, 17, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, 31, 0, 32, 33, 0, 0, - 34, 35, 36, 37, 38, 39, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 19, 20, 21, 22, + 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 32, 33, + 0, 0, 34, 35, 36, 37, 38, 39, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 40, 41, 42, 43, 44, - 45, 46, 47, 48, 49, 0, 50, 51, 0, 52, 53, 54, - 55, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 40, 41, + 42, 43, 44, 45, 46, 47, 48, 49, 0, 50, 51, 0, + 52, 53, 54, 55, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 56, 0, 0, 57, 58, 59, 60, 0, - 0, 61, 62, 63, 64, 0, 0, 0, 0, 0, 0, 65, - 66, 67, 68, 69, 70, 71, 72, 0, 0, 0, 0, 73, - 74, 75, 76, 77, 78, 79, 80, 0, 0, 0, 0, 81, - 82, 83, 84, 85, 86, 87, 88, 0, 0, 0, 0, 89, - 90, 91, 92, 93, 94, 95, 96, 0, 0, 0, 0, 0, - 0, 97, 98, 99, 0, 100, 0, 101, 0, 0, 0, 0, - 0, 102, 0, 0, 0, 0, 0, 0, 103, 104, 105, 106, - 0, 0, 107, 108, 109, 110, 0, 0, 111, 112, 113, 114, - 0, 0, 115, 116, 117, 118, 0, 0, 119, 120, 121, 122, - 0, 0, 123, 124, 125, 126, 0, 0, 127, 128, 129, 130, - 0, 0, 131, 132, 133, 134, 0, 0, 135, 136, 137, 138, - 0, 0, 139, 140, 141, 142, 0, 0, 143, 144, 145, 146, - 0, 0, 147, 148, 149, 150, 0, 0, 151, 152, 153, 154, - 0, 0, 155, 156, 157, 158, 0, 0, 159, 160, 161, 162, - 0, 0, 163, 164, 165, 166, 0, 0, 0, 167, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 56, 0, 0, 57, + 58, 59, 60, 0, 0, 61, 62, 63, 64, 0, 0, 0, + 0, 0, 0, 65, 66, 67, 68, 69, 70, 71, 72, 0, + 0, 0, 0, 73, 74, 75, 76, 77, 78, 79, 80, 0, + 0, 0, 0, 81, 82, 83, 84, 85, 86, 87, 88, 0, + 0, 0, 0, 89, 90, 91, 92, 93, 94, 95, 96, 0, + 0, 0, 0, 0, 0, 97, 98, 99, 0, 100, 0, 101, + 0, 0, 0, 0, 0, 102, 0, 0, 0, 0, 0, 0, + 103, 104, 105, 106, 0, 0, 107, 108, 109, 110, 0, 0, + 111, 112, 113, 114, 0, 0, 115, 116, 117, 118, 0, 0, + 119, 120, 121, 122, 0, 0, 123, 124, 125, 126, 0, 0, + 127, 128, 129, 130, 0, 0, 131, 132, 133, 134, 0, 0, + 135, 136, 137, 138, 0, 0, 139, 140, 141, 142, 0, 0, + 143, 144, 145, 146, 0, 0, 147, 148, 149, 150, 0, 0, + 151, 152, 153, 154, 0, 0, 155, 156, 157, 158, 0, 0, + 159, 160, 161, 162, 0, 0, 163, 164, 165, 166, 0, 0, + 0, 167, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 168, 169, 170, 171, - 172, 173, 174, 175, 176, 177, 0, 178, 179, 0, 180, 181, - 182, 183, 0, 0, 0, 0, 0, 0, 0, 0, 184, 185, - 0, 0, 0, 0, 186, 187, 188, 189, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 190, 191, - 192, 0, 0, 193, 194, 195, 196, 0, 0, 0, 0, 197, - 198, 199, 200, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 201, 202, 0, 0, 0, 203, 204, 0, 0, - 0, 0, 0, 0, 205, 206, 207, 208, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 209, 210, 211, 212, 213, 214, - 215, 216, 217, 218, 219, 0, 220, 221, 0, 222, 0, 0, - 0, 0, 223, 224, 0, 0, 0, 0, 0, 225, 226, 227, - 0, 0, 228, 229, 230, 231, 0, 0, 0, 232, 0, 0, - 0, 233, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 234, 235, 0, 0, 0, 0, 0, 0, 0, 0, + 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 0, 178, + 179, 0, 180, 181, 182, 183, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 184, 185, 0, 0, 0, 0, 186, 187, + 188, 189, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 190, 191, 192, 0, 0, 193, 194, 195, + 196, 0, 0, 0, 0, 197, 198, 199, 200, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 201, 202, 0, + 0, 0, 203, 204, 0, 0, 0, 0, 0, 0, 205, 206, + 207, 208, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 0, + 220, 221, 0, 222, 0, 0, 0, 0, 223, 224, 0, 0, + 0, 0, 0, 225, 226, 227, 0, 0, 228, 229, 230, 231, + 0, 0, 0, 232, 0, 0, 0, 233, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 234, 235, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 236, 237, 238, 239, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 240, 241, 242, - 243, 0, 0, 244, 245, 0, 0, 0, 246, 0, 247, 0, - 248, 0, 0, 0, 249, 0, 250, 251, 0, 252, 253, 0, - 254, 255, 0, 256, 257, 0, 0, 0, 0, 0, 0, 0, - 258, 259, 260, 0, 261, 262, 0, 0, 0, 0, 0, 263, - 264, 265, 0, 266, 267, 0, 0, 0, 268, 269, 0, 0, - 270, 271, 0, 0, 0, 0, 272, 273, 274, 0, 275, 276, - 0, 0, 0, 0, 0, 0, 277, 278, 279, 0, 280, 281, - 0, 0, 0, 0, 0, 282, 283, 284, 0, 285, 286, 0, - 0, 0, 287, 288, 0, 0, 0, 0, 289, 290, 0, 291, - 292, 0, 0, 0, 293, 294, 295, 296, 0, 297, 298, 0, - 0, 0, 299, 300, 0, 0, 0, 301, 302, 303, 304, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 305, 306, 0, 0, 307, 308, 309, - 310, 311, 0, 0, 0, 312, 0, 313, 314, 315, 316, 317, - 318, 319, 320, 321, 323, 0, 0, 0, 0, 325, 326, 327, - 328, 330, 0, 0, 0, 332, 0, 333, 334, 335, 336, 337, - 338, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 339, 340, 341, 342, 0, 0, 343, - 344, 0, 0, 0, 0, 345, 0, 346, 0, 0, 347, 348, - 0, 349, 350, 0, 0, 0, 0, 0, 351, 0, 352, 0, - 0, 0, 0, 0, 0, 353, 354, 355, 356, 0, 0, 0, - 0, 0, 0, 0, 0, 357, 358, 359, 360, 0, 0, 0, - 361, 0, 0, 0, 362, 0, 0, 0, 363, 0, 0, 0, - 364, 0, 0, 0, 0, 365, 366, 367, 368, 369, 370, 371, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 372, 373, 374, - 375, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 376, 377, 378, 379, 0, 380, 381, 382, 383, 384, 385, 0, - 386, 387, 0, 388, 389, 390, 391, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 392, 393, 0, 0, 0, 394, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 395, - 396, 397, 398, 399, 400, 0, 401, 0, 402, 0, 403, 0, - 404, 405, 0, 406, 407, 0, 408, 409, 0, 410, 0, 0, - 0, 0, 411, 412, 413, 414, 0, 415, 416, 417, 418, 419, - 0, 420, 0, 421, 0, 422, 0, 423, 0, 424, 425, 0, - 426, 427, 0, 428, 429, 0, 430, 0, 431, 0, 0, 0, - 0, 0, 0, 432, 433, 434, 435, 436, 437, 438, 439, 440, - 441, 442, 443, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 444, 445, 446, 447, 448, 449, 450, 451, 452, - 453, 454, 455, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 456, 457, 0, 458, 459, 0, 0, 0, - 460, 461, 0, 0, 0, 0, 0, 0, 462, 0, 0, 0, - 0, 0, 0, 0, 463, 0, 0, 464, 465, 0, 466, 467, - 0, 0, 0, 0, 0, 0, 0, 0, 468, 469, 470, 471, - 472, 473, 474, 475, 476, 477, 478, 479, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 480, 481, 482, 483, - 484, 485, 486, 487, 488, 489, 490, 491, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 492, 493, 494, 495, 496, 497, 498, 499, 500, 501, - 502, 503, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 504, 505, 506, 507, 508, 509, 510, 511, 512, - 513, 514, 515, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 516, 517, - 518, 519, 520, 521, 522, 523, 524, 525, 0, 526, 527, 0, - 528, 529, 530, 531, 0, 0, 0, 0, 0, 0, 0, 0, - 532, 533, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 534, 535, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 236, 237, 238, 239, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 536, 537, 0, 0, 0, 0, 0, 0, 538, 539, - 540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 550, 551, 552, 553, - 554, 555, 556, 557, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 558, 559, 560, 561, 562, 563, 564, 565, 566, 567, - 568, 569, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 570, 571, 572, 573, 574, 575, 576, 577, 0, 0, 0, 0, - 0, 578, 579, 0, 0, 0, 580, 581, 582, 0, 0, 583, - 584, 0, 0, 0, 0, 0, 0, 585, 586, 0, 0, 587, - 588, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 589, - 590, 591, 592, 593, 594, 595, 596, 597, 598, 0, 599, 600, - 0, 601, 602, 603, 604, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 240, 241, 242, 243, 0, 0, 244, 245, 0, + 0, 0, 246, 0, 247, 0, 248, 0, 0, 0, 249, 0, + 250, 251, 0, 252, 253, 0, 254, 255, 0, 256, 257, 0, + 0, 0, 0, 0, 0, 0, 258, 259, 260, 0, 261, 262, + 0, 0, 0, 0, 0, 263, 264, 265, 0, 266, 267, 0, + 0, 0, 268, 269, 0, 0, 270, 271, 0, 0, 0, 0, + 272, 273, 274, 0, 275, 276, 0, 0, 0, 0, 0, 0, + 277, 278, 279, 0, 280, 281, 0, 0, 0, 0, 0, 282, + 283, 284, 0, 285, 286, 0, 0, 0, 287, 288, 0, 0, + 0, 0, 289, 290, 0, 291, 292, 0, 0, 0, 293, 294, + 295, 296, 0, 297, 298, 0, 0, 0, 299, 300, 0, 0, + 0, 301, 302, 303, 304, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 305, + 306, 0, 0, 307, 308, 309, 310, 311, 0, 0, 0, 312, + 0, 313, 314, 315, 316, 317, 318, 319, 320, 321, 323, 0, + 0, 0, 0, 325, 326, 327, 328, 330, 0, 0, 0, 332, + 0, 333, 334, 335, 336, 337, 338, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 339, + 340, 341, 342, 0, 0, 343, 344, 0, 0, 0, 0, 345, + 0, 346, 0, 0, 347, 348, 0, 349, 350, 0, 0, 0, + 0, 0, 351, 0, 352, 0, 0, 0, 0, 0, 0, 353, + 354, 355, 356, 0, 0, 0, 0, 0, 0, 0, 0, 357, + 358, 359, 360, 0, 0, 0, 361, 0, 0, 0, 362, 0, + 0, 0, 363, 0, 0, 0, 364, 0, 0, 0, 0, 365, + 366, 367, 368, 369, 370, 371, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 372, 373, 374, 375, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 376, 377, 378, 379, 0, 380, + 381, 382, 383, 384, 385, 0, 386, 387, 0, 388, 389, 390, + 391, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 392, 393, 0, 0, 0, 394, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 395, 396, 397, 398, 399, 400, + 0, 401, 0, 402, 0, 403, 0, 404, 405, 0, 406, 407, + 0, 408, 409, 0, 410, 0, 0, 0, 0, 411, 412, 413, + 414, 0, 415, 416, 417, 418, 419, 0, 420, 0, 421, 0, + 422, 0, 423, 0, 424, 425, 0, 426, 427, 0, 428, 429, + 0, 430, 0, 431, 0, 0, 0, 0, 0, 0, 432, 433, + 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 444, 445, + 446, 447, 448, 449, 450, 451, 452, 453, 454, 455, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 456, + 457, 0, 458, 459, 0, 0, 0, 460, 461, 0, 0, 0, + 0, 0, 0, 462, 0, 0, 0, 0, 0, 0, 0, 463, + 0, 0, 464, 465, 0, 466, 467, 0, 0, 0, 0, 0, + 0, 0, 0, 468, 469, 470, 471, 472, 473, 474, 475, 476, + 477, 478, 479, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 480, 481, 482, 483, 484, 485, 486, 487, 488, + 489, 490, 491, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 492, 493, 494, + 495, 496, 497, 498, 499, 500, 501, 502, 503, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 504, 505, + 506, 507, 508, 509, 510, 511, 512, 513, 514, 515, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 516, 517, 518, 519, 520, 521, 522, + 523, 524, 525, 0, 526, 527, 0, 528, 529, 530, 531, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 532, 533, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 534, 535, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 536, + 537, 0, 0, 0, 0, 0, 0, 538, 539, 540, 541, 542, + 543, 544, 545, 546, 547, 548, 549, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 550, 551, 552, 553, 554, 555, 556, + 557, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 558, + 559, 560, 561, 562, 563, 564, 565, 566, 567, 568, 569, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 570, 571, 572, + 573, 574, 575, 576, 577, 0, 0, 0, 0, 0, 578, 579, + 0, 0, 0, 580, 581, 582, 0, 0, 583, 584, 0, 0, + 0, 0, 0, 0, 585, 586, 0, 0, 587, 588, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 589, 590, 591, 592, + 593, 594, 595, 596, 597, 598, 0, 599, 600, 0, 601, 602, + 603, 604, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 605, 606, 607, 608, 609, - 610, 611, 612, 0, 0, 0, 0, 613, 614, 0, 0, 0, + 0, 0, 0, 0, 0, 605, 606, 607, 608, 609, 610, 611, + 612, 0, 0, 0, 0, 613, 614, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 615, 616, 617, 618, 0, 0, 0, 0, 0, 0, + 615, 616, 617, 618, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 619, 620, 621, 622, 0, 0, 0, - 0, 0, 623, 0, 624, 625, 626, 627, 628, 0, 0, 0, + 0, 0, 0, 619, 620, 621, 622, 0, 0, 0, 0, 0, + 623, 0, 624, 625, 626, 627, 628, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 629, 630, 631, 632, 633, 634, 635, 636, 637, - 638, 0, 639, 640, 0, 641, 642, 643, 644, 0, 0, 0, + 0, 629, 630, 631, 632, 633, 634, 635, 636, 637, 638, 0, + 639, 640, 0, 641, 642, 643, 644, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, + 0, 0 }; #endif // GET_INSTRINFO_MC_DESC diff --git a/arch/X86/X86Mapping.c b/arch/X86/X86Mapping.c index 5b7d70c1..60e0cc05 100644 --- a/arch/X86/X86Mapping.c +++ b/arch/X86/X86Mapping.c @@ -38159,6 +38159,12 @@ static insn_map insns[] = { // reduce x86 instructions X86_ADC64rr_REV, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_ADC82_8ri8, X86_INS_ADC, +#ifndef CAPSTONE_DIET + { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -38171,6 +38177,12 @@ static insn_map insns[] = { // reduce x86 instructions X86_ADC8mi, X86_INS_ADC, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_ADC8mi8, X86_INS_ADC, +#ifndef CAPSTONE_DIET + { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -38387,6 +38399,18 @@ static insn_map insns[] = { // reduce x86 instructions X86_ADD64rr_REV, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_ADD82_8mi8, X86_INS_ADD, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 +#endif + }, + { + X86_ADD82_8ri8, X86_INS_ADD, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -38411,12 +38435,6 @@ static insn_map insns[] = { // reduce x86 instructions X86_ADD8ri, X86_INS_ADD, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 -#endif - }, - { - X86_ADD8ri8, X86_INS_ADD, -#ifndef CAPSTONE_DIET - { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -38621,6 +38639,18 @@ static insn_map insns[] = { // reduce x86 instructions X86_AND64rr_REV, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_AND82_8mi8, X86_INS_AND, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 +#endif + }, + { + X86_AND82_8ri8, X86_INS_AND, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -38645,12 +38675,6 @@ static insn_map insns[] = { // reduce x86 instructions X86_AND8ri, X86_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 -#endif - }, - { - X86_AND8ri8, X86_INS_AND, -#ifndef CAPSTONE_DIET - { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -40253,6 +40277,12 @@ static insn_map insns[] = { // reduce x86 instructions X86_CMP64rr_REV, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_CMP82_8ri8, X86_INS_CMP, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -40265,6 +40295,12 @@ static insn_map insns[] = { // reduce x86 instructions X86_CMP8mi, X86_INS_CMP, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_CMP8mi8, X86_INS_CMP, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -43445,6 +43481,18 @@ static insn_map insns[] = { // reduce x86 instructions X86_OR64rr_REV, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_OR82_8mi8, X86_INS_OR, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 +#endif + }, + { + X86_OR82_8ri8, X86_INS_OR, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -43469,12 +43517,6 @@ static insn_map insns[] = { // reduce x86 instructions X86_OR8ri, X86_INS_OR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 -#endif - }, - { - X86_OR8ri8, X86_INS_OR, -#ifndef CAPSTONE_DIET - { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -45269,6 +45311,12 @@ static insn_map insns[] = { // reduce x86 instructions X86_SBB64rr_REV, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_SBB82_8ri8, X86_INS_SBB, +#ifndef CAPSTONE_DIET + { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -45281,6 +45329,12 @@ static insn_map insns[] = { // reduce x86 instructions X86_SBB8mi, X86_INS_SBB, #ifndef CAPSTONE_DIET { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_SBB8mi8, X86_INS_SBB, +#ifndef CAPSTONE_DIET + { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -46343,6 +46397,18 @@ static insn_map insns[] = { // reduce x86 instructions X86_SUB64rr_REV, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_SUB82_8mi8, X86_INS_SUB, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 +#endif + }, + { + X86_SUB82_8ri8, X86_INS_SUB, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -46367,12 +46433,6 @@ static insn_map insns[] = { // reduce x86 instructions X86_SUB8ri, X86_INS_SUB, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 -#endif - }, - { - X86_SUB8ri8, X86_INS_SUB, -#ifndef CAPSTONE_DIET - { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -47225,6 +47285,18 @@ static insn_map insns[] = { // reduce x86 instructions X86_XOR64rr_REV, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 +#endif + }, + { + X86_XOR82_8mi8, X86_INS_XOR, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 +#endif + }, + { + X86_XOR82_8ri8, X86_INS_XOR, +#ifndef CAPSTONE_DIET + { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, { @@ -47249,12 +47321,6 @@ static insn_map insns[] = { // reduce x86 instructions X86_XOR8ri, X86_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0 -#endif - }, - { - X86_XOR8ri8, X86_INS_XOR, -#ifndef CAPSTONE_DIET - { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0 #endif }, {