Updated synctool scripts to extract new functions and match type/formatting changes in LLVM 14.0.5 tablegen files.
- asmwriter.py : As well as new functions, recognition of new SME index printing was added. The printAliasInstr function also required a re-write to match its counter-part and changes in logic in LLVM 14.0.5 - disassemblertables-arch.py : Minor type changes for some functions, as well as adding support for new SME decode functions. - mapping_insn-arch.py : Minor change to correct incorrect instruction aliasing in generated AArch64MappingInsn.inc etc. - registerinfo.py : minor change to reflect change in LLVM 14.0.5 - systemoperand.py : corrected minor type changes made in LLVM 14.0.5 and added extraction of SVCR, BTI, DBnXS lists and encoding functions.
This commit is contained in:
Finn Wilkinson
parent
437a7fc469
commit
3ef5bb6b79
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@ -138,6 +138,21 @@ for line in lines:
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print_line("static void printInstruction(MCInst *MI, SStream *O)\n{")
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else:
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print_line("static void printInstruction(MCInst *MI, SStream *O)\n{")
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elif 'LLVM_NO_PROFILE_INSTRUMENT_FUNCTION' in line:
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continue
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elif 'AArch64InstPrinter::getMnemonic' in line:
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print_line("static uint64_t getMnemonic(MCInst *MI, SStream *O, unsigned int opcode) {")
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elif 'return {AsmStrs+(Bits' in line:
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tmp = line.split(',')
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prntStr = tmp[0].split('{')[1]
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print_line("\tSStream_concat0(O, " + prntStr + ");")
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print_line("\treturn Bits;")
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elif 'MnemonicInfo = getMnemonic(' in line:
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continue
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elif 'O << MnemonicInfo' in line:
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continue
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elif 'uint64_t Bits = MnemonicInfo' in line:
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print_line("\tuint64_t Bits = getMnemonic(MI, O, opcode);")
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elif 'const char *AArch64InstPrinter::' in line:
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continue
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elif 'getRegisterName(' in line:
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@ -164,6 +179,14 @@ for line in lines:
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line2 = line.replace('STI.getFeatureBits()[', 'AArch64_getFeatureBits(')
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line2 = line2.replace(']', ')')
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print_line(line2)
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elif 'lookupBTIByEncoding' in line:
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line = line.replace('AArch64BTIHint::', '')
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line = line.replace('MCOp.getImm()', 'MCOperand_getImm(MCOp)')
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print_line(line)
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elif 'lookupPSBByEncoding' in line:
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line = line.replace('AArch64PSBHint::', '')
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line = line.replace('MCOp.getImm()', 'MCOperand_getImm(MCOp)')
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print_line(line)
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elif ', STI, ' in line:
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line2 = line.replace(', STI, ', ', ')
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@ -222,7 +245,7 @@ for line in lines:
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line2 = line2.replace('printLogicalImm', 'printLogicalImm32')
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elif '64' in param:
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line2 = line2.replace('printLogicalImm', 'printLogicalImm64')
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elif 'printSVERegOp' in line2 or 'printGPRSeqPairsClassOperand' in line2 or 'printTypedVectorList' in line2 or 'printPostIncOperand' in line2 or 'printImmScale' in line2 or 'printRegWithShiftExtend' in line2 or 'printUImm12Offset' in line2 or 'printExactFPImm' in line2 or 'printMemExtend' in line2 or 'printZPRasFPR' in line2:
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elif 'printSVERegOp' in line2 or 'printGPRSeqPairsClassOperand' in line2 or 'printTypedVectorList' in line2 or 'printPostIncOperand' in line2 or 'printImmScale' in line2 or 'printRegWithShiftExtend' in line2 or 'printUImm12Offset' in line2 or 'printExactFPImm' in line2 or 'printMemExtend' in line2 or 'printZPRasFPR' in line2 or 'printMatrixTileVector' in line2 or 'printMatrix<' in line2 or 'printSImm' in line2:
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param = extract_brackets(line2)
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if param == '':
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param = '0'
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@ -234,6 +257,8 @@ for line in lines:
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bracket_content = line2[line2.index('<') + 1 : line2.index('>')]
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line2 = line2.replace('<' + bracket_content + '>', '')
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line2 = line2.replace(' O);', ' O, %s);' %bracket_content)
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elif 'printAlignedLabel' in line2 or 'printAdrpLabel' in line2:
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line2 = line2.replace('Address, ', '')
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print_line(line2)
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elif "static const char AsmStrs[]" in line:
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@ -287,11 +312,20 @@ for line in lines:
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elif '", -1"' in line2:
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print_line(' op_addImm(MI, -1);')
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if '[' in line2:
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if '], [' in line2 or ']!, [' in line2:
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print_line(' set_mem_access(MI, false);')
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print_line(' set_mem_access(MI, true);')
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elif "\"[\"" in line2:
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# Check for SME_Index specific string of only "["
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print_line(' set_sme_index(MI, true);')
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elif '[' in line2:
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if not '[]' in line2:
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print_line(' set_mem_access(MI, true);')
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if ']' in line2:
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elif ']' in line2:
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if not '[]' in line2:
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print_line(' set_mem_access(MI, false);')
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@ -629,8 +663,96 @@ for line in lines:
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elif 'switch (PredicateIndex) {' in line:
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print_line(' int64_t Val;')
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print_line(line)
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elif 'unsigned I = 0;' in line and in_printAliasInstr:
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elif 'uint32_t(' in line and in_printAliasInstr:
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line = line.replace('uint32_t(', '')
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line = line.replace(')', '')
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print_line(line)
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elif '#ifndef NDEBUG' in line and in_printAliasInstr:
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print_line("""
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char *AsmString;
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const size_t OpToSize = sizeof(OpToPatterns) / sizeof(PatternsForOpcode);
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const unsigned opcode = MCInst_getOpcode(MI);
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// Check for alias
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int OpToIndex = 0;
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for(int i = 0; i < OpToSize; i++){
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if(OpToPatterns[i].Opcode == opcode){
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OpToIndex = i;
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break;
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}
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}
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// Chech for match
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if(opcode != OpToPatterns[OpToIndex].Opcode)
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return NULL;
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const PatternsForOpcode opToPat = OpToPatterns[OpToIndex];
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// Try all patterns for this opcode
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uint32_t AsmStrOffset = ~0U;
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int patIdx = opToPat.PatternStart;
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while(patIdx < (opToPat.PatternStart + opToPat.NumPatterns)){
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// Check operand count first
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if(MCInst_getNumOperands(MI) != Patterns[patIdx].NumOperands)
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return NULL;
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// Test all conditions for this pattern
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int condIdx = Patterns[patIdx].AliasCondStart;
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int opIdx = 0;
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bool allPass = true;
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while(condIdx < (Patterns[patIdx].AliasCondStart + Patterns[patIdx].NumConds)){
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MCOperand *opnd = MCInst_getOperand(MI, opIdx);
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opIdx++;
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// Not concerned with any Feature related conditions as STI is disregarded
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switch (Conds[condIdx].Kind)
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{
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case AliasPatternCond_K_Ignore :
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// Operand can be anything.
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break;
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case AliasPatternCond_K_Reg :
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// Operand must be a specific register.
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allPass = allPass && (MCOperand_isReg(opnd) && MCOperand_getReg(opnd) == Conds[condIdx].Value);
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break;
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case AliasPatternCond_K_TiedReg :
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// Operand must match the register of another operand.
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allPass = allPass && (MCOperand_isReg(opnd) && MCOperand_getReg(opnd) ==
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MCOperand_getReg(MCInst_getOperand(MI, Conds[condIdx].Value)));
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break;
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case AliasPatternCond_K_Imm :
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// Operand must be a specific immediate.
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allPass = allPass && (MCOperand_isImm(opnd) && MCOperand_getImm(opnd) == Conds[condIdx].Value);
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break;
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case AliasPatternCond_K_RegClass :
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// Operand must be a register in this class. Value is a register class id.
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allPass = allPass && (MCOperand_isReg(opnd) && GETREGCLASS_CONTAIN(Conds[condIdx].Value, (opIdx-1)));
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break;
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case AliasPatternCond_K_Custom :
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// Operand must match some custom criteria.
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allPass = allPass && AArch64InstPrinterValidateMCOperand(opnd, Conds[condIdx].Value);
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break;
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case AliasPatternCond_K_Feature :
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case AliasPatternCond_K_NegFeature :
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case AliasPatternCond_K_OrFeature :
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case AliasPatternCond_K_OrNegFeature :
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case AliasPatternCond_K_EndOrFeatures :
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default :
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break;
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}
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condIdx++;
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}
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if(allPass){
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AsmStrOffset = Patterns[patIdx].AsmStrOffset;
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break;
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}
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patIdx++;
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}
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// If no alias matched, don't print an alias.
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if (AsmStrOffset == ~0U)
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return NULL;
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AsmString = cs_strdup(&AsmStrings[AsmStrOffset]);
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tmpString = cs_strdup(AsmString);
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while (AsmString[I] != ' ' && AsmString[I] != '\\t' &&
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@ -653,15 +775,20 @@ for line in lines:
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++I;
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OpIdx = AsmString[I++] - 1;
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PrintMethodIdx = AsmString[I++] - 1;
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printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS);
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printCustomAliasOperand(MI, 0, OpIdx, PrintMethodIdx, OS);
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} else
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printOperand(MI, (unsigned)(AsmString[I++]) - 1, OS);
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} else {
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if (AsmString[I] == '[') {
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set_mem_access(MI, true);
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} else if (AsmString[I] == ']') {
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set_mem_access(MI, false);
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}
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SStream_concat1(OS, AsmString[I++]);
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}
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} while (AsmString[I] != '\\0');
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}
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free(AsmString);
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return tmpString;
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}
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""")
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@ -84,7 +84,7 @@ for line in lines:
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elif skip_print and 'static const uint8_t DecoderTable' in line2:
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skip_print = False
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elif 'End llvm namespace' in line2:
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elif 'end namespace llvm' in line2:
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# done
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break
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@ -103,13 +103,13 @@ for line in lines:
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line2 = line2.replace('Bits[', 'AArch64_getFeatureBits(')
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line2 = line2.replace(']', ')')
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elif 'static bool checkDecoderPredicate(unsigned Idx, const FeatureBitset& Bits) {' in line2:
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elif 'static bool checkDecoderPredicate(unsigned Idx, const FeatureBitset &Bits) {' in line2:
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line2 = 'static bool checkDecoderPredicate(unsigned Idx, MCInst *MI)\n{'
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elif 'checkDecoderPredicate(PIdx, ' in line2:
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line2 = line2.replace(', Bits)', ', MI)')
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elif 'template<typename InsnType>' in line2:
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elif 'template <typename InsnType>' in line2:
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continue
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elif 'static DecodeStatus decodeToMCInst' in line2:
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@ -122,6 +122,10 @@ for line in lines:
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line2 = line2.replace('fieldFromInstruction', 'fieldname')
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if 'InsnType FieldValue' in line2:
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line2 = line2.replace('InsnType ', '')
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if 'insertBits(tmp,' in line2:
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line2 = line2.replace('insertBits(', '')
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tmpLn = line2.split(',')
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line2 = tmpLn[0] + ' |=' + tmpLn[1] + ',' + tmpLn[2] + ',' + tmpLn[3] + ' <<' + tmpLn[4] + ';'
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elif 'DecodeComplete = true;' in line2:
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# dead code
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@ -184,8 +188,8 @@ for line in lines:
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line2 = line2.replace('InsnType ', '')
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elif 'InsnType NegativeMask =' in line2:
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line2 = line2.replace('InsnType ', '')
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elif 'uint32_t ExpectedValue' in line2:
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line2 = line2.replace('uint32_t ', '')
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elif 'InsnType ExpectedValue' in line2:
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line2 = line2.replace('InsnType ', '')
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elif 'ptrdiff_t Loc = ' in line2:
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continue
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elif 'LLVM_DEBUG(' in line2:
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@ -223,6 +227,10 @@ for line in lines:
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param = extract_brackets(line2)
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line2 = del_brackets(line2)
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line2 = line2.replace(', Decoder)', ', Decoder, %s)' %param)
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elif 'DecodeMatrixTile<' in line2:
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param = extract_brackets(line2)
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line2 = del_brackets(line2)
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line2 = line2.replace(', Decoder)', ', Decoder, %s)' %param)
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if 'DecodeComplete = false; ' in line2:
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line2 = line2.replace('DecodeComplete = false; ', '')
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elif 'decodeUImmOperand<' in line2 or 'decodeSImmOperand<' in line2 :
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@ -235,6 +243,10 @@ for line in lines:
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elif 'MI = TmpMI;' in line2:
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line2 = ''
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#line2 = line2.replace('TmpMI', '&TmpMI')
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elif 'using TmpType = std::conditional' in line2:
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continue
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elif 'TmpType tmp;' in line2:
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line2 = line2.replace('TmpType', 'InsnType')
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line2 = line2.replace('::', '_')
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print_line(line2)
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@ -92,7 +92,7 @@ def extract_matcher(filename):
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if not first_insn:
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arch, first_insn = _arch, insn_id
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if not insn_id in insn_id_list:
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if not insn_id in insn_id_list and mnem.upper() in insn_id:
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# save this
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insn_id_list[insn_id] = mnem
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@ -175,7 +175,7 @@ lines = f.readlines()
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f.close()
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count = 0
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last_mnem = None
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last_mnem = ''
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# 1st enum is register enum
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for line in lines:
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@ -136,10 +136,10 @@ if arch.upper() == 'AARCH64':
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'enum {':
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if line.strip() == 'enum {' or 'enum :' in line.strip():
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enum_count += 1
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if enum_count == 4:
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print(line)
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print('enum {')
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continue
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if enum_count == 4:
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@ -84,7 +84,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const AT ATsList[] = {':
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if line.strip() == 'constexpr AT ATsList[] = {':
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count += 1
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print_line('static const AT ATsList[] = {')
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continue
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@ -148,7 +148,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const DB DBsList[] = {':
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if line.strip() == 'constexpr DB DBsList[] = {':
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count += 1
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print_line('static const DB DBsList[] = {')
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continue
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@ -211,7 +211,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const DC DCsList[] = {':
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if line.strip() == 'constexpr DC DCsList[] = {':
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count += 1
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print_line('static const DC DCsList[] = {')
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continue
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@ -276,7 +276,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const IC ICsList[] = {':
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if line.strip() == 'constexpr IC ICsList[] = {':
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count += 1
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print_line('static const IC ICsList[] = {')
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continue
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@ -342,7 +342,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const TLBI TLBIsList[] = {':
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if line.strip() == 'constexpr TLBI TLBITable[] = {':
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count += 1
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print_line('static const TLBI TLBIsList[] = {')
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continue
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@ -407,7 +407,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const SVEPRFM SVEPRFMsList[] = {':
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if line.strip() == 'constexpr SVEPRFM SVEPRFMsList[] = {':
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count += 1
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print_line('static const SVEPRFM SVEPRFMsList[] = {')
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continue
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@ -473,7 +473,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const PRFM PRFMsList[] = {':
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if line.strip() == 'constexpr PRFM PRFMsList[] = {':
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count += 1
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print_line('static const PRFM PRFMsList[] = {')
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continue
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@ -539,7 +539,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const PSB PSBsList[] = {':
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if line.strip() == 'constexpr PSB PSBsList[] = {':
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count += 1
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print_line('static const PSB PSBsList[] = {')
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continue
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@ -570,7 +570,7 @@ for line in lines:
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if 'lookupPSBByEncoding' in line and '{' in line:
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count += 1
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print_line('const PSB *AArch64PSBHint_lookupPSBByEncoding(uint16_t Encoding)\n{')
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print_line('const PSB *lookupPSBByEncoding(uint16_t Encoding)\n{')
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print_line(' unsigned int i;')
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continue
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@ -605,7 +605,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const ISB ISBsList[] = {':
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if line.strip() == 'constexpr ISB ISBsList[] = {':
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count += 1
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print_line('static const ISB ISBsList[] = {')
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continue
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@ -671,7 +671,7 @@ for line in lines:
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if len(line.strip()) == 0:
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continue
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if line.strip() == 'const TSB TSBsList[] = {':
|
||||
if line.strip() == 'constexpr TSB TSBsList[] = {':
|
||||
count += 1
|
||||
print_line('static const TSB TSBsList[] = {')
|
||||
continue
|
||||
|
|
@ -735,7 +735,7 @@ for line in lines:
|
|||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if line.strip() == 'const SysReg SysRegsList[] = {':
|
||||
if line.strip() == 'constexpr SysReg SysRegsList[] = {':
|
||||
count += 1
|
||||
print_line('static const SysReg SysRegsList[] = {')
|
||||
continue
|
||||
|
|
@ -752,7 +752,7 @@ for line in lines:
|
|||
#line = line.replace('{}', '{ 0 }')
|
||||
line = line.replace('{}', '')
|
||||
tmp = line.split(',')
|
||||
print_line(" %s, %s, %s, %s }, // %u" %(tmp[0].lower(), tmp[1], tmp[2], tmp[3], c))
|
||||
print_line(" %s, %s, %s, %s }, // %u" %(tmp[0].lower(), tmp[2], tmp[3], tmp[4], c))
|
||||
#print_line(" %s" %line.lower())
|
||||
c += 1
|
||||
|
||||
|
|
@ -800,7 +800,7 @@ for line in lines:
|
|||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if line.strip() == 'const PState PStatesList[] = {':
|
||||
if line.strip() == 'constexpr PState PStatesList[] = {':
|
||||
count += 1
|
||||
print_line('static const PState PStatesList[] = {')
|
||||
continue
|
||||
|
|
@ -865,7 +865,7 @@ for line in lines:
|
|||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if line.strip() == 'const SVEPREDPAT SVEPREDPATsList[] = {':
|
||||
if line.strip() == 'constexpr SVEPREDPAT SVEPREDPATsList[] = {':
|
||||
count += 1
|
||||
print_line('static const SVEPREDPAT SVEPREDPATsList[] = {')
|
||||
continue
|
||||
|
|
@ -921,6 +921,198 @@ print_line("""
|
|||
}
|
||||
""")
|
||||
|
||||
# extract SVCRsList
|
||||
count = 0
|
||||
c = 0
|
||||
for line in lines:
|
||||
line = line.rstrip()
|
||||
|
||||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if line.strip() == 'constexpr SVCR SVCRsList[] = {':
|
||||
count += 1
|
||||
print_line('static const SVCR SVCRsList[] = {')
|
||||
continue
|
||||
|
||||
line = line.strip()
|
||||
if count == 1:
|
||||
if line == '};':
|
||||
# done with first enum
|
||||
print_line('};\n')
|
||||
break
|
||||
else:
|
||||
# skip pseudo instructions
|
||||
line = line.replace('::', '_')
|
||||
#line = line.replace('{}', '{ 0 }')
|
||||
line = line.replace('{}', '')
|
||||
tmp = line.split(',')
|
||||
print_line(" %s, %s }, // %u" %(tmp[0].lower(), tmp[1], c))
|
||||
c += 1
|
||||
|
||||
# lookupSVCRByEncoding
|
||||
count = 0
|
||||
for line in lines:
|
||||
line = line.rstrip()
|
||||
|
||||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if 'lookupSVCRByEncoding' in line and '{' in line:
|
||||
count += 1
|
||||
print_line('const SVCR *lookupSVCRByEncoding(uint8_t Encoding)\n{')
|
||||
print_line(' unsigned int i;')
|
||||
continue
|
||||
|
||||
if count == 1 and 'IndexType Index[] = {' in line:
|
||||
count += 1
|
||||
|
||||
if count == 2:
|
||||
if line.strip() == '};':
|
||||
# done with array, or this function?
|
||||
print_line(line)
|
||||
break
|
||||
else:
|
||||
# enum items
|
||||
print_line(line)
|
||||
|
||||
print_line("""
|
||||
i = binsearch_IndexTypeEncoding(Index, ARR_SIZE(Index), Encoding);
|
||||
if (i == -1)
|
||||
return NULL;
|
||||
else
|
||||
return &SVCRsList[Index[i].index];
|
||||
}
|
||||
""")
|
||||
|
||||
# extract BTIsList
|
||||
count = 0
|
||||
c = 0
|
||||
for line in lines:
|
||||
line = line.rstrip()
|
||||
|
||||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if line.strip() == 'constexpr BTI BTIsList[] = {':
|
||||
count += 1
|
||||
print_line('static const BTI BTIsList[] = {')
|
||||
continue
|
||||
|
||||
line = line.strip()
|
||||
if count == 1:
|
||||
if line == '};':
|
||||
# done with first enum
|
||||
print_line('};\n')
|
||||
break
|
||||
else:
|
||||
# skip pseudo instructions
|
||||
line = line.replace('::', '_')
|
||||
#line = line.replace('{}', '{ 0 }')
|
||||
line = line.replace('{}', '')
|
||||
tmp = line.split(',')
|
||||
print_line(" %s, %s, // %u" %(tmp[0].lower(), tmp[1], c))
|
||||
c += 1
|
||||
|
||||
# lookupBTIByEncoding
|
||||
count = 0
|
||||
for line in lines:
|
||||
line = line.rstrip()
|
||||
|
||||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if 'lookupBTIByEncoding' in line and '{' in line:
|
||||
count += 1
|
||||
print_line('const BTI *lookupBTIByEncoding(uint8_t Encoding)\n{')
|
||||
print_line(' unsigned int i;')
|
||||
continue
|
||||
|
||||
if count == 1 and 'IndexType Index[] = {' in line:
|
||||
count += 1
|
||||
|
||||
if count == 2:
|
||||
if line.strip() == '};':
|
||||
# done with array, or this function?
|
||||
print_line(line)
|
||||
break
|
||||
else:
|
||||
# enum items
|
||||
print_line(line)
|
||||
|
||||
print_line("""
|
||||
i = binsearch_IndexTypeEncoding(Index, ARR_SIZE(Index), Encoding);
|
||||
if (i == -1)
|
||||
return NULL;
|
||||
else
|
||||
return &BTIsList[Index[i].index];
|
||||
}
|
||||
""")
|
||||
|
||||
|
||||
# extract DBnXSsList
|
||||
count = 0
|
||||
c = 0
|
||||
for line in lines:
|
||||
line = line.rstrip()
|
||||
|
||||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if line.strip() == 'constexpr DBnXS DBnXSsList[] = {':
|
||||
count += 1
|
||||
print_line('static const DBnXS DBnXSsList[] = {')
|
||||
continue
|
||||
|
||||
line = line.strip()
|
||||
if count == 1:
|
||||
if line == '};':
|
||||
# done with first enum
|
||||
print_line('};\n')
|
||||
break
|
||||
else:
|
||||
# skip pseudo instructions
|
||||
line = line.replace('::', '_')
|
||||
#line = line.replace('{}', '{ 0 }')
|
||||
line = line.replace('{}', '')
|
||||
tmp = line.split(',')
|
||||
print_line(" %s, %s, %s}, // %u" %(tmp[0].lower(), tmp[1], tmp[2], c))
|
||||
c += 1
|
||||
|
||||
# lookupDBnXSByEncoding
|
||||
count = 0
|
||||
for line in lines:
|
||||
line = line.rstrip()
|
||||
|
||||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if 'lookupDBnXSByEncoding' in line and '{' in line:
|
||||
count += 1
|
||||
print_line('const DBnXS *lookupDBnXSByEncoding(uint8_t Encoding)\n{')
|
||||
print_line(' unsigned int i;')
|
||||
continue
|
||||
|
||||
if count == 1 and 'IndexType Index[] = {' in line:
|
||||
count += 1
|
||||
|
||||
if count == 2:
|
||||
if line.strip() == '};':
|
||||
# done with array, or this function?
|
||||
print_line(line)
|
||||
break
|
||||
else:
|
||||
# enum items
|
||||
print_line(line)
|
||||
|
||||
print_line("""
|
||||
i = binsearch_IndexTypeEncoding(Index, ARR_SIZE(Index), Encoding);
|
||||
if (i == -1)
|
||||
return NULL;
|
||||
else
|
||||
return &DBnXSsList[Index[i].index];
|
||||
}
|
||||
""")
|
||||
|
||||
# extract ExactFPImmsList
|
||||
count = 0
|
||||
|
|
@ -931,7 +1123,7 @@ for line in lines:
|
|||
if len(line.strip()) == 0:
|
||||
continue
|
||||
|
||||
if line.strip() == 'const ExactFPImm ExactFPImmsList[] = {':
|
||||
if line.strip() == 'constexpr ExactFPImm ExactFPImmsList[] = {':
|
||||
count += 1
|
||||
print_line('static const ExactFPImm ExactFPImmsList[] = {')
|
||||
continue
|
||||
|
|
|
|||
Loading…
Reference in New Issue