From 41fdced346c6da4daee587cd51c48b38e4fccc4c Mon Sep 17 00:00:00 2001
From: Nguyen Anh Quynh <aquynh@gmail.com>
Date: Thu, 16 May 2019 10:42:43 +0800
Subject: [PATCH] ppc: fix TBEGIN decoder. issue #1478

---
 arch/PowerPC/PPCGenAsmWriter.inc |  6 +++---
 arch/PowerPC/PPCGenInstrInfo.inc | 30 +++++++++++++++---------------
 2 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/PowerPC/PPCGenAsmWriter.inc b/arch/PowerPC/PPCGenAsmWriter.inc
index 4f480de5..a9547982 100644
--- a/arch/PowerPC/PPCGenAsmWriter.inc
+++ b/arch/PowerPC/PPCGenAsmWriter.inc
@@ -3184,7 +3184,7 @@ static void printInstruction(MCInst *MI, SStream *O)
     608340U,	// TAILBA8
     15470U,	// TAILBCTR
     15470U,	// TAILBCTR8
-    820308U,	// TBEGIN
+    263252U,	// TBEGIN
     546018U,	// TCHECK
     15049U,	// TCHECK_RET
     538003403U,	// TCRETURNai
@@ -6034,7 +6034,7 @@ static void printInstruction(MCInst *MI, SStream *O)
     return;
     break;
   case 16:
-    // RFEBB
+    // RFEBB, TBEGIN
     printU1ImmOperand(MI, 0, O);
     return;
     break;
@@ -6046,7 +6046,7 @@ static void printInstruction(MCInst *MI, SStream *O)
     SStream_concat0(O, ", ");
     break;
   case 18:
-    // TBEGIN, TEND, TSR, XSRQPI, XSRQPIX, XSRQPXP
+    // TEND, TSR, XSRQPI, XSRQPIX, XSRQPXP
     printU1ImmOperand(MI, 1, O);
     break;
   case 19:
diff --git a/arch/PowerPC/PPCGenInstrInfo.inc b/arch/PowerPC/PPCGenInstrInfo.inc
index b2360d7d..90e0157b 100644
--- a/arch/PowerPC/PPCGenInstrInfo.inc
+++ b/arch/PowerPC/PPCGenInstrInfo.inc
@@ -2425,12 +2425,12 @@ static MCOperandInfo OperandInfo245[] = { { 1, 0|(1<<MCOI_LookupPtrRegClass), MC
 static MCOperandInfo OperandInfo246[] = { { PPC_CRRC0RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { PPC_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
 static MCOperandInfo OperandInfo247[] = { { PPC_CRRC0RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { PPC_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { PPC_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
 static MCOperandInfo OperandInfo248[] = { { PPC_CRRC0RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { PPC_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
-static MCOperandInfo OperandInfo249[] = { { PPC_CRRC0RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
-static MCOperandInfo OperandInfo250[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
-static MCOperandInfo OperandInfo251[] = { { PPC_CTRRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
-static MCOperandInfo OperandInfo252[] = { { PPC_CTRRC8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
-static MCOperandInfo OperandInfo253[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { PPC_G8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { PPC_G8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
-static MCOperandInfo OperandInfo254[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { PPC_G8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
+static MCOperandInfo OperandInfo249[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
+static MCOperandInfo OperandInfo250[] = { { PPC_CTRRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
+static MCOperandInfo OperandInfo251[] = { { PPC_CTRRC8RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
+static MCOperandInfo OperandInfo252[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { PPC_G8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { PPC_G8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
+static MCOperandInfo OperandInfo253[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { PPC_G8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
+static MCOperandInfo OperandInfo254[] = { { PPC_CRRC0RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
 static MCOperandInfo OperandInfo255[] = { { PPC_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { PPC_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
 static MCOperandInfo OperandInfo256[] = { { PPC_CRRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { PPC_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
 static MCOperandInfo OperandInfo257[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { PPC_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
@@ -4050,18 +4050,18 @@ static const MCInstrDesc PPCInsts[] = {
   { 1, OperandInfo2 },
   { 0, nullptr },
   { 0, nullptr },
+  { 1, OperandInfo2 },
+  { 1, OperandInfo147 },
+  { 1, OperandInfo147 },
+  { 2, OperandInfo249 },
+  { 2, OperandInfo249 },
+  { 2, OperandInfo249 },
   { 2, OperandInfo249 },
-  { 1, OperandInfo147 },
-  { 1, OperandInfo147 },
-  { 2, OperandInfo250 },
-  { 2, OperandInfo250 },
-  { 2, OperandInfo250 },
   { 2, OperandInfo250 },
   { 2, OperandInfo251 },
-  { 2, OperandInfo252 },
+  { 3, OperandInfo252 },
   { 3, OperandInfo253 },
-  { 3, OperandInfo254 },
-  { 2, OperandInfo249 },
+  { 2, OperandInfo254 },
   { 0, nullptr },
   { 2, OperandInfo36 },
   { 1, OperandInfo149 },
@@ -4079,7 +4079,7 @@ static const MCInstrDesc PPCInsts[] = {
   { 0, nullptr },
   { 1, OperandInfo147 },
   { 2, OperandInfo256 },
-  { 2, OperandInfo249 },
+  { 2, OperandInfo254 },
   { 3, OperandInfo79 },
   { 3, OperandInfo257 },
   { 2, OperandInfo36 },