mirror of
https://gitlab.com/qemu-project/capstone.git
synced 2025-09-17 02:01:15 +08:00
MCInst_Init() is arch-independent
This commit is contained in:
14
MCInst.c
14
MCInst.c
@ -10,16 +10,12 @@
|
|||||||
|
|
||||||
#define MCINST_CACHE (ARR_SIZE(mcInst->Operands) - 1)
|
#define MCINST_CACHE (ARR_SIZE(mcInst->Operands) - 1)
|
||||||
|
|
||||||
void MCInst_Init(cs_struct *handle, MCInst *inst)
|
void MCInst_Init(MCInst *inst)
|
||||||
{
|
{
|
||||||
switch(handle->arch) {
|
inst->OpcodePub = 0;
|
||||||
default:
|
inst->size = 0;
|
||||||
memset(inst, 0, sizeof(*inst));
|
|
||||||
break;
|
return;
|
||||||
case CS_ARCH_X86:
|
|
||||||
inst->size = 0;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void MCInst_clear(MCInst *inst)
|
void MCInst_clear(MCInst *inst)
|
||||||
|
4
MCInst.h
4
MCInst.h
@ -92,9 +92,9 @@ MCOperand *MCOperand_CreateImm1(MCInst *inst, int64_t Val);
|
|||||||
struct MCInst {
|
struct MCInst {
|
||||||
unsigned Opcode;
|
unsigned Opcode;
|
||||||
MCOperand Operands[34];
|
MCOperand Operands[34];
|
||||||
|
unsigned OpcodePub;
|
||||||
unsigned size; // number of operands
|
unsigned size; // number of operands
|
||||||
cs_insn *flat_insn; // insn to be exposed to public
|
cs_insn *flat_insn; // insn to be exposed to public
|
||||||
unsigned OpcodePub;
|
|
||||||
uint64_t address; // address of this insn
|
uint64_t address; // address of this insn
|
||||||
cs_struct *csh; // save the main csh
|
cs_struct *csh; // save the main csh
|
||||||
uint8_t x86_imm_size; // save immediate size to print immediate properly
|
uint8_t x86_imm_size; // save immediate size to print immediate properly
|
||||||
@ -105,7 +105,7 @@ struct MCInst {
|
|||||||
uint8_t x86_prefix[4];
|
uint8_t x86_prefix[4];
|
||||||
};
|
};
|
||||||
|
|
||||||
void MCInst_Init(cs_struct *handle, MCInst *inst);
|
void MCInst_Init(MCInst *inst);
|
||||||
|
|
||||||
void MCInst_clear(MCInst *inst);
|
void MCInst_clear(MCInst *inst);
|
||||||
|
|
||||||
|
@ -538,7 +538,7 @@ void ARM_printInst(MCInst *MI, SStream *O, void *Info)
|
|||||||
if (MCRegisterClass_contains(MRC, Reg)) {
|
if (MCRegisterClass_contains(MRC, Reg)) {
|
||||||
MCInst NewMI;
|
MCInst NewMI;
|
||||||
|
|
||||||
MCInst_Init(MI->csh, &NewMI);
|
MCInst_Init(&NewMI);
|
||||||
MCInst_setOpcode(&NewMI, Opcode);
|
MCInst_setOpcode(&NewMI, Opcode);
|
||||||
|
|
||||||
if (isStore)
|
if (isStore)
|
||||||
|
2
cs.c
2
cs.c
@ -449,7 +449,7 @@ size_t cs_disasm_ex(csh ud, const uint8_t *buffer, size_t size, uint64_t offset,
|
|||||||
insn_cache = total;
|
insn_cache = total;
|
||||||
|
|
||||||
while (size > 0) {
|
while (size > 0) {
|
||||||
MCInst_Init(handle, &mci);
|
MCInst_Init(&mci);
|
||||||
mci.csh = handle;
|
mci.csh = handle;
|
||||||
|
|
||||||
// relative branches need to know the address & size of current insn
|
// relative branches need to know the address & size of current insn
|
||||||
|
Reference in New Issue
Block a user