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add CS_GRP_PRIVILEGE group, and also add X86_GRP_PRIVILEGE group for bunch of X86 privileged instructions

This commit is contained in:
Nguyen Anh Quynh 2015-03-09 00:04:45 +08:00
parent bb5dccedfa
commit 4dd0dcb9d4
10 changed files with 158 additions and 148 deletions
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136
arch/X86/X86MappingInsn.inc
View File

@ -1,10 +1,10 @@
// This is auto-gen data for Capstone engine (www.capstone-engine.org)
// This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org)
// By Nguyen Anh Quynh <aquynh@gmail.com>
{
X86_AAA, X86_INS_AAA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -1846,7 +1846,7 @@
{
X86_CLAC, X86_INS_CLAC,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
{ 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -4276,7 +4276,7 @@
{
X86_HLT, X86_INS_HLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -4690,7 +4690,7 @@
{
X86_INVD, X86_INS_INVD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -4708,7 +4708,7 @@
{
X86_INVLPG, X86_INS_INVLPG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -4726,13 +4726,13 @@
{
X86_INVPCID32, X86_INS_INVPCID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_INVPCID64, X86_INS_INVPCID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -4750,19 +4750,19 @@
{
X86_IRET16, X86_INS_IRET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0
#endif
},
{
X86_IRET32, X86_INS_IRETD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0
#endif
},
{
X86_IRET64, X86_INS_IRETQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -6352,19 +6352,19 @@
{
X86_LGDT16m, X86_INS_LGDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_LGDT32m, X86_INS_LGDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_LGDT64m, X86_INS_LGDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -6388,43 +6388,43 @@
{
X86_LIDT16m, X86_INS_LIDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_LIDT32m, X86_INS_LIDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_LIDT64m, X86_INS_LIDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_LLDT16m, X86_INS_LLDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_LLDT16r, X86_INS_LLDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_LMSW16m, X86_INS_LMSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_LMSW16r, X86_INS_LMSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -6940,13 +6940,13 @@
{
X86_LTRm, X86_INS_LTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_LTRr, X86_INS_LTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -8500,13 +8500,13 @@
{
X86_MOV16sm, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_MOV16sr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -8530,13 +8530,13 @@
{
X86_MOV32cr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_MOV32dr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -8578,13 +8578,13 @@
{
X86_MOV32rc, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_MOV32rd, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -8626,13 +8626,13 @@
{
X86_MOV32sm, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_MOV32sr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -8650,13 +8650,13 @@
{
X86_MOV64cr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_MOV64dr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -8692,13 +8692,13 @@
{
X86_MOV64rc, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_MOV64rd, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -8740,13 +8740,13 @@
{
X86_MOV64sm, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_MOV64sr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -11800,25 +11800,25 @@
{
X86_POPDS16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPDS32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPES16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPES32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -11842,49 +11842,49 @@
{
X86_POPFS16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_POPFS32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPFS64, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_POPGS16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_POPGS32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPGS64, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_POPSS16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPSS32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -12994,7 +12994,7 @@
{
X86_RDPMC, X86_INS_RDPMC,
#ifndef CAPSTONE_DIET
{ X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
{ X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -13036,13 +13036,13 @@
{
X86_RDTSC, X86_INS_RDTSC,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
{ 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_RDTSCP, X86_INS_RDTSCP,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { 0 }, 0, 0
{ 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -13456,7 +13456,7 @@
{
X86_RSM, X86_INS_RSM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -15040,7 +15040,7 @@
{
X86_STAC, X86_INS_STAC,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
{ 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -15100,25 +15100,25 @@
{
X86_STR16r, X86_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_STR32r, X86_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_STR64r, X86_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_STRm, X86_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -15586,7 +15586,7 @@
{
X86_SWAPGS, X86_INS_SWAPGS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -15604,25 +15604,25 @@
{
X86_SYSEXIT, X86_INS_SYSEXIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0
#endif
},
{
X86_SYSEXIT64, X86_INS_SYSEXIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_SYSRET, X86_INS_SYSRET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0
#endif
},
{
X86_SYSRET64, X86_INS_SYSRET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -50308,7 +50308,7 @@
{
X86_WBINVD, X86_INS_WBINVD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -50338,7 +50338,7 @@
{
X86_WRMSR, X86_INS_WRMSR,
#ifndef CAPSTONE_DIET
{ X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { 0 }, 0, 0
{ X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -50800,13 +50800,13 @@
{
X86_XRSTORS, X86_INS_XRSTORS,
#ifndef CAPSTONE_DIET
{ X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
{ X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_XRSTORS64, X86_INS_XRSTORS64,
#ifndef CAPSTONE_DIET
{ X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -50860,7 +50860,7 @@
{
X86_XSETBV, X86_INS_XSETBV,
#ifndef CAPSTONE_DIET
{ X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { 0 }, 0, 0
{ X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{

160
arch/X86/X86MappingInsn_reduce.inc
View File

@ -1,10 +1,10 @@
// This is auto-gen data for Capstone engine (www.capstone-engine.org)
// This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org)
// By Nguyen Anh Quynh <aquynh@gmail.com>
{
X86_AAA, X86_INS_AAA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -1528,7 +1528,7 @@
{
X86_CLAC, X86_INS_CLAC,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
{ 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -2686,7 +2686,7 @@
{
X86_HLT, X86_INS_HLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -3034,7 +3034,7 @@
{
X86_INVD, X86_INS_INVD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -3052,7 +3052,7 @@
{
X86_INVLPG, X86_INS_INVLPG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -3070,13 +3070,13 @@
{
X86_INVPCID32, X86_INS_INVPCID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_INVPCID64, X86_INS_INVPCID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -3094,19 +3094,19 @@
{
X86_IRET16, X86_INS_IRET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0
#endif
},
{
X86_IRET32, X86_INS_IRETD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0
#endif
},
{
X86_IRET64, X86_INS_IRETQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -3628,19 +3628,19 @@
{
X86_LGDT16m, X86_INS_LGDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_LGDT32m, X86_INS_LGDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_LGDT64m, X86_INS_LGDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -3664,43 +3664,43 @@
{
X86_LIDT16m, X86_INS_LIDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_LIDT32m, X86_INS_LIDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_LIDT64m, X86_INS_LIDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_LLDT16m, X86_INS_LLDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_LLDT16r, X86_INS_LLDT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_LMSW16m, X86_INS_LMSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_LMSW16r, X86_INS_LMSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -4126,37 +4126,37 @@
{
X86_LRETIL, X86_INS_RETF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
#endif
},
{
X86_LRETIQ, X86_INS_RETFQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_LRETIW, X86_INS_RETF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
#endif
},
{
X86_LRETL, X86_INS_RETF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
#endif
},
{
X86_LRETQ, X86_INS_RETFQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_LRETW, X86_INS_RETF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
#endif
},
{
@ -4216,13 +4216,13 @@
{
X86_LTRm, X86_INS_LTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_LTRr, X86_INS_LTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -4384,13 +4384,13 @@
{
X86_MOV16sm, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_MOV16sr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -4414,13 +4414,13 @@
{
X86_MOV32cr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_MOV32dr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -4462,13 +4462,13 @@
{
X86_MOV32rc, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_MOV32rd, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -4510,13 +4510,13 @@
{
X86_MOV32sm, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_MOV32sr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -4534,13 +4534,13 @@
{
X86_MOV64cr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_MOV64dr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -4576,13 +4576,13 @@
{
X86_MOV64rc, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_MOV64rd, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -4624,13 +4624,13 @@
{
X86_MOV64sm, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_MOV64sr, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -5716,25 +5716,25 @@
{
X86_POPDS16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPDS32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPES16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPES32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -5758,49 +5758,49 @@
{
X86_POPFS16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_POPFS32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPFS64, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_POPGS16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_POPGS32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPGS64, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_POPSS16, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_POPSS32, X86_INS_POP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
@ -6334,7 +6334,7 @@
{
X86_RDPMC, X86_INS_RDPMC,
#ifndef CAPSTONE_DIET
{ X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
{ X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -6376,49 +6376,49 @@
{
X86_RDTSC, X86_INS_RDTSC,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
{ 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_RDTSCP, X86_INS_RDTSCP,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { 0 }, 0, 0
{ 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_RETIL, X86_INS_RET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_RETIQ, X86_INS_RET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_RETIW, X86_INS_RET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
#endif
},
{
X86_RETL, X86_INS_RET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},
{
X86_RETQ, X86_INS_RET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_RETW, X86_INS_RET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
#endif
},
{
@ -6736,7 +6736,7 @@
{
X86_RSM, X86_INS_RSM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -8074,7 +8074,7 @@
{
X86_STAC, X86_INS_STAC,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
{ 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -8128,25 +8128,25 @@
{
X86_STR16r, X86_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_STR32r, X86_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_STR64r, X86_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_STRm, X86_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -8368,7 +8368,7 @@
{
X86_SWAPGS, X86_INS_SWAPGS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -8386,25 +8386,25 @@
{
X86_SYSEXIT, X86_INS_SYSEXIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0
#endif
},
{
X86_SYSEXIT64, X86_INS_SYSEXIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
X86_SYSRET, X86_INS_SYSRET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_IRET, 0 }, 0, 0
#endif
},
{
X86_SYSRET64, X86_INS_SYSRET,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -8842,7 +8842,7 @@
{
X86_WBINVD, X86_INS_WBINVD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
{ 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -8872,7 +8872,7 @@
{
X86_WRMSR, X86_INS_WRMSR,
#ifndef CAPSTONE_DIET
{ X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { 0 }, 0, 0
{ X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
@ -9268,13 +9268,13 @@
{
X86_XRSTORS, X86_INS_XRSTORS,
#ifndef CAPSTONE_DIET
{ X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
{ X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{
X86_XRSTORS64, X86_INS_XRSTORS64,
#ifndef CAPSTONE_DIET
{ X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, X86_GRP_MODE64, 0 }, 0, 0
#endif
},
{
@ -9328,7 +9328,7 @@
{
X86_XSETBV, X86_INS_XSETBV,
#ifndef CAPSTONE_DIET
{ X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { 0 }, 0, 0
{ X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_PRIVILEGE, 0 }, 0, 0
#endif
},
{

1
bindings/java/capstone/Capstone.java
View File

@ -347,6 +347,7 @@ public class Capstone {
public static final int CS_GRP_RET = 3; // all return instructions
public static final int CS_GRP_INT = 4; // all interrupt instructions (int+syscall)
public static final int CS_GRP_IRET = 5; // all interrupt return instructions
public static final int CS_GRP_PRIVILEGE = 6; // all privileged instructions
// Query id for cs_support()
public static final int CS_SUPPORT_DIET = CS_ARCH_ALL+1; // diet mode

1
bindings/java/capstone/X86_const.java
View File

@ -1699,6 +1699,7 @@ public class X86_const {
public static final int X86_GRP_RET = 3;
public static final int X86_GRP_INT = 4;
public static final int X86_GRP_IRET = 5;
public static final int X86_GRP_PRIVILEGE = 6;
// Architecture-specific groups
public static final int X86_GRP_VM = 128;

1
bindings/ocaml/capstone.ml
View File

@ -73,6 +73,7 @@ let _CS_GRP_CALL = 2;; (* all call instructions *)
let _CS_GRP_RET = 3;; (* all return instructions *)
let _CS_GRP_INT = 4;; (* all interrupt instructions (int+syscall) *)
let _CS_GRP_IRET = 5;; (* all interrupt return instructions *)
let _CS_GRP_PRIVILEGE = 6;; (* all privileged instructions *)
type cs_arch =
| CS_INFO_ARM of cs_arm

1
bindings/ocaml/x86_const.ml
View File

@ -1696,6 +1696,7 @@ let _X86_GRP_CALL = 2;;
let _X86_GRP_RET = 3;;
let _X86_GRP_INT = 4;;
let _X86_GRP_IRET = 5;;
let _X86_GRP_PRIVILEGE = 6;;
(* Architecture-specific groups *)
let _X86_GRP_VM = 128;;

2
bindings/python/capstone/__init__.py
View File

@ -87,6 +87,7 @@ __all__ = [
'CS_GRP_RET',
'CS_GRP_INT',
'CS_GRP_IRET',
'CS_GRP_PRIVILEGE',
'CsError',
]
@ -152,6 +153,7 @@ CS_GRP_CALL = 2 # all call instructions
CS_GRP_RET = 3 # all return instructions
CS_GRP_INT = 4 # all interrupt instructions (int+syscall)
CS_GRP_IRET = 5 # all interrupt return instructions
CS_GRP_PRIVILEGE = 6 # all privileged instructions
# Capstone syntax value
CS_OPT_SYNTAX_DEFAULT = 0 # Default assembly syntax of all platforms (CS_OPT_SYNTAX)

1
bindings/python/capstone/x86_const.py
View File

@ -1696,6 +1696,7 @@ X86_GRP_CALL = 2
X86_GRP_RET = 3
X86_GRP_INT = 4
X86_GRP_IRET = 5
X86_GRP_PRIVILEGE = 6
# Architecture-specific groups
X86_GRP_VM = 128

1
include/capstone/capstone.h
View File

@ -149,6 +149,7 @@ typedef enum cs_group_type {
CS_GRP_RET, // all return instructions
CS_GRP_INT, // all interrupt instructions (int+syscall)
CS_GRP_IRET, // all interrupt return instructions
CS_GRP_PRIVILEGE, // all privileged instructions
} cs_group_type;
/*

2
include/capstone/x86.h
View File

@ -1628,6 +1628,8 @@ typedef enum x86_insn_group {
X86_GRP_INT, // = CS_GRP_INT
// all interrupt return instructions
X86_GRP_IRET, // = CS_GRP_IRET
// all privileged instructions
X86_GRP_PRIVILEGE, // = CS_GRP_PRIVILEGE
//> Architecture-specific groups
X86_GRP_VM = 128, // all virtualization instructions (VT-x + AMD-V)