diff --git a/arch/AArch64/AArch64InstPrinter.c b/arch/AArch64/AArch64InstPrinter.c
index 552bc1a4..08cf56c5 100644
--- a/arch/AArch64/AArch64InstPrinter.c
+++ b/arch/AArch64/AArch64InstPrinter.c
@@ -1381,10 +1381,14 @@ static void printPrefetchOp(MCInst *MI, unsigned OpNum, SStream *O, bool IsSVEPr
 		const SVEPRFM *PRFM = lookupSVEPRFMByEncoding(prfop);
 		if (PRFM)
 			SStream_concat0(O, PRFM->Name);
+
+		return;
 	} else {
 		const PRFM *PRFM = lookupPRFMByEncoding(prfop);
 		if (PRFM)
 			SStream_concat0(O, PRFM->Name);
+
+		return;
 	}
 
 	// FIXME: set OpcodePub?
diff --git a/suite/MC/AArch64/basic-a64-instructions.s.cs b/suite/MC/AArch64/basic-a64-instructions.s.cs
index 772bb2d7..17825858 100644
--- a/suite/MC/AArch64/basic-a64-instructions.s.cs
+++ b/suite/MC/AArch64/basic-a64-instructions.s.cs
@@ -441,7 +441,7 @@
 // 0x49,0x7d,0x00,0x33 = bfi w9, w10, #0, #32
 0x8b,0x01,0x01,0x33 = bfi w11, w12, #31, #1
 0xcd,0x09,0x03,0x33 = bfi w13, w14, #29, #3
-0xff,0x2b,0x76,0xb3 = bfi xzr, xzr, #10, #11
+0xff,0x2b,0x76,0xb3 = bfc xzr, #0xa, #0xb
 // 0x49,0x01,0x00,0x33 = bfxil w9, w10, #0, #1
 0x62,0xfc,0x7f,0xb3 = bfxil x2, x3, #63, #1
 // 0x93,0xfe,0x40,0xb3 = bfxil x19, x20, #0, #64
@@ -1294,7 +1294,7 @@
 0xd5,0xe6,0x01,0xf2 = ands x21, x22, #0x9999999999999999
 // 0x7f,0xf0,0x01,0xf2 = ands xzr, x3, #0xaaaaaaaaaaaaaaaa
 // 0xff,0xf3,0x00,0xf2 = ands xzr, xzr, #0x5555555555555555
-0xe3,0x8f,0x00,0x32 = orr w3, wzr, #0xf000f
+0xe3,0x8f,0x00,0x32 = mov w3, #0xf000f
 0xea,0xf3,0x01,0xb2 = orr x10, xzr, #0xaaaaaaaaaaaaaaaa
 0xec,0x02,0x15,0x0a = and w12, w23, w21
 0xf0,0x05,0x01,0x0a = and w16, w15, w1, lsl #1
@@ -1324,10 +1324,10 @@
 0xe3,0x03,0x1f,0xaa = mov x3, xzr
 0xff,0x03,0x02,0x2a = mov wzr, w2
 0xe3,0x03,0x05,0x2a = mov w3, w5
-0xe1,0xff,0x9f,0x52 = movz w1, #65535
+0xe1,0xff,0x9f,0x52 = mov w1, #0xffff
 0x02,0x00,0xa0,0x52 = movz w2, #0, lsl #16
-0x42,0x9a,0x80,0x12 = movn w2, #1234
-0x42,0x9a,0xc0,0xd2 = movz x2, #1234, lsl #32
+0x42,0x9a,0x80,0x12 = mov w2, #-0x4d3
+// 0x42,0x9a,0xc0,0xd2 = movz x2, #1234, lsl #32
 0x3f,0x1c,0xe2,0xf2 = movk xzr, #4321, lsl #48
 0x1e,0x00,0x00,0xb0 = adrp x30, #4096
 0x14,0x00,0x00,0x10 = adr x20, #0
diff --git a/suite/MC/AArch64/gicv3-regs.s.cs b/suite/MC/AArch64/gicv3-regs.s.cs
index de5cca31..cc2f3a43 100644
--- a/suite/MC/AArch64/gicv3-regs.s.cs
+++ b/suite/MC/AArch64/gicv3-regs.s.cs
@@ -6,7 +6,7 @@
 0x7d,0xcb,0x38,0xd5 = mrs x29, icc_rpr_el1
 0x24,0xcb,0x3c,0xd5 = mrs x4, ich_vtr_el2
 0x78,0xcb,0x3c,0xd5 = mrs x24, ich_eisr_el2
-0xa9,0xcb,0x3c,0xd5 = mrs x9, ich_elsr_el2
+0xa9,0xcb,0x3c,0xd5 = mrs x9, ich_elrsr_el2
 0x78,0xcc,0x38,0xd5 = mrs x24, icc_bpr1_el1
 0x6e,0xc8,0x38,0xd5 = mrs x14, icc_bpr0_el1
 0x13,0x46,0x38,0xd5 = mrs x19, icc_pmr_el1
diff --git a/suite/MC/AArch64/neon-simd-copy.s.cs b/suite/MC/AArch64/neon-simd-copy.s.cs
index 60fcfabe..031f382c 100644
--- a/suite/MC/AArch64/neon-simd-copy.s.cs
+++ b/suite/MC/AArch64/neon-simd-copy.s.cs
@@ -1,12 +1,12 @@
 # CS_ARCH_ARM64, 0, None
-0x22,0x1c,0x05,0x4e = ins v2.b[2], w1
-0xc7,0x1d,0x1e,0x4e = ins v7.h[7], w14
-0xd4,0x1f,0x04,0x4e = ins v20.s[0], w30
-0xe1,0x1c,0x18,0x4e = ins v1.d[1], x7
-0x22,0x1c,0x05,0x4e = ins v2.b[2], w1
-0xc7,0x1d,0x1e,0x4e = ins v7.h[7], w14
-0xd4,0x1f,0x04,0x4e = ins v20.s[0], w30
-0xe1,0x1c,0x18,0x4e = ins v1.d[1], x7
+0x22,0x1c,0x05,0x4e = mov v2.b[2], w1
+0xc7,0x1d,0x1e,0x4e = mov v7.h[7], w14
+0xd4,0x1f,0x04,0x4e = mov v20.s[0], w30
+0xe1,0x1c,0x18,0x4e = mov v1.d[1], x7
+0x22,0x1c,0x05,0x4e = mov v2.b[2], w1
+0xc7,0x1d,0x1e,0x4e = mov v7.h[7], w14
+0xd4,0x1f,0x04,0x4e = mov v20.s[0], w30
+0xe1,0x1c,0x18,0x4e = mov v1.d[1], x7
 0x01,0x2c,0x1f,0x0e = smov w1, v0.b[15]
 0xce,0x2c,0x12,0x0e = smov w14, v6.h[4]
 0x01,0x2c,0x1f,0x4e = smov x1, v0.b[15]
@@ -18,14 +18,14 @@
 0x47,0x3e,0x18,0x4e = mov x7, v18.d[1]
 0x34,0x3d,0x14,0x0e = mov w20, v9.s[2]
 0x47,0x3e,0x18,0x4e = mov x7, v18.d[1]
-0x61,0x34,0x1d,0x6e = ins v1.b[14], v3.b[6]
-0xe6,0x54,0x1e,0x6e = ins v6.h[7], v7.h[5]
-0xcf,0x46,0x1c,0x6e = ins v15.s[3], v22.s[2]
-0x80,0x44,0x08,0x6e = ins v0.d[0], v4.d[1]
-0x61,0x34,0x1d,0x6e = ins v1.b[14], v3.b[6]
-0xe6,0x54,0x1e,0x6e = ins v6.h[7], v7.h[5]
-0xcf,0x46,0x1c,0x6e = ins v15.s[3], v22.s[2]
-0x80,0x44,0x08,0x6e = ins v0.d[0], v4.d[1]
+0x61,0x34,0x1d,0x6e = mov v1.b[14], v3.b[6]
+0xe6,0x54,0x1e,0x6e = mov v6.h[7], v7.h[5]
+0xcf,0x46,0x1c,0x6e = mov v15.s[3], v22.s[2]
+0x80,0x44,0x08,0x6e = mov v0.d[0], v4.d[1]
+0x61,0x34,0x1d,0x6e = mov v1.b[14], v3.b[6]
+0xe6,0x54,0x1e,0x6e = mov v6.h[7], v7.h[5]
+0xcf,0x46,0x1c,0x6e = mov v15.s[3], v22.s[2]
+0x80,0x44,0x08,0x6e = mov v0.d[0], v4.d[1]
 0x41,0x04,0x05,0x0e = dup v1.8b, v2.b[2]
 0xeb,0x04,0x1e,0x0e = dup v11.4h, v7.h[7]
 0x91,0x06,0x04,0x0e = dup v17.2s, v20.s[0]