diff --git a/arch/X86/X86ATTInstPrinter.c b/arch/X86/X86ATTInstPrinter.c
index fdd41377..b8c49b79 100644
--- a/arch/X86/X86ATTInstPrinter.c
+++ b/arch/X86/X86ATTInstPrinter.c
@@ -153,14 +153,6 @@ static void printSSECC(MCInst *MI, unsigned Op, SStream *OS)
 		case    5: SStream_concat0(OS, "nlt"); op_addSseCC(MI, X86_SSE_CC_NLT); break;
 		case    6: SStream_concat0(OS, "nle"); op_addSseCC(MI, X86_SSE_CC_NLE); break;
 		case    7: SStream_concat0(OS, "ord"); op_addSseCC(MI, X86_SSE_CC_ORD); break;
-		case    8: SStream_concat0(OS, "eq_uq"); op_addSseCC(MI, X86_SSE_CC_EQ_UQ); break;
-		case    9: SStream_concat0(OS, "nge"); op_addSseCC(MI, X86_SSE_CC_NGE); break;
-		case  0xa: SStream_concat0(OS, "ngt"); op_addSseCC(MI, X86_SSE_CC_NGT); break;
-		case  0xb: SStream_concat0(OS, "false"); op_addSseCC(MI, X86_SSE_CC_FALSE); break;
-		case  0xc: SStream_concat0(OS, "neq_oq"); op_addSseCC(MI, X86_SSE_CC_NEQ_OQ); break;
-		case  0xd: SStream_concat0(OS, "ge"); op_addSseCC(MI, X86_SSE_CC_GE); break;
-		case  0xe: SStream_concat0(OS, "gt"); op_addSseCC(MI, X86_SSE_CC_GT); break;
-		case  0xf: SStream_concat0(OS, "true"); op_addSseCC(MI, X86_SSE_CC_TRUE); break;
 	}
 }
 
diff --git a/arch/X86/X86IntelInstPrinter.c b/arch/X86/X86IntelInstPrinter.c
index 4e4d0ac5..56e374b7 100644
--- a/arch/X86/X86IntelInstPrinter.c
+++ b/arch/X86/X86IntelInstPrinter.c
@@ -166,14 +166,6 @@ static void printSSECC(MCInst *MI, unsigned Op, SStream *OS)
 		case    5: SStream_concat0(OS, "nlt"); op_addSseCC(MI, X86_SSE_CC_NLT); break;
 		case    6: SStream_concat0(OS, "nle"); op_addSseCC(MI, X86_SSE_CC_NLE); break;
 		case    7: SStream_concat0(OS, "ord"); op_addSseCC(MI, X86_SSE_CC_ORD); break;
-		case    8: SStream_concat0(OS, "eq_uq"); op_addSseCC(MI, X86_SSE_CC_EQ_UQ); break;
-		case    9: SStream_concat0(OS, "nge"); op_addSseCC(MI, X86_SSE_CC_NGE); break;
-		case  0xa: SStream_concat0(OS, "ngt"); op_addSseCC(MI, X86_SSE_CC_NGT); break;
-		case  0xb: SStream_concat0(OS, "false"); op_addSseCC(MI, X86_SSE_CC_FALSE); break;
-		case  0xc: SStream_concat0(OS, "neq_oq"); op_addSseCC(MI, X86_SSE_CC_NEQ_OQ); break;
-		case  0xd: SStream_concat0(OS, "ge"); op_addSseCC(MI, X86_SSE_CC_GE); break;
-		case  0xe: SStream_concat0(OS, "gt"); op_addSseCC(MI, X86_SSE_CC_GT); break;
-		case  0xf: SStream_concat0(OS, "true"); op_addSseCC(MI, X86_SSE_CC_TRUE); break;
 	}
 }
 
diff --git a/bindings/java/capstone/X86_const.java b/bindings/java/capstone/X86_const.java
index 161d68f2..3777a535 100644
--- a/bindings/java/capstone/X86_const.java
+++ b/bindings/java/capstone/X86_const.java
@@ -276,14 +276,6 @@ public class X86_const {
 	public static final int X86_SSE_CC_NLT = 6;
 	public static final int X86_SSE_CC_NLE = 7;
 	public static final int X86_SSE_CC_ORD = 8;
-	public static final int X86_SSE_CC_EQ_UQ = 9;
-	public static final int X86_SSE_CC_NGE = 10;
-	public static final int X86_SSE_CC_NGT = 11;
-	public static final int X86_SSE_CC_FALSE = 12;
-	public static final int X86_SSE_CC_NEQ_OQ = 13;
-	public static final int X86_SSE_CC_GE = 14;
-	public static final int X86_SSE_CC_GT = 15;
-	public static final int X86_SSE_CC_TRUE = 16;
 
 	// AVX Code Condition type
 
diff --git a/bindings/ocaml/x86_const.ml b/bindings/ocaml/x86_const.ml
index e38c111e..eea7712d 100644
--- a/bindings/ocaml/x86_const.ml
+++ b/bindings/ocaml/x86_const.ml
@@ -273,14 +273,6 @@ let _X86_SSE_CC_NEQ = 5;;
 let _X86_SSE_CC_NLT = 6;;
 let _X86_SSE_CC_NLE = 7;;
 let _X86_SSE_CC_ORD = 8;;
-let _X86_SSE_CC_EQ_UQ = 9;;
-let _X86_SSE_CC_NGE = 10;;
-let _X86_SSE_CC_NGT = 11;;
-let _X86_SSE_CC_FALSE = 12;;
-let _X86_SSE_CC_NEQ_OQ = 13;;
-let _X86_SSE_CC_GE = 14;;
-let _X86_SSE_CC_GT = 15;;
-let _X86_SSE_CC_TRUE = 16;;
 
 (* AVX Code Condition type *)
 
diff --git a/bindings/python/capstone/x86_const.py b/bindings/python/capstone/x86_const.py
index e966a018..c663e5cf 100644
--- a/bindings/python/capstone/x86_const.py
+++ b/bindings/python/capstone/x86_const.py
@@ -273,14 +273,6 @@ X86_SSE_CC_NEQ = 5
 X86_SSE_CC_NLT = 6
 X86_SSE_CC_NLE = 7
 X86_SSE_CC_ORD = 8
-X86_SSE_CC_EQ_UQ = 9
-X86_SSE_CC_NGE = 10
-X86_SSE_CC_NGT = 11
-X86_SSE_CC_FALSE = 12
-X86_SSE_CC_NEQ_OQ = 13
-X86_SSE_CC_GE = 14
-X86_SSE_CC_GT = 15
-X86_SSE_CC_TRUE = 16
 
 # AVX Code Condition type
 
diff --git a/include/x86.h b/include/x86.h
index f6342c1d..d72c81cf 100644
--- a/include/x86.h
+++ b/include/x86.h
@@ -98,14 +98,6 @@ typedef enum x86_sse_cc {
 	X86_SSE_CC_NLT,
 	X86_SSE_CC_NLE,
 	X86_SSE_CC_ORD,
-	X86_SSE_CC_EQ_UQ,
-	X86_SSE_CC_NGE,
-	X86_SSE_CC_NGT,
-	X86_SSE_CC_FALSE,
-	X86_SSE_CC_NEQ_OQ,
-	X86_SSE_CC_GE,
-	X86_SSE_CC_GT,
-	X86_SSE_CC_TRUE,
 } x86_sse_cc;
 
 //> AVX Code Condition type