initial commit for java binding
This commit is contained in:
danghvu
parent
26ee41aa67
commit
6a6947f729
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@ -0,0 +1,2 @@
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*.class
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tags
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@ -0,0 +1,736 @@
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// Capstone Java binding
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// By Nguyen Anh Quynh & Dang Hoang Vu, 2013
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import com.sun.jna.Structure;
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import com.sun.jna.Pointer;
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import com.sun.jna.Union;
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import com.sun.jna.NativeLong;
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import java.util.List;
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import java.util.Arrays;
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class Arm {
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// ARM operand shift type
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public static final int ARM_SFT_INVALID = 0;
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public static final int ARM_SFT_ASR = 1;
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public static final int ARM_SFT_LSL = 2;
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public static final int ARM_SFT_LSR = 3;
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public static final int ARM_SFT_ROR = 4;
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public static final int ARM_SFT_RRX = 5;
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public static final int ARM_SFT_ASR_REG = 6;
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public static final int ARM_SFT_LSL_REG = 7;
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public static final int ARM_SFT_LSR_REG = 8;
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public static final int ARM_SFT_ROR_REG = 9;
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public static final int ARM_SFT_RRX_REG = 10;
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// ARM code condition type
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public static final int ARM_CC_INVALID = 0;
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public static final int ARM_CC_EQ = 1;
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public static final int ARM_CC_NE = 2;
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public static final int ARM_CC_HS = 3;
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public static final int ARM_CC_LO = 4;
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public static final int ARM_CC_MI = 5;
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public static final int ARM_CC_PL = 6;
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public static final int ARM_CC_VS = 7;
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public static final int ARM_CC_VC = 8;
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public static final int ARM_CC_HI = 9;
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public static final int ARM_CC_LS = 10;
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public static final int ARM_CC_GE = 11;
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public static final int ARM_CC_LT = 12;
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public static final int ARM_CC_GT = 13;
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public static final int ARM_CC_LE = 14;
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public static final int ARM_CC_AL = 15;
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// Operand type
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public static final int ARM_OP_INVALID = 0; // Uninitialized.
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public static final int ARM_OP_REG = 1 ; // Register operand.
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public static final int ARM_OP_CIMM = 2; // C-Immediate operand.
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public static final int ARM_OP_PIMM = 3; // C-Immediate operand.
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public static final int ARM_OP_IMM = 4 ; // Immediate operand.
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public static final int ARM_OP_FP = 5 ; // Floating-Point immediate operand.
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public static final int ARM_OP_MEM = 6 ; // Memory operand
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public static class MemType extends Structure {
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public int base;
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public int index;
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public int scale;
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public long disp;
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@Override
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public List getFieldOrder() {
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return Arrays.asList("base", "index", "scale", "disp");
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}
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}
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public static class OpValue extends Union implements Union.ByReference {
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public int reg;
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public long imm;
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public double fp;
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public MemType mem;
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public OpValue(Pointer p) {
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super(p);
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read();
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}
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@Override
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public List getFieldOrder() {
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return Arrays.asList("reg", "imm", "fp", "mem");
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}
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}
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public static class OpShift extends Structure implements Structure.ByReference {
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public int type;
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public int value;
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public OpShift(Pointer p) {
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super(p);
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read();
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}
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@Override
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public List getFieldOrder() {
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return Arrays.asList("type","value");
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}
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}
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public static class Operand extends Structure {
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public OpShift shift;
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public int type;
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public OpValue value;
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@Override
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public List getFieldOrder() {
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return Arrays.asList("shift", "type", "value");
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}
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}
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public static class OpInfo extends Capstone.OpInfo {
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public Operand [] op;
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public OpInfo(Pointer p) {
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cc = p.getInt(0);
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update_flags = (boolean) (p.getByte(4) > 0);
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writeback = (boolean) (p.getByte(5) > 0);
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int op_count = p.getShort(6);
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if (op_count == 0) {
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op = null;
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return;
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}
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op = new Operand[op_count];
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for (int i=0; i<op_count; i++) {
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Pointer p1 = p.share(8 + i*40);
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op[i] = new Operand();
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op[i].shift = new OpShift(p1);
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op[i].type = p1.getInt(8);
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op[i].value = new OpValue(p1.share(16));
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if (op[i].type == ARM_OP_MEM) {
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op[i].value.setType(MemType.class);
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op[i].value.read();
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}
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}
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}
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}
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// ARM registers
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public static final int ARM_REG_INVALID = 0;
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public static final int ARM_REG_APSR = 1;
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public static final int ARM_REG_APSR_NZCV = 2;
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public static final int ARM_REG_CPSR = 3;
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public static final int ARM_REG_FPEXC = 4;
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public static final int ARM_REG_FPINST = 5;
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public static final int ARM_REG_FPSCR = 6;
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public static final int ARM_REG_FPSCR_NZCV = 7;
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public static final int ARM_REG_FPSID = 8;
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public static final int ARM_REG_ITSTATE = 9;
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public static final int ARM_REG_LR = 10;
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public static final int ARM_REG_PC = 11;
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public static final int ARM_REG_SP = 12;
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public static final int ARM_REG_SPSR = 13;
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public static final int ARM_REG_D0 = 14;
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public static final int ARM_REG_D1 = 15;
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public static final int ARM_REG_D2 = 16;
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public static final int ARM_REG_D3 = 17;
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public static final int ARM_REG_D4 = 18;
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public static final int ARM_REG_D5 = 19;
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public static final int ARM_REG_D6 = 20;
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public static final int ARM_REG_D7 = 21;
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public static final int ARM_REG_D8 = 22;
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public static final int ARM_REG_D9 = 23;
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public static final int ARM_REG_D10 = 24;
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public static final int ARM_REG_D11 = 25;
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public static final int ARM_REG_D12 = 26;
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public static final int ARM_REG_D13 = 27;
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public static final int ARM_REG_D14 = 28;
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public static final int ARM_REG_D15 = 29;
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public static final int ARM_REG_D16 = 30;
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public static final int ARM_REG_D17 = 31;
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public static final int ARM_REG_D18 = 32;
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public static final int ARM_REG_D19 = 33;
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public static final int ARM_REG_D20 = 34;
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public static final int ARM_REG_D21 = 35;
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public static final int ARM_REG_D22 = 36;
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public static final int ARM_REG_D23 = 37;
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public static final int ARM_REG_D24 = 38;
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public static final int ARM_REG_D25 = 39;
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public static final int ARM_REG_D26 = 40;
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public static final int ARM_REG_D27 = 41;
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public static final int ARM_REG_D28 = 42;
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public static final int ARM_REG_D29 = 43;
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public static final int ARM_REG_D30 = 44;
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public static final int ARM_REG_D31 = 45;
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public static final int ARM_REG_FPINST2 = 46;
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public static final int ARM_REG_MVFR0 = 47;
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public static final int ARM_REG_MVFR1 = 48;
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public static final int ARM_REG_Q0 = 49;
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public static final int ARM_REG_Q1 = 50;
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public static final int ARM_REG_Q2 = 51;
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public static final int ARM_REG_Q3 = 52;
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public static final int ARM_REG_Q4 = 53;
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public static final int ARM_REG_Q5 = 54;
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public static final int ARM_REG_Q6 = 55;
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public static final int ARM_REG_Q7 = 56;
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public static final int ARM_REG_Q8 = 57;
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public static final int ARM_REG_Q9 = 58;
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public static final int ARM_REG_Q10 = 59;
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public static final int ARM_REG_Q11 = 60;
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public static final int ARM_REG_Q12 = 61;
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public static final int ARM_REG_Q13 = 62;
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public static final int ARM_REG_Q14 = 63;
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public static final int ARM_REG_Q15 = 64;
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public static final int ARM_REG_R0 = 65;
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public static final int ARM_REG_R1 = 66;
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public static final int ARM_REG_R2 = 67;
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public static final int ARM_REG_R3 = 68;
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public static final int ARM_REG_R4 = 69;
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public static final int ARM_REG_R5 = 70;
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public static final int ARM_REG_R6 = 71;
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public static final int ARM_REG_R7 = 72;
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public static final int ARM_REG_R8 = 73;
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public static final int ARM_REG_R9 = 74;
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public static final int ARM_REG_R10 = 75;
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public static final int ARM_REG_R11 = 76;
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public static final int ARM_REG_R12 = 77;
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public static final int ARM_REG_S0 = 78;
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public static final int ARM_REG_S1 = 79;
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public static final int ARM_REG_S2 = 80;
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public static final int ARM_REG_S3 = 81;
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public static final int ARM_REG_S4 = 82;
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public static final int ARM_REG_S5 = 83;
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public static final int ARM_REG_S6 = 84;
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public static final int ARM_REG_S7 = 85;
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public static final int ARM_REG_S8 = 86;
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public static final int ARM_REG_S9 = 87;
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public static final int ARM_REG_S10 = 88;
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public static final int ARM_REG_S11 = 89;
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public static final int ARM_REG_S12 = 90;
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public static final int ARM_REG_S13 = 91;
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public static final int ARM_REG_S14 = 92;
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public static final int ARM_REG_S15 = 93;
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public static final int ARM_REG_S16 = 94;
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public static final int ARM_REG_S17 = 95;
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public static final int ARM_REG_S18 = 96;
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public static final int ARM_REG_S19 = 97;
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public static final int ARM_REG_S20 = 98;
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public static final int ARM_REG_S21 = 99;
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public static final int ARM_REG_S22 = 100;
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public static final int ARM_REG_S23 = 101;
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public static final int ARM_REG_S24 = 102;
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public static final int ARM_REG_S25 = 103;
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public static final int ARM_REG_S26 = 104;
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public static final int ARM_REG_S27 = 105;
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public static final int ARM_REG_S28 = 106;
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public static final int ARM_REG_S29 = 107;
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public static final int ARM_REG_S30 = 108;
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public static final int ARM_REG_S31 = 109;
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// ARM instructions
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public static final int ARM_INS_INVALID = 0;
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public static final int ARM_INS_ADC = 1;
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public static final int ARM_INS_ADD = 2;
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public static final int ARM_INS_ADR = 3;
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public static final int ARM_INS_AESD_8 = 4;
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public static final int ARM_INS_AESE_8 = 5;
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public static final int ARM_INS_AESIMC_8 = 6;
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public static final int ARM_INS_AESMC_8 = 7;
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public static final int ARM_INS_AND = 8;
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public static final int ARM_INS_BFC = 9;
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public static final int ARM_INS_BFI = 10;
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public static final int ARM_INS_BIC = 11;
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public static final int ARM_INS_BKPT = 12;
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public static final int ARM_INS_BL = 13;
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public static final int ARM_INS_BLX = 14;
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public static final int ARM_INS_BX = 15;
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public static final int ARM_INS_BXJ = 16;
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public static final int ARM_INS_B = 17;
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public static final int ARM_INS_CDP = 18;
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public static final int ARM_INS_CDP2 = 19;
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public static final int ARM_INS_CLREX = 20;
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public static final int ARM_INS_CLZ = 21;
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public static final int ARM_INS_CMN = 22;
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public static final int ARM_INS_CMP = 23;
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public static final int ARM_INS_CPS = 24;
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public static final int ARM_INS_CRC32B = 25;
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public static final int ARM_INS_CRC32CB = 26;
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public static final int ARM_INS_CRC32CH = 27;
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public static final int ARM_INS_CRC32CW = 28;
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public static final int ARM_INS_CRC32H = 29;
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public static final int ARM_INS_CRC32W = 30;
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public static final int ARM_INS_DBG = 31;
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public static final int ARM_INS_DMB = 32;
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public static final int ARM_INS_DSB = 33;
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public static final int ARM_INS_EOR = 34;
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public static final int ARM_INS_VMOV = 35;
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public static final int ARM_INS_FLDMDBX = 36;
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public static final int ARM_INS_FLDMIAX = 37;
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public static final int ARM_INS_VMRS = 38;
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public static final int ARM_INS_FSTMDBX = 39;
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public static final int ARM_INS_FSTMIAX = 40;
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public static final int ARM_INS_HINT = 41;
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public static final int ARM_INS_HLT = 42;
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public static final int ARM_INS_ISB = 43;
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public static final int ARM_INS_LDA = 44;
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public static final int ARM_INS_LDAB = 45;
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public static final int ARM_INS_LDAEX = 46;
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public static final int ARM_INS_LDAEXB = 47;
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public static final int ARM_INS_LDAEXD = 48;
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public static final int ARM_INS_LDAEXH = 49;
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public static final int ARM_INS_LDAH = 50;
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public static final int ARM_INS_LDC2L = 51;
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public static final int ARM_INS_LDC2 = 52;
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public static final int ARM_INS_LDCL = 53;
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public static final int ARM_INS_LDC = 54;
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public static final int ARM_INS_LDMDA = 55;
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public static final int ARM_INS_LDMDB = 56;
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public static final int ARM_INS_LDM = 57;
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public static final int ARM_INS_LDMIB = 58;
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public static final int ARM_INS_LDRBT = 59;
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public static final int ARM_INS_LDRB = 60;
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public static final int ARM_INS_LDRD = 61;
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public static final int ARM_INS_LDREX = 62;
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public static final int ARM_INS_LDREXB = 63;
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public static final int ARM_INS_LDREXD = 64;
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public static final int ARM_INS_LDREXH = 65;
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public static final int ARM_INS_LDRH = 66;
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public static final int ARM_INS_LDRHT = 67;
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public static final int ARM_INS_LDRSB = 68;
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public static final int ARM_INS_LDRSBT = 69;
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public static final int ARM_INS_LDRSH = 70;
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public static final int ARM_INS_LDRSHT = 71;
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public static final int ARM_INS_LDRT = 72;
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public static final int ARM_INS_LDR = 73;
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public static final int ARM_INS_MCR = 74;
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public static final int ARM_INS_MCR2 = 75;
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public static final int ARM_INS_MCRR = 76;
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public static final int ARM_INS_MCRR2 = 77;
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public static final int ARM_INS_MLA = 78;
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public static final int ARM_INS_MLS = 79;
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public static final int ARM_INS_MOV = 80;
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public static final int ARM_INS_MOVT = 81;
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public static final int ARM_INS_MOVW = 82;
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public static final int ARM_INS_MRC = 83;
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public static final int ARM_INS_MRC2 = 84;
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public static final int ARM_INS_MRRC = 85;
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public static final int ARM_INS_MRRC2 = 86;
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public static final int ARM_INS_MRS = 87;
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public static final int ARM_INS_MSR = 88;
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public static final int ARM_INS_MUL = 89;
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public static final int ARM_INS_MVN = 90;
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public static final int ARM_INS_ORR = 91;
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public static final int ARM_INS_PKHBT = 92;
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public static final int ARM_INS_PKHTB = 93;
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public static final int ARM_INS_PLDW = 94;
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public static final int ARM_INS_PLD = 95;
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public static final int ARM_INS_PLI = 96;
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public static final int ARM_INS_QADD = 97;
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public static final int ARM_INS_QADD16 = 98;
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public static final int ARM_INS_QADD8 = 99;
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public static final int ARM_INS_QASX = 100;
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public static final int ARM_INS_QDADD = 101;
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public static final int ARM_INS_QDSUB = 102;
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public static final int ARM_INS_QSAX = 103;
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public static final int ARM_INS_QSUB = 104;
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public static final int ARM_INS_QSUB16 = 105;
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public static final int ARM_INS_QSUB8 = 106;
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public static final int ARM_INS_RBIT = 107;
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public static final int ARM_INS_REV = 108;
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public static final int ARM_INS_REV16 = 109;
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public static final int ARM_INS_REVSH = 110;
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public static final int ARM_INS_RFEDA = 111;
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public static final int ARM_INS_RFEDB = 112;
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public static final int ARM_INS_RFEIA = 113;
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public static final int ARM_INS_RFEIB = 114;
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public static final int ARM_INS_RSB = 115;
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public static final int ARM_INS_RSC = 116;
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public static final int ARM_INS_SADD16 = 117;
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public static final int ARM_INS_SADD8 = 118;
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public static final int ARM_INS_SASX = 119;
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public static final int ARM_INS_SBC = 120;
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public static final int ARM_INS_SBFX = 121;
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public static final int ARM_INS_SDIV = 122;
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public static final int ARM_INS_SEL = 123;
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public static final int ARM_INS_SETEND = 124;
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public static final int ARM_INS_SHA1C_32 = 125;
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public static final int ARM_INS_SHA1H_32 = 126;
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public static final int ARM_INS_SHA1M_32 = 127;
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public static final int ARM_INS_SHA1P_32 = 128;
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public static final int ARM_INS_SHA1SU0_32 = 129;
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public static final int ARM_INS_SHA1SU1_32 = 130;
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public static final int ARM_INS_SHA256H_32 = 131;
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public static final int ARM_INS_SHA256H2_32 = 132;
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public static final int ARM_INS_SHA256SU0_32 = 133;
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public static final int ARM_INS_SHA256SU1_32 = 134;
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public static final int ARM_INS_SHADD16 = 135;
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public static final int ARM_INS_SHADD8 = 136;
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public static final int ARM_INS_SHASX = 137;
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public static final int ARM_INS_SHSAX = 138;
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public static final int ARM_INS_SHSUB16 = 139;
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public static final int ARM_INS_SHSUB8 = 140;
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public static final int ARM_INS_SMC = 141;
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public static final int ARM_INS_SMLABB = 142;
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public static final int ARM_INS_SMLABT = 143;
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public static final int ARM_INS_SMLAD = 144;
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public static final int ARM_INS_SMLADX = 145;
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public static final int ARM_INS_SMLAL = 146;
|
||||
public static final int ARM_INS_SMLALBB = 147;
|
||||
public static final int ARM_INS_SMLALBT = 148;
|
||||
public static final int ARM_INS_SMLALD = 149;
|
||||
public static final int ARM_INS_SMLALDX = 150;
|
||||
public static final int ARM_INS_SMLALTB = 151;
|
||||
public static final int ARM_INS_SMLALTT = 152;
|
||||
public static final int ARM_INS_SMLATB = 153;
|
||||
public static final int ARM_INS_SMLATT = 154;
|
||||
public static final int ARM_INS_SMLAWB = 155;
|
||||
public static final int ARM_INS_SMLAWT = 156;
|
||||
public static final int ARM_INS_SMLSD = 157;
|
||||
public static final int ARM_INS_SMLSDX = 158;
|
||||
public static final int ARM_INS_SMLSLD = 159;
|
||||
public static final int ARM_INS_SMLSLDX = 160;
|
||||
public static final int ARM_INS_SMMLA = 161;
|
||||
public static final int ARM_INS_SMMLAR = 162;
|
||||
public static final int ARM_INS_SMMLS = 163;
|
||||
public static final int ARM_INS_SMMLSR = 164;
|
||||
public static final int ARM_INS_SMMUL = 165;
|
||||
public static final int ARM_INS_SMMULR = 166;
|
||||
public static final int ARM_INS_SMUAD = 167;
|
||||
public static final int ARM_INS_SMUADX = 168;
|
||||
public static final int ARM_INS_SMULBB = 169;
|
||||
public static final int ARM_INS_SMULBT = 170;
|
||||
public static final int ARM_INS_SMULL = 171;
|
||||
public static final int ARM_INS_SMULTB = 172;
|
||||
public static final int ARM_INS_SMULTT = 173;
|
||||
public static final int ARM_INS_SMULWB = 174;
|
||||
public static final int ARM_INS_SMULWT = 175;
|
||||
public static final int ARM_INS_SMUSD = 176;
|
||||
public static final int ARM_INS_SMUSDX = 177;
|
||||
public static final int ARM_INS_SRSDA = 178;
|
||||
public static final int ARM_INS_SRSDB = 179;
|
||||
public static final int ARM_INS_SRSIA = 180;
|
||||
public static final int ARM_INS_SRSIB = 181;
|
||||
public static final int ARM_INS_SSAT = 182;
|
||||
public static final int ARM_INS_SSAT16 = 183;
|
||||
public static final int ARM_INS_SSAX = 184;
|
||||
public static final int ARM_INS_SSUB16 = 185;
|
||||
public static final int ARM_INS_SSUB8 = 186;
|
||||
public static final int ARM_INS_STC2L = 187;
|
||||
public static final int ARM_INS_STC2 = 188;
|
||||
public static final int ARM_INS_STCL = 189;
|
||||
public static final int ARM_INS_STC = 190;
|
||||
public static final int ARM_INS_STL = 191;
|
||||
public static final int ARM_INS_STLB = 192;
|
||||
public static final int ARM_INS_STLEX = 193;
|
||||
public static final int ARM_INS_STLEXB = 194;
|
||||
public static final int ARM_INS_STLEXD = 195;
|
||||
public static final int ARM_INS_STLEXH = 196;
|
||||
public static final int ARM_INS_STLH = 197;
|
||||
public static final int ARM_INS_STMDA = 198;
|
||||
public static final int ARM_INS_STMDB = 199;
|
||||
public static final int ARM_INS_STM = 200;
|
||||
public static final int ARM_INS_STMIB = 201;
|
||||
public static final int ARM_INS_STRBT = 202;
|
||||
public static final int ARM_INS_STRB = 203;
|
||||
public static final int ARM_INS_STRD = 204;
|
||||
public static final int ARM_INS_STREX = 205;
|
||||
public static final int ARM_INS_STREXB = 206;
|
||||
public static final int ARM_INS_STREXD = 207;
|
||||
public static final int ARM_INS_STREXH = 208;
|
||||
public static final int ARM_INS_STRH = 209;
|
||||
public static final int ARM_INS_STRHT = 210;
|
||||
public static final int ARM_INS_STRT = 211;
|
||||
public static final int ARM_INS_STR = 212;
|
||||
public static final int ARM_INS_SUB = 213;
|
||||
public static final int ARM_INS_SVC = 214;
|
||||
public static final int ARM_INS_SWP = 215;
|
||||
public static final int ARM_INS_SWPB = 216;
|
||||
public static final int ARM_INS_SXTAB = 217;
|
||||
public static final int ARM_INS_SXTAB16 = 218;
|
||||
public static final int ARM_INS_SXTAH = 219;
|
||||
public static final int ARM_INS_SXTB = 220;
|
||||
public static final int ARM_INS_SXTB16 = 221;
|
||||
public static final int ARM_INS_SXTH = 222;
|
||||
public static final int ARM_INS_TEQ = 223;
|
||||
public static final int ARM_INS_TRAP = 224;
|
||||
public static final int ARM_INS_TST = 225;
|
||||
public static final int ARM_INS_UADD16 = 226;
|
||||
public static final int ARM_INS_UADD8 = 227;
|
||||
public static final int ARM_INS_UASX = 228;
|
||||
public static final int ARM_INS_UBFX = 229;
|
||||
public static final int ARM_INS_UDIV = 230;
|
||||
public static final int ARM_INS_UHADD16 = 231;
|
||||
public static final int ARM_INS_UHADD8 = 232;
|
||||
public static final int ARM_INS_UHASX = 233;
|
||||
public static final int ARM_INS_UHSAX = 234;
|
||||
public static final int ARM_INS_UHSUB16 = 235;
|
||||
public static final int ARM_INS_UHSUB8 = 236;
|
||||
public static final int ARM_INS_UMAAL = 237;
|
||||
public static final int ARM_INS_UMLAL = 238;
|
||||
public static final int ARM_INS_UMULL = 239;
|
||||
public static final int ARM_INS_UQADD16 = 240;
|
||||
public static final int ARM_INS_UQADD8 = 241;
|
||||
public static final int ARM_INS_UQASX = 242;
|
||||
public static final int ARM_INS_UQSAX = 243;
|
||||
public static final int ARM_INS_UQSUB16 = 244;
|
||||
public static final int ARM_INS_UQSUB8 = 245;
|
||||
public static final int ARM_INS_USAD8 = 246;
|
||||
public static final int ARM_INS_USADA8 = 247;
|
||||
public static final int ARM_INS_USAT = 248;
|
||||
public static final int ARM_INS_USAT16 = 249;
|
||||
public static final int ARM_INS_USAX = 250;
|
||||
public static final int ARM_INS_USUB16 = 251;
|
||||
public static final int ARM_INS_USUB8 = 252;
|
||||
public static final int ARM_INS_UXTAB = 253;
|
||||
public static final int ARM_INS_UXTAB16 = 254;
|
||||
public static final int ARM_INS_UXTAH = 255;
|
||||
public static final int ARM_INS_UXTB = 256;
|
||||
public static final int ARM_INS_UXTB16 = 257;
|
||||
public static final int ARM_INS_UXTH = 258;
|
||||
public static final int ARM_INS_VABAL = 259;
|
||||
public static final int ARM_INS_VABA = 260;
|
||||
public static final int ARM_INS_VABDL = 261;
|
||||
public static final int ARM_INS_VABD = 262;
|
||||
public static final int ARM_INS_VABS = 263;
|
||||
public static final int ARM_INS_VACGE = 264;
|
||||
public static final int ARM_INS_VACGT = 265;
|
||||
public static final int ARM_INS_VADD = 266;
|
||||
public static final int ARM_INS_VADDHN = 267;
|
||||
public static final int ARM_INS_VADDL = 268;
|
||||
public static final int ARM_INS_VADDW = 269;
|
||||
public static final int ARM_INS_VAND = 270;
|
||||
public static final int ARM_INS_VBIC = 271;
|
||||
public static final int ARM_INS_VBIF = 272;
|
||||
public static final int ARM_INS_VBIT = 273;
|
||||
public static final int ARM_INS_VBSL = 274;
|
||||
public static final int ARM_INS_VCEQ = 275;
|
||||
public static final int ARM_INS_VCGE = 276;
|
||||
public static final int ARM_INS_VCGT = 277;
|
||||
public static final int ARM_INS_VCLE = 278;
|
||||
public static final int ARM_INS_VCLS = 279;
|
||||
public static final int ARM_INS_VCLT = 280;
|
||||
public static final int ARM_INS_VCLZ = 281;
|
||||
public static final int ARM_INS_VCMP = 282;
|
||||
public static final int ARM_INS_VCMPE = 283;
|
||||
public static final int ARM_INS_VCNT = 284;
|
||||
public static final int ARM_INS_VCVTA_S32_F32 = 285;
|
||||
public static final int ARM_INS_VCVTA_U32_F32 = 286;
|
||||
public static final int ARM_INS_VCVTA_S32_F64 = 287;
|
||||
public static final int ARM_INS_VCVTA_U32_F64 = 288;
|
||||
public static final int ARM_INS_VCVTB = 289;
|
||||
public static final int ARM_INS_VCVT = 290;
|
||||
public static final int ARM_INS_VCVTM_S32_F32 = 291;
|
||||
public static final int ARM_INS_VCVTM_U32_F32 = 292;
|
||||
public static final int ARM_INS_VCVTM_S32_F64 = 293;
|
||||
public static final int ARM_INS_VCVTM_U32_F64 = 294;
|
||||
public static final int ARM_INS_VCVTN_S32_F32 = 295;
|
||||
public static final int ARM_INS_VCVTN_U32_F32 = 296;
|
||||
public static final int ARM_INS_VCVTN_S32_F64 = 297;
|
||||
public static final int ARM_INS_VCVTN_U32_F64 = 298;
|
||||
public static final int ARM_INS_VCVTP_S32_F32 = 299;
|
||||
public static final int ARM_INS_VCVTP_U32_F32 = 300;
|
||||
public static final int ARM_INS_VCVTP_S32_F64 = 301;
|
||||
public static final int ARM_INS_VCVTP_U32_F64 = 302;
|
||||
public static final int ARM_INS_VCVTT = 303;
|
||||
public static final int ARM_INS_VDIV = 304;
|
||||
public static final int ARM_INS_VDUP = 305;
|
||||
public static final int ARM_INS_VEOR = 306;
|
||||
public static final int ARM_INS_VEXT = 307;
|
||||
public static final int ARM_INS_VFMA = 308;
|
||||
public static final int ARM_INS_VFMS = 309;
|
||||
public static final int ARM_INS_VFNMA = 310;
|
||||
public static final int ARM_INS_VFNMS = 311;
|
||||
public static final int ARM_INS_VHADD = 312;
|
||||
public static final int ARM_INS_VHSUB = 313;
|
||||
public static final int ARM_INS_VLD1 = 314;
|
||||
public static final int ARM_INS_VLD2 = 315;
|
||||
public static final int ARM_INS_VLD3 = 316;
|
||||
public static final int ARM_INS_VLD4 = 317;
|
||||
public static final int ARM_INS_VLDMDB = 318;
|
||||
public static final int ARM_INS_VLDMIA = 319;
|
||||
public static final int ARM_INS_VLDR = 320;
|
||||
public static final int ARM_INS_VMAXNM_F64 = 321;
|
||||
public static final int ARM_INS_VMAXNM_F32 = 322;
|
||||
public static final int ARM_INS_VMAX = 323;
|
||||
public static final int ARM_INS_VMINNM_F64 = 324;
|
||||
public static final int ARM_INS_VMINNM_F32 = 325;
|
||||
public static final int ARM_INS_VMIN = 326;
|
||||
public static final int ARM_INS_VMLA = 327;
|
||||
public static final int ARM_INS_VMLAL = 328;
|
||||
public static final int ARM_INS_VMLS = 329;
|
||||
public static final int ARM_INS_VMLSL = 330;
|
||||
public static final int ARM_INS_VMOVL = 331;
|
||||
public static final int ARM_INS_VMOVN = 332;
|
||||
public static final int ARM_INS_VMSR = 333;
|
||||
public static final int ARM_INS_VMUL = 334;
|
||||
public static final int ARM_INS_VMULL_P64 = 335;
|
||||
public static final int ARM_INS_VMULL = 336;
|
||||
public static final int ARM_INS_VMVN = 337;
|
||||
public static final int ARM_INS_VNEG = 338;
|
||||
public static final int ARM_INS_VNMLA = 339;
|
||||
public static final int ARM_INS_VNMLS = 340;
|
||||
public static final int ARM_INS_VNMUL = 341;
|
||||
public static final int ARM_INS_VORN = 342;
|
||||
public static final int ARM_INS_VORR = 343;
|
||||
public static final int ARM_INS_VPADAL = 344;
|
||||
public static final int ARM_INS_VPADDL = 345;
|
||||
public static final int ARM_INS_VPADD = 346;
|
||||
public static final int ARM_INS_VPMAX = 347;
|
||||
public static final int ARM_INS_VPMIN = 348;
|
||||
public static final int ARM_INS_VQABS = 349;
|
||||
public static final int ARM_INS_VQADD = 350;
|
||||
public static final int ARM_INS_VQDMLAL = 351;
|
||||
public static final int ARM_INS_VQDMLSL = 352;
|
||||
public static final int ARM_INS_VQDMULH = 353;
|
||||
public static final int ARM_INS_VQDMULL = 354;
|
||||
public static final int ARM_INS_VQMOVUN = 355;
|
||||
public static final int ARM_INS_VQMOVN = 356;
|
||||
public static final int ARM_INS_VQNEG = 357;
|
||||
public static final int ARM_INS_VQRDMULH = 358;
|
||||
public static final int ARM_INS_VQRSHL = 359;
|
||||
public static final int ARM_INS_VQRSHRN = 360;
|
||||
public static final int ARM_INS_VQRSHRUN = 361;
|
||||
public static final int ARM_INS_VQSHL = 362;
|
||||
public static final int ARM_INS_VQSHLU = 363;
|
||||
public static final int ARM_INS_VQSHRN = 364;
|
||||
public static final int ARM_INS_VQSHRUN = 365;
|
||||
public static final int ARM_INS_VQSUB = 366;
|
||||
public static final int ARM_INS_VRADDHN = 367;
|
||||
public static final int ARM_INS_VRECPE = 368;
|
||||
public static final int ARM_INS_VRECPS = 369;
|
||||
public static final int ARM_INS_VREV16 = 370;
|
||||
public static final int ARM_INS_VREV32 = 371;
|
||||
public static final int ARM_INS_VREV64 = 372;
|
||||
public static final int ARM_INS_VRHADD = 373;
|
||||
public static final int ARM_INS_VRINTA_F64 = 374;
|
||||
public static final int ARM_INS_VRINTA_F32 = 375;
|
||||
public static final int ARM_INS_VRINTM_F64 = 376;
|
||||
public static final int ARM_INS_VRINTM_F32 = 377;
|
||||
public static final int ARM_INS_VRINTN_F64 = 378;
|
||||
public static final int ARM_INS_VRINTN_F32 = 379;
|
||||
public static final int ARM_INS_VRINTP_F64 = 380;
|
||||
public static final int ARM_INS_VRINTP_F32 = 381;
|
||||
public static final int ARM_INS_VRINTR = 382;
|
||||
public static final int ARM_INS_VRINTX = 383;
|
||||
public static final int ARM_INS_VRINTX_F32 = 384;
|
||||
public static final int ARM_INS_VRINTZ = 385;
|
||||
public static final int ARM_INS_VRINTZ_F32 = 386;
|
||||
public static final int ARM_INS_VRSHL = 387;
|
||||
public static final int ARM_INS_VRSHRN = 388;
|
||||
public static final int ARM_INS_VRSHR = 389;
|
||||
public static final int ARM_INS_VRSQRTE = 390;
|
||||
public static final int ARM_INS_VRSQRTS = 391;
|
||||
public static final int ARM_INS_VRSRA = 392;
|
||||
public static final int ARM_INS_VRSUBHN = 393;
|
||||
public static final int ARM_INS_VSELEQ_F64 = 394;
|
||||
public static final int ARM_INS_VSELEQ_F32 = 395;
|
||||
public static final int ARM_INS_VSELGE_F64 = 396;
|
||||
public static final int ARM_INS_VSELGE_F32 = 397;
|
||||
public static final int ARM_INS_VSELGT_F64 = 398;
|
||||
public static final int ARM_INS_VSELGT_F32 = 399;
|
||||
public static final int ARM_INS_VSELVS_F64 = 400;
|
||||
public static final int ARM_INS_VSELVS_F32 = 401;
|
||||
public static final int ARM_INS_VSHLL = 402;
|
||||
public static final int ARM_INS_VSHL = 403;
|
||||
public static final int ARM_INS_VSHRN = 404;
|
||||
public static final int ARM_INS_VSHR = 405;
|
||||
public static final int ARM_INS_VSLI = 406;
|
||||
public static final int ARM_INS_VSQRT = 407;
|
||||
public static final int ARM_INS_VSRA = 408;
|
||||
public static final int ARM_INS_VSRI = 409;
|
||||
public static final int ARM_INS_VST1 = 410;
|
||||
public static final int ARM_INS_VST2 = 411;
|
||||
public static final int ARM_INS_VST3 = 412;
|
||||
public static final int ARM_INS_VST4 = 413;
|
||||
public static final int ARM_INS_VSTMDB = 414;
|
||||
public static final int ARM_INS_VSTMIA = 415;
|
||||
public static final int ARM_INS_VSTR = 416;
|
||||
public static final int ARM_INS_VSUB = 417;
|
||||
public static final int ARM_INS_VSUBHN = 418;
|
||||
public static final int ARM_INS_VSUBL = 419;
|
||||
public static final int ARM_INS_VSUBW = 420;
|
||||
public static final int ARM_INS_VSWP = 421;
|
||||
public static final int ARM_INS_VTBL = 422;
|
||||
public static final int ARM_INS_VTBX = 423;
|
||||
public static final int ARM_INS_VCVTR = 424;
|
||||
public static final int ARM_INS_VTRN = 425;
|
||||
public static final int ARM_INS_VTST = 426;
|
||||
public static final int ARM_INS_VUZP = 427;
|
||||
public static final int ARM_INS_VZIP = 428;
|
||||
public static final int ARM_INS_ADDW = 429;
|
||||
public static final int ARM_INS_ADR_W = 430;
|
||||
public static final int ARM_INS_ASR = 431;
|
||||
public static final int ARM_INS_DCPS1 = 432;
|
||||
public static final int ARM_INS_DCPS2 = 433;
|
||||
public static final int ARM_INS_DCPS3 = 434;
|
||||
public static final int ARM_INS_IT = 435;
|
||||
public static final int ARM_INS_LSL = 436;
|
||||
public static final int ARM_INS_LSR = 437;
|
||||
public static final int ARM_INS_ORN = 438;
|
||||
public static final int ARM_INS_ROR = 439;
|
||||
public static final int ARM_INS_RRX = 440;
|
||||
public static final int ARM_INS_SUBW = 441;
|
||||
public static final int ARM_INS_TBB = 442;
|
||||
public static final int ARM_INS_TBH = 443;
|
||||
public static final int ARM_INS_CBNZ = 444;
|
||||
public static final int ARM_INS_CBZ = 445;
|
||||
public static final int ARM_INS_NOP = 446;
|
||||
public static final int ARM_INS_POP = 447;
|
||||
public static final int ARM_INS_PUSH = 448;
|
||||
public static final int ARM_INS_SEV = 449;
|
||||
public static final int ARM_INS_SEVL = 450;
|
||||
public static final int ARM_INS_WFE = 451;
|
||||
public static final int ARM_INS_WFI = 452;
|
||||
public static final int ARM_INS_YIELD = 453;
|
||||
|
||||
// ARM group of instructions
|
||||
public static final int ARM_GRP_INVALID = 0;
|
||||
public static final int ARM_GRP_CRYPTO = 1;
|
||||
public static final int ARM_GRP_DATABARRIER = 2;
|
||||
public static final int ARM_GRP_DIVIDE = 3;
|
||||
public static final int ARM_GRP_FPARMV8 = 4;
|
||||
public static final int ARM_GRP_MULTPRO = 5;
|
||||
public static final int ARM_GRP_NEON = 6;
|
||||
public static final int ARM_GRP_T2EXTRACTPACK = 7;
|
||||
public static final int ARM_GRP_THUMB2DSP = 8;
|
||||
public static final int ARM_GRP_TRUSTZONE = 9;
|
||||
public static final int ARM_GRP_V4T = 10;
|
||||
public static final int ARM_GRP_V5T = 11;
|
||||
public static final int ARM_GRP_V5TE = 12;
|
||||
public static final int ARM_GRP_V6 = 13;
|
||||
public static final int ARM_GRP_V6T2 = 14;
|
||||
public static final int ARM_GRP_V7 = 15;
|
||||
public static final int ARM_GRP_V8 = 16;
|
||||
public static final int ARM_GRP_VFP2 = 17;
|
||||
public static final int ARM_GRP_VFP3 = 18;
|
||||
public static final int ARM_GRP_VFP4 = 19;
|
||||
public static final int ARM_GRP_ARM = 20;
|
||||
public static final int ARM_GRP_MCLASS = 21;
|
||||
public static final int ARM_GRP_NOTMCLASS = 22;
|
||||
public static final int ARM_GRP_THUMB = 23;
|
||||
public static final int ARM_GRP_THUMB1ONLY = 24;
|
||||
public static final int ARM_GRP_THUMB2 = 25;
|
||||
public static final int ARM_GRP_PREV8 = 26;
|
||||
public static final int ARM_GRP_FPVMLX = 27;
|
||||
public static final int ARM_GRP_MULOPS = 28;
|
||||
}
|
||||
|
|
@ -0,0 +1,735 @@
|
|||
// Capstone Java binding
|
||||
// By Nguyen Anh Quynh & Dang Hoang Vu, 2013
|
||||
|
||||
import com.sun.jna.Structure;
|
||||
import com.sun.jna.Pointer;
|
||||
import com.sun.jna.Union;
|
||||
import com.sun.jna.NativeLong;
|
||||
|
||||
import java.util.List;
|
||||
import java.util.Arrays;
|
||||
|
||||
class Arm64 {
|
||||
|
||||
// ARM64 operand shift type
|
||||
public static final int ARM64_SFT_INVALID = 0;
|
||||
public static final int ARM64_SFT_LSL = 1;
|
||||
public static final int ARM64_SFT_MSL = 2;
|
||||
public static final int ARM64_SFT_LSR = 3;
|
||||
public static final int ARM64_SFT_ASR = 4;
|
||||
public static final int ARM64_SFT_ROR = 5;
|
||||
|
||||
// ARM64 extension type (for operands)
|
||||
public static final int ARM64_EXT_INVALID = 0;
|
||||
public static final int ARM64_EXT_UXTB = 1;
|
||||
public static final int ARM64_EXT_UXTH = 2;
|
||||
public static final int ARM64_EXT_UXTW = 3;
|
||||
public static final int ARM64_EXT_UXTX = 4;
|
||||
public static final int ARM64_EXT_SXTB = 5;
|
||||
public static final int ARM64_EXT_SXTH = 6;
|
||||
public static final int ARM64_EXT_SXTW = 7;
|
||||
public static final int ARM64_EXT_SXTX = 8;
|
||||
|
||||
// ARM64 code condition type
|
||||
public static final int ARM64_CC_INVALID = 0;
|
||||
public static final int ARM64_CC_EQ = 1;
|
||||
public static final int ARM64_CC_NE = 2;
|
||||
public static final int ARM64_CC_HS = 3;
|
||||
public static final int ARM64_CC_LO = 4;
|
||||
public static final int ARM64_CC_MI = 5;
|
||||
public static final int ARM64_CC_PL = 6;
|
||||
public static final int ARM64_CC_VS = 7;
|
||||
public static final int ARM64_CC_VC = 8;
|
||||
public static final int ARM64_CC_HI = 9;
|
||||
public static final int ARM64_CC_LS = 10;
|
||||
public static final int ARM64_CC_GE = 11;
|
||||
public static final int ARM64_CC_LT = 12;
|
||||
public static final int ARM64_CC_GT = 13;
|
||||
public static final int ARM64_CC_LE = 14;
|
||||
public static final int ARM64_CC_AL = 15;
|
||||
public static final int ARM64_CC_NV = 16;
|
||||
|
||||
// Operand type
|
||||
public static final int ARM64_OP_INVALID = 0; // Uninitialized.
|
||||
public static final int ARM64_OP_REG = 1; // Register operand.
|
||||
public static final int ARM64_OP_CIMM = 2; // C-Immediate operand.
|
||||
public static final int ARM64_OP_IMM = 3; // Immediate operand.
|
||||
public static final int ARM64_OP_FP = 4; // Floating-Point immediate operand.
|
||||
public static final int ARM64_OP_MEM = 5; // Memory operand
|
||||
|
||||
public static class MemType extends Structure {
|
||||
public int base;
|
||||
public int index;
|
||||
public long disp;
|
||||
|
||||
@Override
|
||||
public List getFieldOrder() {
|
||||
return Arrays.asList("base", "index", "disp");
|
||||
}
|
||||
}
|
||||
|
||||
public static class OpValue extends Union implements Union.ByReference {
|
||||
public int reg;
|
||||
public long imm;
|
||||
public double fp;
|
||||
public MemType mem;
|
||||
|
||||
public OpValue(Pointer p) {
|
||||
super(p);
|
||||
read();
|
||||
}
|
||||
|
||||
@Override
|
||||
public List getFieldOrder() {
|
||||
return Arrays.asList("reg", "imm", "fp", "mem");
|
||||
}
|
||||
}
|
||||
|
||||
public static class OpShift extends Structure implements Structure.ByReference {
|
||||
public int type;
|
||||
public int value;
|
||||
|
||||
public OpShift(Pointer p) {
|
||||
super(p);
|
||||
read();
|
||||
}
|
||||
|
||||
@Override
|
||||
public List getFieldOrder() {
|
||||
return Arrays.asList("type","value");
|
||||
}
|
||||
}
|
||||
|
||||
public static class Operand extends Structure {
|
||||
public OpShift shift;
|
||||
public int ext;
|
||||
public int type;
|
||||
public OpValue value;
|
||||
|
||||
@Override
|
||||
public List getFieldOrder() {
|
||||
return Arrays.asList("shift", "ext", "type", "value");
|
||||
}
|
||||
}
|
||||
|
||||
public static class OpInfo extends Capstone.OpInfo {
|
||||
|
||||
public Operand [] op;
|
||||
|
||||
public OpInfo(Pointer p) {
|
||||
cc = p.getInt(0);
|
||||
update_flags = (boolean) (p.getByte(4) > 0);
|
||||
writeback = (boolean) (p.getByte(5) > 0);
|
||||
int op_count = p.getShort(6);
|
||||
if (op_count == 0) {
|
||||
op = null;
|
||||
return;
|
||||
}
|
||||
|
||||
op = new Operand[op_count];
|
||||
for (int i=0; i<op_count; i++) {
|
||||
Pointer p1 = p.share(8 + i*32);
|
||||
op[i] = new Operand();
|
||||
op[i].shift = new OpShift(p1);
|
||||
op[i].ext = p1.getInt(8);
|
||||
op[i].type = p1.getInt(12);
|
||||
op[i].value = new OpValue(p1.share(16));
|
||||
if (op[i].type == ARM64_OP_MEM) {
|
||||
op[i].value.setType(MemType.class);
|
||||
op[i].value.read();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// ARM registers
|
||||
public static final int ARM64_REG_INVALID = 0;
|
||||
public static final int ARM64_REG_NZCV = 1;
|
||||
public static final int ARM64_REG_WSP = 2;
|
||||
public static final int ARM64_REG_WZR = 3;
|
||||
public static final int ARM64_REG_SP = 4;
|
||||
public static final int ARM64_REG_XZR = 5;
|
||||
public static final int ARM64_REG_B0 = 6;
|
||||
public static final int ARM64_REG_B1 = 7;
|
||||
public static final int ARM64_REG_B2 = 8;
|
||||
public static final int ARM64_REG_B3 = 9;
|
||||
public static final int ARM64_REG_B4 = 10;
|
||||
public static final int ARM64_REG_B5 = 11;
|
||||
public static final int ARM64_REG_B6 = 12;
|
||||
public static final int ARM64_REG_B7 = 13;
|
||||
public static final int ARM64_REG_B8 = 14;
|
||||
public static final int ARM64_REG_B9 = 15;
|
||||
public static final int ARM64_REG_B10 = 16;
|
||||
public static final int ARM64_REG_B11 = 17;
|
||||
public static final int ARM64_REG_B12 = 18;
|
||||
public static final int ARM64_REG_B13 = 19;
|
||||
public static final int ARM64_REG_B14 = 20;
|
||||
public static final int ARM64_REG_B15 = 21;
|
||||
public static final int ARM64_REG_B16 = 22;
|
||||
public static final int ARM64_REG_B17 = 23;
|
||||
public static final int ARM64_REG_B18 = 24;
|
||||
public static final int ARM64_REG_B19 = 25;
|
||||
public static final int ARM64_REG_B20 = 26;
|
||||
public static final int ARM64_REG_B21 = 27;
|
||||
public static final int ARM64_REG_B22 = 28;
|
||||
public static final int ARM64_REG_B23 = 29;
|
||||
public static final int ARM64_REG_B24 = 30;
|
||||
public static final int ARM64_REG_B25 = 31;
|
||||
public static final int ARM64_REG_B26 = 32;
|
||||
public static final int ARM64_REG_B27 = 33;
|
||||
public static final int ARM64_REG_B28 = 34;
|
||||
public static final int ARM64_REG_B29 = 35;
|
||||
public static final int ARM64_REG_B30 = 36;
|
||||
public static final int ARM64_REG_B31 = 37;
|
||||
public static final int ARM64_REG_D0 = 38;
|
||||
public static final int ARM64_REG_D1 = 39;
|
||||
public static final int ARM64_REG_D2 = 40;
|
||||
public static final int ARM64_REG_D3 = 41;
|
||||
public static final int ARM64_REG_D4 = 42;
|
||||
public static final int ARM64_REG_D5 = 43;
|
||||
public static final int ARM64_REG_D6 = 44;
|
||||
public static final int ARM64_REG_D7 = 45;
|
||||
public static final int ARM64_REG_D8 = 46;
|
||||
public static final int ARM64_REG_D9 = 47;
|
||||
public static final int ARM64_REG_D10 = 48;
|
||||
public static final int ARM64_REG_D11 = 49;
|
||||
public static final int ARM64_REG_D12 = 50;
|
||||
public static final int ARM64_REG_D13 = 51;
|
||||
public static final int ARM64_REG_D14 = 52;
|
||||
public static final int ARM64_REG_D15 = 53;
|
||||
public static final int ARM64_REG_D16 = 54;
|
||||
public static final int ARM64_REG_D17 = 55;
|
||||
public static final int ARM64_REG_D18 = 56;
|
||||
public static final int ARM64_REG_D19 = 57;
|
||||
public static final int ARM64_REG_D20 = 58;
|
||||
public static final int ARM64_REG_D21 = 59;
|
||||
public static final int ARM64_REG_D22 = 60;
|
||||
public static final int ARM64_REG_D23 = 61;
|
||||
public static final int ARM64_REG_D24 = 62;
|
||||
public static final int ARM64_REG_D25 = 63;
|
||||
public static final int ARM64_REG_D26 = 64;
|
||||
public static final int ARM64_REG_D27 = 65;
|
||||
public static final int ARM64_REG_D28 = 66;
|
||||
public static final int ARM64_REG_D29 = 67;
|
||||
public static final int ARM64_REG_D30 = 68;
|
||||
public static final int ARM64_REG_D31 = 69;
|
||||
public static final int ARM64_REG_H0 = 70;
|
||||
public static final int ARM64_REG_H1 = 71;
|
||||
public static final int ARM64_REG_H2 = 72;
|
||||
public static final int ARM64_REG_H3 = 73;
|
||||
public static final int ARM64_REG_H4 = 74;
|
||||
public static final int ARM64_REG_H5 = 75;
|
||||
public static final int ARM64_REG_H6 = 76;
|
||||
public static final int ARM64_REG_H7 = 77;
|
||||
public static final int ARM64_REG_H8 = 78;
|
||||
public static final int ARM64_REG_H9 = 79;
|
||||
public static final int ARM64_REG_H10 = 80;
|
||||
public static final int ARM64_REG_H11 = 81;
|
||||
public static final int ARM64_REG_H12 = 82;
|
||||
public static final int ARM64_REG_H13 = 83;
|
||||
public static final int ARM64_REG_H14 = 84;
|
||||
public static final int ARM64_REG_H15 = 85;
|
||||
public static final int ARM64_REG_H16 = 86;
|
||||
public static final int ARM64_REG_H17 = 87;
|
||||
public static final int ARM64_REG_H18 = 88;
|
||||
public static final int ARM64_REG_H19 = 89;
|
||||
public static final int ARM64_REG_H20 = 90;
|
||||
public static final int ARM64_REG_H21 = 91;
|
||||
public static final int ARM64_REG_H22 = 92;
|
||||
public static final int ARM64_REG_H23 = 93;
|
||||
public static final int ARM64_REG_H24 = 94;
|
||||
public static final int ARM64_REG_H25 = 95;
|
||||
public static final int ARM64_REG_H26 = 96;
|
||||
public static final int ARM64_REG_H27 = 97;
|
||||
public static final int ARM64_REG_H28 = 98;
|
||||
public static final int ARM64_REG_H29 = 99;
|
||||
public static final int ARM64_REG_H30 = 100;
|
||||
public static final int ARM64_REG_H31 = 101;
|
||||
public static final int ARM64_REG_Q0 = 102;
|
||||
public static final int ARM64_REG_Q1 = 103;
|
||||
public static final int ARM64_REG_Q2 = 104;
|
||||
public static final int ARM64_REG_Q3 = 105;
|
||||
public static final int ARM64_REG_Q4 = 106;
|
||||
public static final int ARM64_REG_Q5 = 107;
|
||||
public static final int ARM64_REG_Q6 = 108;
|
||||
public static final int ARM64_REG_Q7 = 109;
|
||||
public static final int ARM64_REG_Q8 = 110;
|
||||
public static final int ARM64_REG_Q9 = 111;
|
||||
public static final int ARM64_REG_Q10 = 112;
|
||||
public static final int ARM64_REG_Q11 = 113;
|
||||
public static final int ARM64_REG_Q12 = 114;
|
||||
public static final int ARM64_REG_Q13 = 115;
|
||||
public static final int ARM64_REG_Q14 = 116;
|
||||
public static final int ARM64_REG_Q15 = 117;
|
||||
public static final int ARM64_REG_Q16 = 118;
|
||||
public static final int ARM64_REG_Q17 = 119;
|
||||
public static final int ARM64_REG_Q18 = 120;
|
||||
public static final int ARM64_REG_Q19 = 121;
|
||||
public static final int ARM64_REG_Q20 = 122;
|
||||
public static final int ARM64_REG_Q21 = 123;
|
||||
public static final int ARM64_REG_Q22 = 124;
|
||||
public static final int ARM64_REG_Q23 = 125;
|
||||
public static final int ARM64_REG_Q24 = 126;
|
||||
public static final int ARM64_REG_Q25 = 127;
|
||||
public static final int ARM64_REG_Q26 = 128;
|
||||
public static final int ARM64_REG_Q27 = 129;
|
||||
public static final int ARM64_REG_Q28 = 130;
|
||||
public static final int ARM64_REG_Q29 = 131;
|
||||
public static final int ARM64_REG_Q30 = 132;
|
||||
public static final int ARM64_REG_Q31 = 133;
|
||||
public static final int ARM64_REG_S0 = 134;
|
||||
public static final int ARM64_REG_S1 = 135;
|
||||
public static final int ARM64_REG_S2 = 136;
|
||||
public static final int ARM64_REG_S3 = 137;
|
||||
public static final int ARM64_REG_S4 = 138;
|
||||
public static final int ARM64_REG_S5 = 139;
|
||||
public static final int ARM64_REG_S6 = 140;
|
||||
public static final int ARM64_REG_S7 = 141;
|
||||
public static final int ARM64_REG_S8 = 142;
|
||||
public static final int ARM64_REG_S9 = 143;
|
||||
public static final int ARM64_REG_S10 = 144;
|
||||
public static final int ARM64_REG_S11 = 145;
|
||||
public static final int ARM64_REG_S12 = 146;
|
||||
public static final int ARM64_REG_S13 = 147;
|
||||
public static final int ARM64_REG_S14 = 148;
|
||||
public static final int ARM64_REG_S15 = 149;
|
||||
public static final int ARM64_REG_S16 = 150;
|
||||
public static final int ARM64_REG_S17 = 151;
|
||||
public static final int ARM64_REG_S18 = 152;
|
||||
public static final int ARM64_REG_S19 = 153;
|
||||
public static final int ARM64_REG_S20 = 154;
|
||||
public static final int ARM64_REG_S21 = 155;
|
||||
public static final int ARM64_REG_S22 = 156;
|
||||
public static final int ARM64_REG_S23 = 157;
|
||||
public static final int ARM64_REG_S24 = 158;
|
||||
public static final int ARM64_REG_S25 = 159;
|
||||
public static final int ARM64_REG_S26 = 160;
|
||||
public static final int ARM64_REG_S27 = 161;
|
||||
public static final int ARM64_REG_S28 = 162;
|
||||
public static final int ARM64_REG_S29 = 163;
|
||||
public static final int ARM64_REG_S30 = 164;
|
||||
public static final int ARM64_REG_S31 = 165;
|
||||
public static final int ARM64_REG_W0 = 166;
|
||||
public static final int ARM64_REG_W1 = 167;
|
||||
public static final int ARM64_REG_W2 = 168;
|
||||
public static final int ARM64_REG_W3 = 169;
|
||||
public static final int ARM64_REG_W4 = 170;
|
||||
public static final int ARM64_REG_W5 = 171;
|
||||
public static final int ARM64_REG_W6 = 172;
|
||||
public static final int ARM64_REG_W7 = 173;
|
||||
public static final int ARM64_REG_W8 = 174;
|
||||
public static final int ARM64_REG_W9 = 175;
|
||||
public static final int ARM64_REG_W10 = 176;
|
||||
public static final int ARM64_REG_W11 = 177;
|
||||
public static final int ARM64_REG_W12 = 178;
|
||||
public static final int ARM64_REG_W13 = 179;
|
||||
public static final int ARM64_REG_W14 = 180;
|
||||
public static final int ARM64_REG_W15 = 181;
|
||||
public static final int ARM64_REG_W16 = 182;
|
||||
public static final int ARM64_REG_W17 = 183;
|
||||
public static final int ARM64_REG_W18 = 184;
|
||||
public static final int ARM64_REG_W19 = 185;
|
||||
public static final int ARM64_REG_W20 = 186;
|
||||
public static final int ARM64_REG_W21 = 187;
|
||||
public static final int ARM64_REG_W22 = 188;
|
||||
public static final int ARM64_REG_W23 = 189;
|
||||
public static final int ARM64_REG_W24 = 190;
|
||||
public static final int ARM64_REG_W25 = 191;
|
||||
public static final int ARM64_REG_W26 = 192;
|
||||
public static final int ARM64_REG_W27 = 193;
|
||||
public static final int ARM64_REG_W28 = 194;
|
||||
public static final int ARM64_REG_W29 = 195;
|
||||
public static final int ARM64_REG_W30 = 196;
|
||||
public static final int ARM64_REG_X0 = 197;
|
||||
public static final int ARM64_REG_X1 = 198;
|
||||
public static final int ARM64_REG_X2 = 199;
|
||||
public static final int ARM64_REG_X3 = 200;
|
||||
public static final int ARM64_REG_X4 = 201;
|
||||
public static final int ARM64_REG_X5 = 202;
|
||||
public static final int ARM64_REG_X6 = 203;
|
||||
public static final int ARM64_REG_X7 = 204;
|
||||
public static final int ARM64_REG_X8 = 205;
|
||||
public static final int ARM64_REG_X9 = 206;
|
||||
public static final int ARM64_REG_X10 = 207;
|
||||
public static final int ARM64_REG_X11 = 208;
|
||||
public static final int ARM64_REG_X12 = 209;
|
||||
public static final int ARM64_REG_X13 = 210;
|
||||
public static final int ARM64_REG_X14 = 211;
|
||||
public static final int ARM64_REG_X15 = 212;
|
||||
public static final int ARM64_REG_X16 = 213;
|
||||
public static final int ARM64_REG_X17 = 214;
|
||||
public static final int ARM64_REG_X18 = 215;
|
||||
public static final int ARM64_REG_X19 = 216;
|
||||
public static final int ARM64_REG_X20 = 217;
|
||||
public static final int ARM64_REG_X21 = 218;
|
||||
public static final int ARM64_REG_X22 = 219;
|
||||
public static final int ARM64_REG_X23 = 220;
|
||||
public static final int ARM64_REG_X24 = 221;
|
||||
public static final int ARM64_REG_X25 = 222;
|
||||
public static final int ARM64_REG_X26 = 223;
|
||||
public static final int ARM64_REG_X27 = 224;
|
||||
public static final int ARM64_REG_X28 = 225;
|
||||
public static final int ARM64_REG_X29 = 226;
|
||||
public static final int ARM64_REG_X30 = 227;
|
||||
|
||||
// ARM64 instructions
|
||||
public static final int ARM64_INS_INVALID = 0;
|
||||
public static final int ARM64_INS_ADC = 1;
|
||||
public static final int ARM64_INS_ADDHN2 = 2;
|
||||
public static final int ARM64_INS_ADDHN = 3;
|
||||
public static final int ARM64_INS_ADDP = 4;
|
||||
public static final int ARM64_INS_ADD = 5;
|
||||
public static final int ARM64_INS_CMN = 6;
|
||||
public static final int ARM64_INS_ADRP = 7;
|
||||
public static final int ARM64_INS_ADR = 8;
|
||||
public static final int ARM64_INS_AND = 9;
|
||||
public static final int ARM64_INS_ASR = 10;
|
||||
public static final int ARM64_INS_AT = 11;
|
||||
public static final int ARM64_INS_BFI = 12;
|
||||
public static final int ARM64_INS_BFM = 13;
|
||||
public static final int ARM64_INS_BFXIL = 14;
|
||||
public static final int ARM64_INS_BIC = 15;
|
||||
public static final int ARM64_INS_BIF = 16;
|
||||
public static final int ARM64_INS_BIT = 17;
|
||||
public static final int ARM64_INS_BLR = 18;
|
||||
public static final int ARM64_INS_BL = 19;
|
||||
public static final int ARM64_INS_BRK = 20;
|
||||
public static final int ARM64_INS_BR = 21;
|
||||
public static final int ARM64_INS_BSL = 22;
|
||||
public static final int ARM64_INS_B = 23;
|
||||
public static final int ARM64_INS_CBNZ = 24;
|
||||
public static final int ARM64_INS_CBZ = 25;
|
||||
public static final int ARM64_INS_CCMN = 26;
|
||||
public static final int ARM64_INS_CCMP = 27;
|
||||
public static final int ARM64_INS_CLREX = 28;
|
||||
public static final int ARM64_INS_CLS = 29;
|
||||
public static final int ARM64_INS_CLZ = 30;
|
||||
public static final int ARM64_INS_CMEQ = 31;
|
||||
public static final int ARM64_INS_CMGE = 32;
|
||||
public static final int ARM64_INS_CMGT = 33;
|
||||
public static final int ARM64_INS_CMHI = 34;
|
||||
public static final int ARM64_INS_CMHS = 35;
|
||||
public static final int ARM64_INS_CMLE = 36;
|
||||
public static final int ARM64_INS_CMLT = 37;
|
||||
public static final int ARM64_INS_CMP = 38;
|
||||
public static final int ARM64_INS_CMTST = 39;
|
||||
public static final int ARM64_INS_CRC32B = 40;
|
||||
public static final int ARM64_INS_CRC32CB = 41;
|
||||
public static final int ARM64_INS_CRC32CH = 42;
|
||||
public static final int ARM64_INS_CRC32CW = 43;
|
||||
public static final int ARM64_INS_CRC32CX = 44;
|
||||
public static final int ARM64_INS_CRC32H = 45;
|
||||
public static final int ARM64_INS_CRC32W = 46;
|
||||
public static final int ARM64_INS_CRC32X = 47;
|
||||
public static final int ARM64_INS_CSEL = 48;
|
||||
public static final int ARM64_INS_CSINC = 49;
|
||||
public static final int ARM64_INS_CSINV = 50;
|
||||
public static final int ARM64_INS_CSNEG = 51;
|
||||
public static final int ARM64_INS_DCPS1 = 52;
|
||||
public static final int ARM64_INS_DCPS2 = 53;
|
||||
public static final int ARM64_INS_DCPS3 = 54;
|
||||
public static final int ARM64_INS_DC = 55;
|
||||
public static final int ARM64_INS_DMB = 56;
|
||||
public static final int ARM64_INS_DRPS = 57;
|
||||
public static final int ARM64_INS_DSB = 58;
|
||||
public static final int ARM64_INS_EON = 59;
|
||||
public static final int ARM64_INS_EOR = 60;
|
||||
public static final int ARM64_INS_ERET = 61;
|
||||
public static final int ARM64_INS_EXTR = 62;
|
||||
public static final int ARM64_INS_FABD = 63;
|
||||
public static final int ARM64_INS_FABS = 64;
|
||||
public static final int ARM64_INS_FACGE = 65;
|
||||
public static final int ARM64_INS_FACGT = 66;
|
||||
public static final int ARM64_INS_FADDP = 67;
|
||||
public static final int ARM64_INS_FADD = 68;
|
||||
public static final int ARM64_INS_FCCMPE = 69;
|
||||
public static final int ARM64_INS_FCCMP = 70;
|
||||
public static final int ARM64_INS_FCMEQ = 71;
|
||||
public static final int ARM64_INS_FCMGE = 72;
|
||||
public static final int ARM64_INS_FCMGT = 73;
|
||||
public static final int ARM64_INS_FCMLE = 74;
|
||||
public static final int ARM64_INS_FCMLT = 75;
|
||||
public static final int ARM64_INS_FCMP = 76;
|
||||
public static final int ARM64_INS_FCMPE = 77;
|
||||
public static final int ARM64_INS_FCSEL = 78;
|
||||
public static final int ARM64_INS_FCVTAS = 79;
|
||||
public static final int ARM64_INS_FCVTAU = 80;
|
||||
public static final int ARM64_INS_FCVTMS = 81;
|
||||
public static final int ARM64_INS_FCVTMU = 82;
|
||||
public static final int ARM64_INS_FCVTNS = 83;
|
||||
public static final int ARM64_INS_FCVTNU = 84;
|
||||
public static final int ARM64_INS_FCVTPS = 85;
|
||||
public static final int ARM64_INS_FCVTPU = 86;
|
||||
public static final int ARM64_INS_FCVTZS = 87;
|
||||
public static final int ARM64_INS_FCVTZU = 88;
|
||||
public static final int ARM64_INS_FCVT = 89;
|
||||
public static final int ARM64_INS_FDIV = 90;
|
||||
public static final int ARM64_INS_FMADD = 91;
|
||||
public static final int ARM64_INS_FMAXNMP = 92;
|
||||
public static final int ARM64_INS_FMAXNM = 93;
|
||||
public static final int ARM64_INS_FMAXP = 94;
|
||||
public static final int ARM64_INS_FMAX = 95;
|
||||
public static final int ARM64_INS_FMINNMP = 96;
|
||||
public static final int ARM64_INS_FMINNM = 97;
|
||||
public static final int ARM64_INS_FMINP = 98;
|
||||
public static final int ARM64_INS_FMIN = 99;
|
||||
public static final int ARM64_INS_FMLA = 100;
|
||||
public static final int ARM64_INS_FMLS = 101;
|
||||
public static final int ARM64_INS_FMOV = 102;
|
||||
public static final int ARM64_INS_FMSUB = 103;
|
||||
public static final int ARM64_INS_FMULX = 104;
|
||||
public static final int ARM64_INS_FMUL = 105;
|
||||
public static final int ARM64_INS_FNEG = 106;
|
||||
public static final int ARM64_INS_FNMADD = 107;
|
||||
public static final int ARM64_INS_FNMSUB = 108;
|
||||
public static final int ARM64_INS_FNMUL = 109;
|
||||
public static final int ARM64_INS_FRECPS = 110;
|
||||
public static final int ARM64_INS_FRINTA = 111;
|
||||
public static final int ARM64_INS_FRINTI = 112;
|
||||
public static final int ARM64_INS_FRINTM = 113;
|
||||
public static final int ARM64_INS_FRINTN = 114;
|
||||
public static final int ARM64_INS_FRINTP = 115;
|
||||
public static final int ARM64_INS_FRINTX = 116;
|
||||
public static final int ARM64_INS_FRINTZ = 117;
|
||||
public static final int ARM64_INS_FRSQRTS = 118;
|
||||
public static final int ARM64_INS_FSQRT = 119;
|
||||
public static final int ARM64_INS_FSUB = 120;
|
||||
public static final int ARM64_INS_HINT = 121;
|
||||
public static final int ARM64_INS_HLT = 122;
|
||||
public static final int ARM64_INS_HVC = 123;
|
||||
public static final int ARM64_INS_IC = 124;
|
||||
public static final int ARM64_INS_INS = 125;
|
||||
public static final int ARM64_INS_ISB = 126;
|
||||
public static final int ARM64_INS_LDARB = 127;
|
||||
public static final int ARM64_INS_LDAR = 128;
|
||||
public static final int ARM64_INS_LDARH = 129;
|
||||
public static final int ARM64_INS_LDAXP = 130;
|
||||
public static final int ARM64_INS_LDAXRB = 131;
|
||||
public static final int ARM64_INS_LDAXR = 132;
|
||||
public static final int ARM64_INS_LDAXRH = 133;
|
||||
public static final int ARM64_INS_LDPSW = 134;
|
||||
public static final int ARM64_INS_LDRSB = 135;
|
||||
public static final int ARM64_INS_LDURSB = 136;
|
||||
public static final int ARM64_INS_LDRSH = 137;
|
||||
public static final int ARM64_INS_LDURSH = 138;
|
||||
public static final int ARM64_INS_LDRSW = 139;
|
||||
public static final int ARM64_INS_LDR = 140;
|
||||
public static final int ARM64_INS_LDTRSB = 141;
|
||||
public static final int ARM64_INS_LDTRSH = 142;
|
||||
public static final int ARM64_INS_LDTRSW = 143;
|
||||
public static final int ARM64_INS_LDURSW = 144;
|
||||
public static final int ARM64_INS_LDXP = 145;
|
||||
public static final int ARM64_INS_LDXRB = 146;
|
||||
public static final int ARM64_INS_LDXR = 147;
|
||||
public static final int ARM64_INS_LDXRH = 148;
|
||||
public static final int ARM64_INS_LDRH = 149;
|
||||
public static final int ARM64_INS_LDURH = 150;
|
||||
public static final int ARM64_INS_STRH = 151;
|
||||
public static final int ARM64_INS_STURH = 152;
|
||||
public static final int ARM64_INS_LDTRH = 153;
|
||||
public static final int ARM64_INS_STTRH = 154;
|
||||
public static final int ARM64_INS_LDUR = 155;
|
||||
public static final int ARM64_INS_STR = 156;
|
||||
public static final int ARM64_INS_STUR = 157;
|
||||
public static final int ARM64_INS_LDTR = 158;
|
||||
public static final int ARM64_INS_STTR = 159;
|
||||
public static final int ARM64_INS_LDRB = 160;
|
||||
public static final int ARM64_INS_LDURB = 161;
|
||||
public static final int ARM64_INS_STRB = 162;
|
||||
public static final int ARM64_INS_STURB = 163;
|
||||
public static final int ARM64_INS_LDTRB = 164;
|
||||
public static final int ARM64_INS_STTRB = 165;
|
||||
public static final int ARM64_INS_LDP = 166;
|
||||
public static final int ARM64_INS_LDNP = 167;
|
||||
public static final int ARM64_INS_STNP = 168;
|
||||
public static final int ARM64_INS_STP = 169;
|
||||
public static final int ARM64_INS_LSL = 170;
|
||||
public static final int ARM64_INS_LSR = 171;
|
||||
public static final int ARM64_INS_MADD = 172;
|
||||
public static final int ARM64_INS_MLA = 173;
|
||||
public static final int ARM64_INS_MLS = 174;
|
||||
public static final int ARM64_INS_MOVI = 175;
|
||||
public static final int ARM64_INS_MOVK = 176;
|
||||
public static final int ARM64_INS_MOVN = 177;
|
||||
public static final int ARM64_INS_MOVZ = 178;
|
||||
public static final int ARM64_INS_MRS = 179;
|
||||
public static final int ARM64_INS_MSR = 180;
|
||||
public static final int ARM64_INS_MSUB = 181;
|
||||
public static final int ARM64_INS_MUL = 182;
|
||||
public static final int ARM64_INS_MVNI = 183;
|
||||
public static final int ARM64_INS_MVN = 184;
|
||||
public static final int ARM64_INS_ORN = 185;
|
||||
public static final int ARM64_INS_ORR = 186;
|
||||
public static final int ARM64_INS_PMULL2 = 187;
|
||||
public static final int ARM64_INS_PMULL = 188;
|
||||
public static final int ARM64_INS_PMUL = 189;
|
||||
public static final int ARM64_INS_PRFM = 190;
|
||||
public static final int ARM64_INS_PRFUM = 191;
|
||||
public static final int ARM64_INS_SQRSHRUN2 = 192;
|
||||
public static final int ARM64_INS_SQRSHRUN = 193;
|
||||
public static final int ARM64_INS_SQSHRUN2 = 194;
|
||||
public static final int ARM64_INS_SQSHRUN = 195;
|
||||
public static final int ARM64_INS_RADDHN2 = 196;
|
||||
public static final int ARM64_INS_RADDHN = 197;
|
||||
public static final int ARM64_INS_RBIT = 198;
|
||||
public static final int ARM64_INS_RET = 199;
|
||||
public static final int ARM64_INS_REV16 = 200;
|
||||
public static final int ARM64_INS_REV32 = 201;
|
||||
public static final int ARM64_INS_REV = 202;
|
||||
public static final int ARM64_INS_ROR = 203;
|
||||
public static final int ARM64_INS_RSHRN2 = 204;
|
||||
public static final int ARM64_INS_RSHRN = 205;
|
||||
public static final int ARM64_INS_RSUBHN2 = 206;
|
||||
public static final int ARM64_INS_RSUBHN = 207;
|
||||
public static final int ARM64_INS_SABAL2 = 208;
|
||||
public static final int ARM64_INS_SABAL = 209;
|
||||
public static final int ARM64_INS_SABA = 210;
|
||||
public static final int ARM64_INS_SABDL2 = 211;
|
||||
public static final int ARM64_INS_SABDL = 212;
|
||||
public static final int ARM64_INS_SABD = 213;
|
||||
public static final int ARM64_INS_SADDL2 = 214;
|
||||
public static final int ARM64_INS_SADDL = 215;
|
||||
public static final int ARM64_INS_SADDW2 = 216;
|
||||
public static final int ARM64_INS_SADDW = 217;
|
||||
public static final int ARM64_INS_SBC = 218;
|
||||
public static final int ARM64_INS_SBFIZ = 219;
|
||||
public static final int ARM64_INS_SBFM = 220;
|
||||
public static final int ARM64_INS_SBFX = 221;
|
||||
public static final int ARM64_INS_SCVTF = 222;
|
||||
public static final int ARM64_INS_SDIV = 223;
|
||||
public static final int ARM64_INS_SHADD = 224;
|
||||
public static final int ARM64_INS_SHL = 225;
|
||||
public static final int ARM64_INS_SHRN2 = 226;
|
||||
public static final int ARM64_INS_SHRN = 227;
|
||||
public static final int ARM64_INS_SHSUB = 228;
|
||||
public static final int ARM64_INS_SLI = 229;
|
||||
public static final int ARM64_INS_SMADDL = 230;
|
||||
public static final int ARM64_INS_SMAXP = 231;
|
||||
public static final int ARM64_INS_SMAX = 232;
|
||||
public static final int ARM64_INS_SMC = 233;
|
||||
public static final int ARM64_INS_SMINP = 234;
|
||||
public static final int ARM64_INS_SMIN = 235;
|
||||
public static final int ARM64_INS_SMLAL2 = 236;
|
||||
public static final int ARM64_INS_SMLAL = 237;
|
||||
public static final int ARM64_INS_SMLSL2 = 238;
|
||||
public static final int ARM64_INS_SMLSL = 239;
|
||||
public static final int ARM64_INS_SMOV = 240;
|
||||
public static final int ARM64_INS_SMSUBL = 241;
|
||||
public static final int ARM64_INS_SMULH = 242;
|
||||
public static final int ARM64_INS_SMULL2 = 243;
|
||||
public static final int ARM64_INS_SMULL = 244;
|
||||
public static final int ARM64_INS_SQADD = 245;
|
||||
public static final int ARM64_INS_SQDMLAL2 = 246;
|
||||
public static final int ARM64_INS_SQDMLAL = 247;
|
||||
public static final int ARM64_INS_SQDMLSL2 = 248;
|
||||
public static final int ARM64_INS_SQDMLSL = 249;
|
||||
public static final int ARM64_INS_SQDMULH = 250;
|
||||
public static final int ARM64_INS_SQDMULL2 = 251;
|
||||
public static final int ARM64_INS_SQDMULL = 252;
|
||||
public static final int ARM64_INS_SQRDMULH = 253;
|
||||
public static final int ARM64_INS_SQRSHL = 254;
|
||||
public static final int ARM64_INS_SQRSHRN2 = 255;
|
||||
public static final int ARM64_INS_SQRSHRN = 256;
|
||||
public static final int ARM64_INS_SQSHLU = 257;
|
||||
public static final int ARM64_INS_SQSHL = 258;
|
||||
public static final int ARM64_INS_SQSHRN2 = 259;
|
||||
public static final int ARM64_INS_SQSHRN = 260;
|
||||
public static final int ARM64_INS_SQSUB = 261;
|
||||
public static final int ARM64_INS_SRHADD = 262;
|
||||
public static final int ARM64_INS_SRI = 263;
|
||||
public static final int ARM64_INS_SRSHL = 264;
|
||||
public static final int ARM64_INS_SRSHR = 265;
|
||||
public static final int ARM64_INS_SRSRA = 266;
|
||||
public static final int ARM64_INS_SSHLL2 = 267;
|
||||
public static final int ARM64_INS_SSHLL = 268;
|
||||
public static final int ARM64_INS_SSHL = 269;
|
||||
public static final int ARM64_INS_SSHR = 270;
|
||||
public static final int ARM64_INS_SSRA = 271;
|
||||
public static final int ARM64_INS_SSUBL2 = 272;
|
||||
public static final int ARM64_INS_SSUBL = 273;
|
||||
public static final int ARM64_INS_SSUBW2 = 274;
|
||||
public static final int ARM64_INS_SSUBW = 275;
|
||||
public static final int ARM64_INS_STLRB = 276;
|
||||
public static final int ARM64_INS_STLR = 277;
|
||||
public static final int ARM64_INS_STLRH = 278;
|
||||
public static final int ARM64_INS_STLXP = 279;
|
||||
public static final int ARM64_INS_STLXRB = 280;
|
||||
public static final int ARM64_INS_STLXR = 281;
|
||||
public static final int ARM64_INS_STLXRH = 282;
|
||||
public static final int ARM64_INS_STXP = 283;
|
||||
public static final int ARM64_INS_STXRB = 284;
|
||||
public static final int ARM64_INS_STXR = 285;
|
||||
public static final int ARM64_INS_STXRH = 286;
|
||||
public static final int ARM64_INS_SUBHN2 = 287;
|
||||
public static final int ARM64_INS_SUBHN = 288;
|
||||
public static final int ARM64_INS_SUB = 289;
|
||||
public static final int ARM64_INS_SVC = 290;
|
||||
public static final int ARM64_INS_SXTB = 291;
|
||||
public static final int ARM64_INS_SXTH = 292;
|
||||
public static final int ARM64_INS_SXTW = 293;
|
||||
public static final int ARM64_INS_SYSL = 294;
|
||||
public static final int ARM64_INS_SYS = 295;
|
||||
public static final int ARM64_INS_TBNZ = 296;
|
||||
public static final int ARM64_INS_TBZ = 297;
|
||||
public static final int ARM64_INS_TLBI = 298;
|
||||
public static final int ARM64_INS_TST = 299;
|
||||
public static final int ARM64_INS_UABAL2 = 300;
|
||||
public static final int ARM64_INS_UABAL = 301;
|
||||
public static final int ARM64_INS_UABA = 302;
|
||||
public static final int ARM64_INS_UABDL2 = 303;
|
||||
public static final int ARM64_INS_UABDL = 304;
|
||||
public static final int ARM64_INS_UABD = 305;
|
||||
public static final int ARM64_INS_UADDL2 = 306;
|
||||
public static final int ARM64_INS_UADDL = 307;
|
||||
public static final int ARM64_INS_UADDW2 = 308;
|
||||
public static final int ARM64_INS_UADDW = 309;
|
||||
public static final int ARM64_INS_UBFIZ = 310;
|
||||
public static final int ARM64_INS_UBFM = 311;
|
||||
public static final int ARM64_INS_UBFX = 312;
|
||||
public static final int ARM64_INS_UCVTF = 313;
|
||||
public static final int ARM64_INS_UDIV = 314;
|
||||
public static final int ARM64_INS_UHADD = 315;
|
||||
public static final int ARM64_INS_UHSUB = 316;
|
||||
public static final int ARM64_INS_UMADDL = 317;
|
||||
public static final int ARM64_INS_UMAXP = 318;
|
||||
public static final int ARM64_INS_UMAX = 319;
|
||||
public static final int ARM64_INS_UMINP = 320;
|
||||
public static final int ARM64_INS_UMIN = 321;
|
||||
public static final int ARM64_INS_UMLAL2 = 322;
|
||||
public static final int ARM64_INS_UMLAL = 323;
|
||||
public static final int ARM64_INS_UMLSL2 = 324;
|
||||
public static final int ARM64_INS_UMLSL = 325;
|
||||
public static final int ARM64_INS_UMOV = 326;
|
||||
public static final int ARM64_INS_UMSUBL = 327;
|
||||
public static final int ARM64_INS_UMULH = 328;
|
||||
public static final int ARM64_INS_UMULL2 = 329;
|
||||
public static final int ARM64_INS_UMULL = 330;
|
||||
public static final int ARM64_INS_UQADD = 331;
|
||||
public static final int ARM64_INS_UQRSHL = 332;
|
||||
public static final int ARM64_INS_UQRSHRN2 = 333;
|
||||
public static final int ARM64_INS_UQRSHRN = 334;
|
||||
public static final int ARM64_INS_UQSHL = 335;
|
||||
public static final int ARM64_INS_UQSHRN2 = 336;
|
||||
public static final int ARM64_INS_UQSHRN = 337;
|
||||
public static final int ARM64_INS_UQSUB = 338;
|
||||
public static final int ARM64_INS_URHADD = 339;
|
||||
public static final int ARM64_INS_URSHL = 340;
|
||||
public static final int ARM64_INS_URSHR = 341;
|
||||
public static final int ARM64_INS_URSRA = 342;
|
||||
public static final int ARM64_INS_USHLL2 = 343;
|
||||
public static final int ARM64_INS_USHLL = 344;
|
||||
public static final int ARM64_INS_USHL = 345;
|
||||
public static final int ARM64_INS_USHR = 346;
|
||||
public static final int ARM64_INS_USRA = 347;
|
||||
public static final int ARM64_INS_USUBL2 = 348;
|
||||
public static final int ARM64_INS_USUBL = 349;
|
||||
public static final int ARM64_INS_USUBW2 = 350;
|
||||
public static final int ARM64_INS_USUBW = 351;
|
||||
public static final int ARM64_INS_UXTB = 352;
|
||||
public static final int ARM64_INS_UXTH = 353;
|
||||
|
||||
// ARM64 group of instructions
|
||||
public static final int ARM64_GRP_INVALID = 0;
|
||||
public static final int ARM64_GRP_NEON = 1;
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,195 @@
|
|||
// Capstone Java binding
|
||||
// By Nguyen Anh Quynh & Dang Hoang Vu, 2013
|
||||
|
||||
import com.sun.jna.Library;
|
||||
import com.sun.jna.Native;
|
||||
import com.sun.jna.Structure;
|
||||
import com.sun.jna.Union;
|
||||
import com.sun.jna.ptr.LongByReference;
|
||||
import com.sun.jna.Pointer;
|
||||
import com.sun.jna.ptr.PointerByReference;
|
||||
|
||||
import java.util.List;
|
||||
import java.util.Arrays;
|
||||
import java.lang.RuntimeException;
|
||||
|
||||
class Capstone {
|
||||
|
||||
public int arch;
|
||||
public int mode;
|
||||
|
||||
public static class OpInfo {
|
||||
public int cc;
|
||||
public boolean update_flags;
|
||||
public boolean writeback;
|
||||
}
|
||||
|
||||
public class cs_insn {
|
||||
/*
|
||||
== total size: 1728
|
||||
@id: 0
|
||||
@address: 8
|
||||
@size: 16
|
||||
@mnemonic: 18
|
||||
@operands: 50
|
||||
@regs_read: 148
|
||||
@regs_write: 276
|
||||
@groups: 404
|
||||
@arch: 440
|
||||
*/
|
||||
public int id;
|
||||
public long address;
|
||||
public short size;
|
||||
public String mnemonic;
|
||||
public String operands;
|
||||
public int[] regs_read;
|
||||
public int[] regs_write;
|
||||
public int[] groups;
|
||||
|
||||
public OpInfo op_info;
|
||||
|
||||
Pointer ptr_cs_ins;
|
||||
long handleval;
|
||||
|
||||
public int op_count(int type) {
|
||||
return cs.cs_op_count(handleval, ptr_cs_ins, type);
|
||||
}
|
||||
|
||||
public int op_index(int type, int index) {
|
||||
return cs.cs_op_index(handleval, ptr_cs_ins, type, index);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
private cs_insn fromPointer(Pointer pointer)
|
||||
{
|
||||
cs_insn insn = new cs_insn();
|
||||
|
||||
insn.id = pointer.getInt(0);
|
||||
|
||||
insn.address = pointer.getLong(8);
|
||||
|
||||
insn.size = pointer.getShort(16);
|
||||
|
||||
insn.mnemonic = pointer.getString(18);
|
||||
|
||||
insn.operands = pointer.getString(50);
|
||||
|
||||
insn.regs_read = pointer.getIntArray(148, 32);
|
||||
|
||||
insn.regs_write = pointer.getIntArray(276, 32);
|
||||
|
||||
insn.groups = pointer.getIntArray(404, 8);
|
||||
|
||||
switch (this.arch) {
|
||||
case CS_ARCH_ARM:
|
||||
insn.op_info = new Arm.OpInfo(pointer.share(440));
|
||||
break;
|
||||
case CS_ARCH_ARM64:
|
||||
insn.op_info = new Arm64.OpInfo(pointer.share(440));
|
||||
break;
|
||||
case CS_ARCH_MIPS:
|
||||
insn.op_info = new Mips.OpInfo(pointer.share(440));
|
||||
break;
|
||||
case CS_ARCH_X86:
|
||||
insn.op_info = new X86.OpInfo(pointer.share(440));
|
||||
break;
|
||||
default:
|
||||
insn.op_info = null;
|
||||
}
|
||||
|
||||
insn.ptr_cs_ins = pointer;
|
||||
insn.handleval = handle.getValue();
|
||||
|
||||
return insn;
|
||||
}
|
||||
|
||||
private cs_insn[] fromArrayPointer(Pointer pointer, int numberResults)
|
||||
{
|
||||
cs_insn[] arr = new cs_insn[numberResults];
|
||||
int offset = 0;
|
||||
|
||||
for (int i = 0; i < numberResults; i++) {
|
||||
arr[i] = fromPointer(pointer.share(offset));
|
||||
offset += 1728; // sizeof(cs_insn);
|
||||
}
|
||||
|
||||
return arr;
|
||||
}
|
||||
|
||||
private interface CS extends Library {
|
||||
public int cs_open(int arch, int mode, LongByReference handle);
|
||||
public long cs_disasm_dyn(long handle, byte[] code, long code_len,
|
||||
long addr, long count, PointerByReference insn);
|
||||
public void cs_free(Pointer p);
|
||||
public boolean cs_close(long handle);
|
||||
public String cs_reg_name(long csh, int id);
|
||||
public int cs_op_count(long csh, Pointer insn, int type);
|
||||
public int cs_op_index(long csh, Pointer insn, int type, int index);
|
||||
}
|
||||
|
||||
public static final int CS_ARCH_ARM = 0;
|
||||
public static final int CS_ARCH_ARM64 = 1;
|
||||
public static final int CS_ARCH_MIPS = 2;
|
||||
public static final int CS_ARCH_X86 = 3;
|
||||
|
||||
public static final int CS_MODE_LITTLE_ENDIAN = 0; // default mode
|
||||
public static final int CS_MODE_SYNTAX_INTEL = 0; // default X86 asm syntax (applicable for CS_ARCH_INTEL only)
|
||||
public static final int CS_MODE_ARM = 0; // 32-bit ARM
|
||||
public static final int CS_MODE_16 = 1 << 1;
|
||||
public static final int CS_MODE_32 = 1 << 2;
|
||||
public static final int CS_MODE_64 = 1 << 3;
|
||||
public static final int CS_MODE_THUMB = 1 << 4; // ARM's Thumb mode, including Thumb-2
|
||||
public static final int CS_MODE_SYNTAX_ATT = 1 << 30; // X86 ATT asm syntax (applicable for CS_ARCH_INTEL only)
|
||||
public static final int CS_MODE_BIG_ENDIAN = 1 << 31;
|
||||
|
||||
// capstone error
|
||||
public static final int CS_ERR_OK = 0;
|
||||
public static final int CS_ERR_MEM = 1; // Out-Of-Memory error
|
||||
public static final int CS_ERR_ARCH = 2; // Unsupported architecture
|
||||
public static final int CS_ERR_HANDLE = 3; // Invalid handle
|
||||
public static final int CS_ERR_CSH = 4; // Invalid csh argument
|
||||
public static final int CS_ERR_MODE = 5; // Invalid/unsupported mode
|
||||
|
||||
|
||||
private LongByReference handle;
|
||||
private PointerByReference insnRef;
|
||||
private CS cs;
|
||||
|
||||
Capstone(int arch, int mode)
|
||||
{
|
||||
this.arch = arch;
|
||||
this.mode = mode;
|
||||
cs = (CS)Native.loadLibrary("capstone", CS.class);
|
||||
handle = new LongByReference();
|
||||
if (cs.cs_open(arch, mode, handle) != CS_ERR_OK) {
|
||||
throw new RuntimeException("ERROR: Wrong arch or mode");
|
||||
}
|
||||
}
|
||||
|
||||
public String reg_name(int reg) {
|
||||
return cs.cs_reg_name(handle.getValue(), reg);
|
||||
}
|
||||
|
||||
protected void finalize()
|
||||
{
|
||||
cs.cs_close(handle.getValue());
|
||||
}
|
||||
|
||||
cs_insn[] disasm(byte[] code, long address)
|
||||
{
|
||||
return disasm(code, address, 0);
|
||||
}
|
||||
|
||||
cs_insn[] disasm(byte[] code, long address, long count)
|
||||
{
|
||||
insnRef = new PointerByReference();
|
||||
|
||||
long c = cs.cs_disasm_dyn(handle.getValue(), code, code.length, address, count, insnRef);
|
||||
|
||||
Pointer p = insnRef.getValue();
|
||||
cs_insn[] all_insn = fromArrayPointer(p, (int)c);
|
||||
return all_insn;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
# Capstone Disassembler Engine
|
||||
# By Nguyen Anh Quynh <aquynh@gmail.com>, 2013>
|
||||
|
||||
JNA = /usr/share/java/jna/jna.jar
|
||||
|
||||
all:
|
||||
javac -classpath $(JNA) CS.java Arm.java Arm64.java Mips.java X86.java Test.java TestArm.java TestArm64.java TestMips.java TestX86.java
|
||||
|
||||
clean:
|
||||
rm -rf *.class *.log
|
||||
|
|
@ -0,0 +1,725 @@
|
|||
// Capstone Java binding
|
||||
// By Nguyen Anh Quynh & Dang Hoang Vu, 2013
|
||||
|
||||
import com.sun.jna.Structure;
|
||||
import com.sun.jna.Pointer;
|
||||
import com.sun.jna.Union;
|
||||
import com.sun.jna.NativeLong;
|
||||
|
||||
import java.util.List;
|
||||
import java.util.Arrays;
|
||||
|
||||
class Mips {
|
||||
|
||||
// Operand type
|
||||
public static final int MIPS_OP_INVALID = 0; // Uninitialized.
|
||||
public static final int MIPS_OP_REG = 1; // Register operand.
|
||||
public static final int MIPS_OP_IMM = 2; // Immediate operand.
|
||||
public static final int MIPS_OP_MEM = 3; // Memory operand
|
||||
|
||||
public static class MemType extends Structure {
|
||||
public int base;
|
||||
public long disp;
|
||||
|
||||
@Override
|
||||
public List getFieldOrder() {
|
||||
return Arrays.asList("base", "disp");
|
||||
}
|
||||
}
|
||||
|
||||
public static class OpValue extends Union implements Union.ByReference {
|
||||
public int reg;
|
||||
public long imm;
|
||||
public MemType mem;
|
||||
|
||||
public OpValue(Pointer p) {
|
||||
super(p);
|
||||
read();
|
||||
}
|
||||
|
||||
@Override
|
||||
public List getFieldOrder() {
|
||||
return Arrays.asList("reg", "imm", "mem");
|
||||
}
|
||||
}
|
||||
|
||||
public static class Operand extends Structure {
|
||||
public int type;
|
||||
public OpValue value;
|
||||
|
||||
@Override
|
||||
public List getFieldOrder() {
|
||||
return Arrays.asList("type", "value");
|
||||
}
|
||||
}
|
||||
|
||||
public static class OpInfo extends Capstone.OpInfo {
|
||||
|
||||
public Operand [] op;
|
||||
|
||||
public OpInfo(Pointer p) {
|
||||
int op_count = p.getShort(0);
|
||||
if (op_count == 0) {
|
||||
op = null;
|
||||
return;
|
||||
}
|
||||
|
||||
op = new Operand[op_count];
|
||||
for (int i=0; i<op_count; i++) {
|
||||
Pointer p1 = p.share(i*24);
|
||||
op[i] = new Operand();
|
||||
op[i].type = p1.getInt(8);
|
||||
op[i].value = new OpValue(p1.share(16));
|
||||
if (op[i].type == MIPS_OP_MEM) {
|
||||
op[i].value.setType(MemType.class);
|
||||
op[i].value.read();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// MIPS registers
|
||||
public static final int MIPS_REG_INVALID = 0;
|
||||
public static final int MIPS_REG_0 = 1;
|
||||
public static final int MIPS_REG_ZERO = MIPS_REG_0;
|
||||
public static final int MIPS_REG_1 = 2;
|
||||
public static final int MIPS_REG_AT = MIPS_REG_1;
|
||||
public static final int MIPS_REG_2 = 3;
|
||||
public static final int MIPS_REG_V0 = MIPS_REG_2;
|
||||
public static final int MIPS_REG_3 = 4;
|
||||
public static final int MIPS_REG_V1 = MIPS_REG_3;
|
||||
public static final int MIPS_REG_4 = 5;
|
||||
public static final int MIPS_REG_A0 = MIPS_REG_4;
|
||||
public static final int MIPS_REG_5 = 6;
|
||||
public static final int MIPS_REG_A1 = MIPS_REG_5;
|
||||
public static final int MIPS_REG_6 = 7;
|
||||
public static final int MIPS_REG_A2 = MIPS_REG_6;
|
||||
public static final int MIPS_REG_7 = 8;
|
||||
public static final int MIPS_REG_A3 = MIPS_REG_7;
|
||||
public static final int MIPS_REG_8 = 9;
|
||||
public static final int MIPS_REG_T0 = MIPS_REG_8;
|
||||
public static final int MIPS_REG_9 = 10;
|
||||
public static final int MIPS_REG_T1 = MIPS_REG_9;
|
||||
public static final int MIPS_REG_10 = 11;
|
||||
public static final int MIPS_REG_T2 = MIPS_REG_10;
|
||||
public static final int MIPS_REG_11 = 12;
|
||||
public static final int MIPS_REG_T3 = MIPS_REG_11;
|
||||
public static final int MIPS_REG_12 = 13;
|
||||
public static final int MIPS_REG_T4 = MIPS_REG_12;
|
||||
public static final int MIPS_REG_13 = 14;
|
||||
public static final int MIPS_REG_T5 = MIPS_REG_13;
|
||||
public static final int MIPS_REG_14 = 15;
|
||||
public static final int MIPS_REG_T6 = MIPS_REG_14;
|
||||
public static final int MIPS_REG_15 = 16;
|
||||
public static final int MIPS_REG_T7 = MIPS_REG_15;
|
||||
public static final int MIPS_REG_16 = 17;
|
||||
public static final int MIPS_REG_S0 = MIPS_REG_16;
|
||||
public static final int MIPS_REG_17 = 18;
|
||||
public static final int MIPS_REG_S1 = MIPS_REG_17;
|
||||
public static final int MIPS_REG_18 = 19;
|
||||
public static final int MIPS_REG_S2 = MIPS_REG_18;
|
||||
public static final int MIPS_REG_19 = 20;
|
||||
public static final int MIPS_REG_S3 = MIPS_REG_19;
|
||||
public static final int MIPS_REG_20 = 21;
|
||||
public static final int MIPS_REG_S4 = MIPS_REG_20;
|
||||
public static final int MIPS_REG_21 = 22;
|
||||
public static final int MIPS_REG_S5 = MIPS_REG_21;
|
||||
public static final int MIPS_REG_22 = 23;
|
||||
public static final int MIPS_REG_S6 = MIPS_REG_22;
|
||||
public static final int MIPS_REG_23 = 24;
|
||||
public static final int MIPS_REG_S7 = MIPS_REG_23;
|
||||
public static final int MIPS_REG_24 = 25;
|
||||
public static final int MIPS_REG_T8 = MIPS_REG_24;
|
||||
public static final int MIPS_REG_25 = 26;
|
||||
public static final int MIPS_REG_T9 = MIPS_REG_25;
|
||||
public static final int MIPS_REG_26 = 27;
|
||||
public static final int MIPS_REG_K0 = MIPS_REG_26;
|
||||
public static final int MIPS_REG_27 = 28;
|
||||
public static final int MIPS_REG_K1 = MIPS_REG_27;
|
||||
public static final int MIPS_REG_28 = 29;
|
||||
public static final int MIPS_REG_GP = MIPS_REG_28;
|
||||
public static final int MIPS_REG_29 = 30;
|
||||
public static final int MIPS_REG_SP = MIPS_REG_29;
|
||||
public static final int MIPS_REG_30 = 31;
|
||||
public static final int MIPS_REG_FP = MIPS_REG_30;
|
||||
public static final int MIPS_REG_S8 = MIPS_REG_30;
|
||||
public static final int MIPS_REG_31 = 32;
|
||||
public static final int MIPS_REG_RA = MIPS_REG_31;
|
||||
public static final int MIPS_REG_DSPCCOND = 33;
|
||||
public static final int MIPS_REG_DSPCARRY = 34;
|
||||
public static final int MIPS_REG_DSPEFI = 35;
|
||||
public static final int MIPS_REG_DSPOUTFLAG = 36;
|
||||
public static final int MIPS_REG_DSPOUTFLAG16_19 = 37;
|
||||
public static final int MIPS_REG_DSPOUTFLAG20 = 38;
|
||||
public static final int MIPS_REG_DSPOUTFLAG21 = 39;
|
||||
public static final int MIPS_REG_DSPOUTFLAG22 = 40;
|
||||
public static final int MIPS_REG_DSPOUTFLAG23 = 41;
|
||||
public static final int MIPS_REG_DSPPOS = 42;
|
||||
public static final int MIPS_REG_DSPSCOUNT = 43;
|
||||
public static final int MIPS_REG_AC0 = 44;
|
||||
public static final int MIPS_REG_HI0 = MIPS_REG_AC0;
|
||||
public static final int MIPS_REG_AC1 = 45;
|
||||
public static final int MIPS_REG_HI1 = MIPS_REG_AC1;
|
||||
public static final int MIPS_REG_AC2 = 46;
|
||||
public static final int MIPS_REG_HI2 = MIPS_REG_AC2;
|
||||
public static final int MIPS_REG_AC3 = 47;
|
||||
public static final int MIPS_REG_HI3 = MIPS_REG_AC3;
|
||||
public static final int MIPS_REG_LO0 = MIPS_REG_HI0;
|
||||
public static final int MIPS_REG_LO1 = MIPS_REG_HI1;
|
||||
public static final int MIPS_REG_LO2 = MIPS_REG_HI2;
|
||||
public static final int MIPS_REG_LO3 = MIPS_REG_HI3;
|
||||
public static final int MIPS_REG_F0 = 48;
|
||||
public static final int MIPS_REG_F1 = 49;
|
||||
public static final int MIPS_REG_F2 = 50;
|
||||
public static final int MIPS_REG_F3 = 51;
|
||||
public static final int MIPS_REG_F4 = 52;
|
||||
public static final int MIPS_REG_F5 = 53;
|
||||
public static final int MIPS_REG_F6 = 54;
|
||||
public static final int MIPS_REG_F7 = 55;
|
||||
public static final int MIPS_REG_F8 = 56;
|
||||
public static final int MIPS_REG_F9 = 57;
|
||||
public static final int MIPS_REG_F10 = 58;
|
||||
public static final int MIPS_REG_F11 = 59;
|
||||
public static final int MIPS_REG_F12 = 60;
|
||||
public static final int MIPS_REG_F13 = 61;
|
||||
public static final int MIPS_REG_F14 = 62;
|
||||
public static final int MIPS_REG_F15 = 63;
|
||||
public static final int MIPS_REG_F16 = 64;
|
||||
public static final int MIPS_REG_F17 = 65;
|
||||
public static final int MIPS_REG_F18 = 66;
|
||||
public static final int MIPS_REG_F19 = 67;
|
||||
public static final int MIPS_REG_F20 = 68;
|
||||
public static final int MIPS_REG_F21 = 69;
|
||||
public static final int MIPS_REG_F22 = 70;
|
||||
public static final int MIPS_REG_F23 = 71;
|
||||
public static final int MIPS_REG_F24 = 72;
|
||||
public static final int MIPS_REG_F25 = 73;
|
||||
public static final int MIPS_REG_F26 = 74;
|
||||
public static final int MIPS_REG_F27 = 75;
|
||||
public static final int MIPS_REG_F28 = 76;
|
||||
public static final int MIPS_REG_F29 = 77;
|
||||
public static final int MIPS_REG_F30 = 78;
|
||||
public static final int MIPS_REG_F31 = 79;
|
||||
public static final int MIPS_REG_FCC0 = 80;
|
||||
public static final int MIPS_REG_FCC1 = 81;
|
||||
public static final int MIPS_REG_FCC2 = 82;
|
||||
public static final int MIPS_REG_FCC3 = 83;
|
||||
public static final int MIPS_REG_FCC4 = 84;
|
||||
public static final int MIPS_REG_FCC5 = 85;
|
||||
public static final int MIPS_REG_FCC6 = 86;
|
||||
public static final int MIPS_REG_FCC7 = 87;
|
||||
public static final int MIPS_REG_W0 = 88;
|
||||
public static final int MIPS_REG_W1 = 89;
|
||||
public static final int MIPS_REG_W2 = 90;
|
||||
public static final int MIPS_REG_W3 = 91;
|
||||
public static final int MIPS_REG_W4 = 92;
|
||||
public static final int MIPS_REG_W5 = 93;
|
||||
public static final int MIPS_REG_W6 = 94;
|
||||
public static final int MIPS_REG_W7 = 95;
|
||||
public static final int MIPS_REG_W8 = 96;
|
||||
public static final int MIPS_REG_W9 = 97;
|
||||
public static final int MIPS_REG_W10 = 98;
|
||||
public static final int MIPS_REG_W11 = 99;
|
||||
public static final int MIPS_REG_W12 = 100;
|
||||
public static final int MIPS_REG_W13 = 101;
|
||||
public static final int MIPS_REG_W14 = 102;
|
||||
public static final int MIPS_REG_W15 = 103;
|
||||
public static final int MIPS_REG_W16 = 104;
|
||||
public static final int MIPS_REG_W17 = 105;
|
||||
public static final int MIPS_REG_W18 = 106;
|
||||
public static final int MIPS_REG_W19 = 107;
|
||||
public static final int MIPS_REG_W20 = 108;
|
||||
public static final int MIPS_REG_W21 = 109;
|
||||
public static final int MIPS_REG_W22 = 110;
|
||||
public static final int MIPS_REG_W23 = 111;
|
||||
public static final int MIPS_REG_W24 = 112;
|
||||
public static final int MIPS_REG_W25 = 113;
|
||||
public static final int MIPS_REG_W26 = 114;
|
||||
public static final int MIPS_REG_W27 = 115;
|
||||
public static final int MIPS_REG_W28 = 116;
|
||||
public static final int MIPS_REG_W29 = 117;
|
||||
public static final int MIPS_REG_W30 = 118;
|
||||
public static final int MIPS_REG_W31 = 119;
|
||||
public static final int MIPS_REG_MAX = 120;
|
||||
|
||||
// MIPS instructions
|
||||
public static final int MIPS_INS_INVALID = 0;
|
||||
public static final int MIPS_INS_ABSQ_S = 1;
|
||||
public static final int MIPS_INS_ADD = 2;
|
||||
public static final int MIPS_INS_ADDQH = 3;
|
||||
public static final int MIPS_INS_ADDQH_R = 4;
|
||||
public static final int MIPS_INS_ADDQ = 5;
|
||||
public static final int MIPS_INS_ADDQ_S = 6;
|
||||
public static final int MIPS_INS_ADDSC = 7;
|
||||
public static final int MIPS_INS_ADDS_A = 8;
|
||||
public static final int MIPS_INS_ADDS_S = 9;
|
||||
public static final int MIPS_INS_ADDS_U = 10;
|
||||
public static final int MIPS_INS_ADDUH = 11;
|
||||
public static final int MIPS_INS_ADDUH_R = 12;
|
||||
public static final int MIPS_INS_ADDU = 13;
|
||||
public static final int MIPS_INS_ADDU_S = 14;
|
||||
public static final int MIPS_INS_ADDVI = 15;
|
||||
public static final int MIPS_INS_ADDV = 16;
|
||||
public static final int MIPS_INS_ADDWC = 17;
|
||||
public static final int MIPS_INS_ADD_A = 18;
|
||||
public static final int MIPS_INS_ADDI = 19;
|
||||
public static final int MIPS_INS_ADDIU = 20;
|
||||
public static final int MIPS_INS_AND = 21;
|
||||
public static final int MIPS_INS_ANDI = 22;
|
||||
public static final int MIPS_INS_APPEND = 23;
|
||||
public static final int MIPS_INS_ASUB_S = 24;
|
||||
public static final int MIPS_INS_ASUB_U = 25;
|
||||
public static final int MIPS_INS_AVER_S = 26;
|
||||
public static final int MIPS_INS_AVER_U = 27;
|
||||
public static final int MIPS_INS_AVE_S = 28;
|
||||
public static final int MIPS_INS_AVE_U = 29;
|
||||
public static final int MIPS_INS_BALIGN = 30;
|
||||
public static final int MIPS_INS_BC1F = 31;
|
||||
public static final int MIPS_INS_BC1T = 32;
|
||||
public static final int MIPS_INS_BCLRI = 33;
|
||||
public static final int MIPS_INS_BCLR = 34;
|
||||
public static final int MIPS_INS_BEQ = 35;
|
||||
public static final int MIPS_INS_BGEZ = 36;
|
||||
public static final int MIPS_INS_BGEZAL = 37;
|
||||
public static final int MIPS_INS_BGTZ = 38;
|
||||
public static final int MIPS_INS_BINSLI = 39;
|
||||
public static final int MIPS_INS_BINSL = 40;
|
||||
public static final int MIPS_INS_BINSRI = 41;
|
||||
public static final int MIPS_INS_BINSR = 42;
|
||||
public static final int MIPS_INS_BITREV = 43;
|
||||
public static final int MIPS_INS_BLEZ = 44;
|
||||
public static final int MIPS_INS_BLTZ = 45;
|
||||
public static final int MIPS_INS_BLTZAL = 46;
|
||||
public static final int MIPS_INS_BMNZI = 47;
|
||||
public static final int MIPS_INS_BMNZ = 48;
|
||||
public static final int MIPS_INS_BMZI = 49;
|
||||
public static final int MIPS_INS_BMZ = 50;
|
||||
public static final int MIPS_INS_BNE = 51;
|
||||
public static final int MIPS_INS_BNEGI = 52;
|
||||
public static final int MIPS_INS_BNEG = 53;
|
||||
public static final int MIPS_INS_BNZ = 54;
|
||||
public static final int MIPS_INS_BPOSGE32 = 55;
|
||||
public static final int MIPS_INS_BREAK = 56;
|
||||
public static final int MIPS_INS_BSELI = 57;
|
||||
public static final int MIPS_INS_BSEL = 58;
|
||||
public static final int MIPS_INS_BSETI = 59;
|
||||
public static final int MIPS_INS_BSET = 60;
|
||||
public static final int MIPS_INS_BZ = 61;
|
||||
public static final int MIPS_INS_BEQZ = 62;
|
||||
public static final int MIPS_INS_B = 63;
|
||||
public static final int MIPS_INS_BNEZ = 64;
|
||||
public static final int MIPS_INS_BTEQZ = 65;
|
||||
public static final int MIPS_INS_BTNEZ = 66;
|
||||
public static final int MIPS_INS_CEIL = 67;
|
||||
public static final int MIPS_INS_CEQI = 68;
|
||||
public static final int MIPS_INS_CEQ = 69;
|
||||
public static final int MIPS_INS_CFC1 = 70;
|
||||
public static final int MIPS_INS_CFCMSA = 71;
|
||||
public static final int MIPS_INS_CLEI_S = 72;
|
||||
public static final int MIPS_INS_CLEI_U = 73;
|
||||
public static final int MIPS_INS_CLE_S = 74;
|
||||
public static final int MIPS_INS_CLE_U = 75;
|
||||
public static final int MIPS_INS_CLO = 76;
|
||||
public static final int MIPS_INS_CLTI_S = 77;
|
||||
public static final int MIPS_INS_CLTI_U = 78;
|
||||
public static final int MIPS_INS_CLT_S = 79;
|
||||
public static final int MIPS_INS_CLT_U = 80;
|
||||
public static final int MIPS_INS_CLZ = 81;
|
||||
public static final int MIPS_INS_CMPGDU = 82;
|
||||
public static final int MIPS_INS_CMPGU = 83;
|
||||
public static final int MIPS_INS_CMPU = 84;
|
||||
public static final int MIPS_INS_CMP = 85;
|
||||
public static final int MIPS_INS_COPY_S = 86;
|
||||
public static final int MIPS_INS_COPY_U = 87;
|
||||
public static final int MIPS_INS_CTC1 = 88;
|
||||
public static final int MIPS_INS_CTCMSA = 89;
|
||||
public static final int MIPS_INS_CVT = 90;
|
||||
public static final int MIPS_INS_C = 91;
|
||||
public static final int MIPS_INS_CMPI = 92;
|
||||
public static final int MIPS_INS_DADD = 93;
|
||||
public static final int MIPS_INS_DADDI = 94;
|
||||
public static final int MIPS_INS_DADDIU = 95;
|
||||
public static final int MIPS_INS_DADDU = 96;
|
||||
public static final int MIPS_INS_DCLO = 97;
|
||||
public static final int MIPS_INS_DCLZ = 98;
|
||||
public static final int MIPS_INS_DERET = 99;
|
||||
public static final int MIPS_INS_DEXT = 100;
|
||||
public static final int MIPS_INS_DEXTM = 101;
|
||||
public static final int MIPS_INS_DEXTU = 102;
|
||||
public static final int MIPS_INS_DI = 103;
|
||||
public static final int MIPS_INS_DINS = 104;
|
||||
public static final int MIPS_INS_DINSM = 105;
|
||||
public static final int MIPS_INS_DINSU = 106;
|
||||
public static final int MIPS_INS_DIV_S = 107;
|
||||
public static final int MIPS_INS_DIV_U = 108;
|
||||
public static final int MIPS_INS_DMFC0 = 109;
|
||||
public static final int MIPS_INS_DMFC1 = 110;
|
||||
public static final int MIPS_INS_DMFC2 = 111;
|
||||
public static final int MIPS_INS_DMTC0 = 112;
|
||||
public static final int MIPS_INS_DMTC1 = 113;
|
||||
public static final int MIPS_INS_DMTC2 = 114;
|
||||
public static final int MIPS_INS_DMULT = 115;
|
||||
public static final int MIPS_INS_DMULTU = 116;
|
||||
public static final int MIPS_INS_DOTP_S = 117;
|
||||
public static final int MIPS_INS_DOTP_U = 118;
|
||||
public static final int MIPS_INS_DPADD_S = 119;
|
||||
public static final int MIPS_INS_DPADD_U = 120;
|
||||
public static final int MIPS_INS_DPAQX_SA = 121;
|
||||
public static final int MIPS_INS_DPAQX_S = 122;
|
||||
public static final int MIPS_INS_DPAQ_SA = 123;
|
||||
public static final int MIPS_INS_DPAQ_S = 124;
|
||||
public static final int MIPS_INS_DPAU = 125;
|
||||
public static final int MIPS_INS_DPAX = 126;
|
||||
public static final int MIPS_INS_DPA = 127;
|
||||
public static final int MIPS_INS_DPSQX_SA = 128;
|
||||
public static final int MIPS_INS_DPSQX_S = 129;
|
||||
public static final int MIPS_INS_DPSQ_SA = 130;
|
||||
public static final int MIPS_INS_DPSQ_S = 131;
|
||||
public static final int MIPS_INS_DPSUB_S = 132;
|
||||
public static final int MIPS_INS_DPSUB_U = 133;
|
||||
public static final int MIPS_INS_DPSU = 134;
|
||||
public static final int MIPS_INS_DPSX = 135;
|
||||
public static final int MIPS_INS_DPS = 136;
|
||||
public static final int MIPS_INS_DROTR = 137;
|
||||
public static final int MIPS_INS_DROTR32 = 138;
|
||||
public static final int MIPS_INS_DROTRV = 139;
|
||||
public static final int MIPS_INS_DSBH = 140;
|
||||
public static final int MIPS_INS_DDIV = 141;
|
||||
public static final int MIPS_INS_DSHD = 142;
|
||||
public static final int MIPS_INS_DSLL = 143;
|
||||
public static final int MIPS_INS_DSLL32 = 144;
|
||||
public static final int MIPS_INS_DSLLV = 145;
|
||||
public static final int MIPS_INS_DSRA = 146;
|
||||
public static final int MIPS_INS_DSRA32 = 147;
|
||||
public static final int MIPS_INS_DSRAV = 148;
|
||||
public static final int MIPS_INS_DSRL = 149;
|
||||
public static final int MIPS_INS_DSRL32 = 150;
|
||||
public static final int MIPS_INS_DSRLV = 151;
|
||||
public static final int MIPS_INS_DSUBU = 152;
|
||||
public static final int MIPS_INS_DDIVU = 153;
|
||||
public static final int MIPS_INS_DIV = 154;
|
||||
public static final int MIPS_INS_DIVU = 155;
|
||||
public static final int MIPS_INS_EI = 156;
|
||||
public static final int MIPS_INS_ERET = 157;
|
||||
public static final int MIPS_INS_EXT = 158;
|
||||
public static final int MIPS_INS_EXTP = 159;
|
||||
public static final int MIPS_INS_EXTPDP = 160;
|
||||
public static final int MIPS_INS_EXTPDPV = 161;
|
||||
public static final int MIPS_INS_EXTPV = 162;
|
||||
public static final int MIPS_INS_EXTRV_RS = 163;
|
||||
public static final int MIPS_INS_EXTRV_R = 164;
|
||||
public static final int MIPS_INS_EXTRV_S = 165;
|
||||
public static final int MIPS_INS_EXTRV = 166;
|
||||
public static final int MIPS_INS_EXTR_RS = 167;
|
||||
public static final int MIPS_INS_EXTR_R = 168;
|
||||
public static final int MIPS_INS_EXTR_S = 169;
|
||||
public static final int MIPS_INS_EXTR = 170;
|
||||
public static final int MIPS_INS_ABS = 171;
|
||||
public static final int MIPS_INS_FADD = 172;
|
||||
public static final int MIPS_INS_FCAF = 173;
|
||||
public static final int MIPS_INS_FCEQ = 174;
|
||||
public static final int MIPS_INS_FCLASS = 175;
|
||||
public static final int MIPS_INS_FCLE = 176;
|
||||
public static final int MIPS_INS_FCLT = 177;
|
||||
public static final int MIPS_INS_FCNE = 178;
|
||||
public static final int MIPS_INS_FCOR = 179;
|
||||
public static final int MIPS_INS_FCUEQ = 180;
|
||||
public static final int MIPS_INS_FCULE = 181;
|
||||
public static final int MIPS_INS_FCULT = 182;
|
||||
public static final int MIPS_INS_FCUNE = 183;
|
||||
public static final int MIPS_INS_FCUN = 184;
|
||||
public static final int MIPS_INS_FDIV = 185;
|
||||
public static final int MIPS_INS_FEXDO = 186;
|
||||
public static final int MIPS_INS_FEXP2 = 187;
|
||||
public static final int MIPS_INS_FEXUPL = 188;
|
||||
public static final int MIPS_INS_FEXUPR = 189;
|
||||
public static final int MIPS_INS_FFINT_S = 190;
|
||||
public static final int MIPS_INS_FFINT_U = 191;
|
||||
public static final int MIPS_INS_FFQL = 192;
|
||||
public static final int MIPS_INS_FFQR = 193;
|
||||
public static final int MIPS_INS_FILL = 194;
|
||||
public static final int MIPS_INS_FLOG2 = 195;
|
||||
public static final int MIPS_INS_FLOOR = 196;
|
||||
public static final int MIPS_INS_FMADD = 197;
|
||||
public static final int MIPS_INS_FMAX_A = 198;
|
||||
public static final int MIPS_INS_FMAX = 199;
|
||||
public static final int MIPS_INS_FMIN_A = 200;
|
||||
public static final int MIPS_INS_FMIN = 201;
|
||||
public static final int MIPS_INS_MOV = 202;
|
||||
public static final int MIPS_INS_FMSUB = 203;
|
||||
public static final int MIPS_INS_FMUL = 204;
|
||||
public static final int MIPS_INS_MUL = 205;
|
||||
public static final int MIPS_INS_NEG = 206;
|
||||
public static final int MIPS_INS_FRCP = 207;
|
||||
public static final int MIPS_INS_FRINT = 208;
|
||||
public static final int MIPS_INS_FRSQRT = 209;
|
||||
public static final int MIPS_INS_FSAF = 210;
|
||||
public static final int MIPS_INS_FSEQ = 211;
|
||||
public static final int MIPS_INS_FSLE = 212;
|
||||
public static final int MIPS_INS_FSLT = 213;
|
||||
public static final int MIPS_INS_FSNE = 214;
|
||||
public static final int MIPS_INS_FSOR = 215;
|
||||
public static final int MIPS_INS_FSQRT = 216;
|
||||
public static final int MIPS_INS_SQRT = 217;
|
||||
public static final int MIPS_INS_FSUB = 218;
|
||||
public static final int MIPS_INS_SUB = 219;
|
||||
public static final int MIPS_INS_FSUEQ = 220;
|
||||
public static final int MIPS_INS_FSULE = 221;
|
||||
public static final int MIPS_INS_FSULT = 222;
|
||||
public static final int MIPS_INS_FSUNE = 223;
|
||||
public static final int MIPS_INS_FSUN = 224;
|
||||
public static final int MIPS_INS_FTINT_S = 225;
|
||||
public static final int MIPS_INS_FTINT_U = 226;
|
||||
public static final int MIPS_INS_FTQ = 227;
|
||||
public static final int MIPS_INS_FTRUNC_S = 228;
|
||||
public static final int MIPS_INS_FTRUNC_U = 229;
|
||||
public static final int MIPS_INS_HADD_S = 230;
|
||||
public static final int MIPS_INS_HADD_U = 231;
|
||||
public static final int MIPS_INS_HSUB_S = 232;
|
||||
public static final int MIPS_INS_HSUB_U = 233;
|
||||
public static final int MIPS_INS_ILVEV = 234;
|
||||
public static final int MIPS_INS_ILVL = 235;
|
||||
public static final int MIPS_INS_ILVOD = 236;
|
||||
public static final int MIPS_INS_ILVR = 237;
|
||||
public static final int MIPS_INS_INS = 238;
|
||||
public static final int MIPS_INS_INSERT = 239;
|
||||
public static final int MIPS_INS_INSV = 240;
|
||||
public static final int MIPS_INS_INSVE = 241;
|
||||
public static final int MIPS_INS_J = 242;
|
||||
public static final int MIPS_INS_JAL = 243;
|
||||
public static final int MIPS_INS_JALR = 244;
|
||||
public static final int MIPS_INS_JR = 245;
|
||||
public static final int MIPS_INS_JRC = 246;
|
||||
public static final int MIPS_INS_JALRC = 247;
|
||||
public static final int MIPS_INS_LB = 248;
|
||||
public static final int MIPS_INS_LBUX = 249;
|
||||
public static final int MIPS_INS_LBU = 250;
|
||||
public static final int MIPS_INS_LD = 251;
|
||||
public static final int MIPS_INS_LDC1 = 252;
|
||||
public static final int MIPS_INS_LDC2 = 253;
|
||||
public static final int MIPS_INS_LDI = 254;
|
||||
public static final int MIPS_INS_LDL = 255;
|
||||
public static final int MIPS_INS_LDR = 256;
|
||||
public static final int MIPS_INS_LDXC1 = 257;
|
||||
public static final int MIPS_INS_LH = 258;
|
||||
public static final int MIPS_INS_LHX = 259;
|
||||
public static final int MIPS_INS_LHU = 260;
|
||||
public static final int MIPS_INS_LL = 261;
|
||||
public static final int MIPS_INS_LLD = 262;
|
||||
public static final int MIPS_INS_LSA = 263;
|
||||
public static final int MIPS_INS_LUXC1 = 264;
|
||||
public static final int MIPS_INS_LUI = 265;
|
||||
public static final int MIPS_INS_LW = 266;
|
||||
public static final int MIPS_INS_LWC1 = 267;
|
||||
public static final int MIPS_INS_LWC2 = 268;
|
||||
public static final int MIPS_INS_LWL = 269;
|
||||
public static final int MIPS_INS_LWR = 270;
|
||||
public static final int MIPS_INS_LWX = 271;
|
||||
public static final int MIPS_INS_LWXC1 = 272;
|
||||
public static final int MIPS_INS_LWU = 273;
|
||||
public static final int MIPS_INS_LI = 274;
|
||||
public static final int MIPS_INS_MADD = 275;
|
||||
public static final int MIPS_INS_MADDR_Q = 276;
|
||||
public static final int MIPS_INS_MADDU = 277;
|
||||
public static final int MIPS_INS_MADDV = 278;
|
||||
public static final int MIPS_INS_MADD_Q = 279;
|
||||
public static final int MIPS_INS_MAQ_SA = 280;
|
||||
public static final int MIPS_INS_MAQ_S = 281;
|
||||
public static final int MIPS_INS_MAXI_S = 282;
|
||||
public static final int MIPS_INS_MAXI_U = 283;
|
||||
public static final int MIPS_INS_MAX_A = 284;
|
||||
public static final int MIPS_INS_MAX_S = 285;
|
||||
public static final int MIPS_INS_MAX_U = 286;
|
||||
public static final int MIPS_INS_MFC0 = 287;
|
||||
public static final int MIPS_INS_MFC1 = 288;
|
||||
public static final int MIPS_INS_MFC2 = 289;
|
||||
public static final int MIPS_INS_MFHC1 = 290;
|
||||
public static final int MIPS_INS_MFHI = 291;
|
||||
public static final int MIPS_INS_MFLO = 292;
|
||||
public static final int MIPS_INS_MINI_S = 293;
|
||||
public static final int MIPS_INS_MINI_U = 294;
|
||||
public static final int MIPS_INS_MIN_A = 295;
|
||||
public static final int MIPS_INS_MIN_S = 296;
|
||||
public static final int MIPS_INS_MIN_U = 297;
|
||||
public static final int MIPS_INS_MODSUB = 298;
|
||||
public static final int MIPS_INS_MOD_S = 299;
|
||||
public static final int MIPS_INS_MOD_U = 300;
|
||||
public static final int MIPS_INS_MOVE = 301;
|
||||
public static final int MIPS_INS_MOVF = 302;
|
||||
public static final int MIPS_INS_MOVN = 303;
|
||||
public static final int MIPS_INS_MOVT = 304;
|
||||
public static final int MIPS_INS_MOVZ = 305;
|
||||
public static final int MIPS_INS_MSUB = 306;
|
||||
public static final int MIPS_INS_MSUBR_Q = 307;
|
||||
public static final int MIPS_INS_MSUBU = 308;
|
||||
public static final int MIPS_INS_MSUBV = 309;
|
||||
public static final int MIPS_INS_MSUB_Q = 310;
|
||||
public static final int MIPS_INS_MTC0 = 311;
|
||||
public static final int MIPS_INS_MTC1 = 312;
|
||||
public static final int MIPS_INS_MTC2 = 313;
|
||||
public static final int MIPS_INS_MTHC1 = 314;
|
||||
public static final int MIPS_INS_MTHI = 315;
|
||||
public static final int MIPS_INS_MTHLIP = 316;
|
||||
public static final int MIPS_INS_MTLO = 317;
|
||||
public static final int MIPS_INS_MULEQ_S = 318;
|
||||
public static final int MIPS_INS_MULEU_S = 319;
|
||||
public static final int MIPS_INS_MULQ_RS = 320;
|
||||
public static final int MIPS_INS_MULQ_S = 321;
|
||||
public static final int MIPS_INS_MULR_Q = 322;
|
||||
public static final int MIPS_INS_MULSAQ_S = 323;
|
||||
public static final int MIPS_INS_MULSA = 324;
|
||||
public static final int MIPS_INS_MULT = 325;
|
||||
public static final int MIPS_INS_MULTU = 326;
|
||||
public static final int MIPS_INS_MULV = 327;
|
||||
public static final int MIPS_INS_MUL_Q = 328;
|
||||
public static final int MIPS_INS_MUL_S = 329;
|
||||
public static final int MIPS_INS_NLOC = 330;
|
||||
public static final int MIPS_INS_NLZC = 331;
|
||||
public static final int MIPS_INS_NMADD = 332;
|
||||
public static final int MIPS_INS_NMSUB = 333;
|
||||
public static final int MIPS_INS_NOR = 334;
|
||||
public static final int MIPS_INS_NORI = 335;
|
||||
public static final int MIPS_INS_NOT = 336;
|
||||
public static final int MIPS_INS_OR = 337;
|
||||
public static final int MIPS_INS_ORI = 338;
|
||||
public static final int MIPS_INS_PACKRL = 339;
|
||||
public static final int MIPS_INS_PCKEV = 340;
|
||||
public static final int MIPS_INS_PCKOD = 341;
|
||||
public static final int MIPS_INS_PCNT = 342;
|
||||
public static final int MIPS_INS_PICK = 343;
|
||||
public static final int MIPS_INS_PRECEQU = 344;
|
||||
public static final int MIPS_INS_PRECEQ = 345;
|
||||
public static final int MIPS_INS_PRECEU = 346;
|
||||
public static final int MIPS_INS_PRECRQU_S = 347;
|
||||
public static final int MIPS_INS_PRECRQ = 348;
|
||||
public static final int MIPS_INS_PRECRQ_RS = 349;
|
||||
public static final int MIPS_INS_PRECR = 350;
|
||||
public static final int MIPS_INS_PRECR_SRA = 351;
|
||||
public static final int MIPS_INS_PRECR_SRA_R = 352;
|
||||
public static final int MIPS_INS_PREPEND = 353;
|
||||
public static final int MIPS_INS_RADDU = 354;
|
||||
public static final int MIPS_INS_RDDSP = 355;
|
||||
public static final int MIPS_INS_RDHWR = 356;
|
||||
public static final int MIPS_INS_REPLV = 357;
|
||||
public static final int MIPS_INS_REPL = 358;
|
||||
public static final int MIPS_INS_ROTR = 359;
|
||||
public static final int MIPS_INS_ROTRV = 360;
|
||||
public static final int MIPS_INS_ROUND = 361;
|
||||
public static final int MIPS_INS_RESTORE = 362;
|
||||
public static final int MIPS_INS_SAT_S = 363;
|
||||
public static final int MIPS_INS_SAT_U = 364;
|
||||
public static final int MIPS_INS_SB = 365;
|
||||
public static final int MIPS_INS_SC = 366;
|
||||
public static final int MIPS_INS_SCD = 367;
|
||||
public static final int MIPS_INS_SD = 368;
|
||||
public static final int MIPS_INS_SDC1 = 369;
|
||||
public static final int MIPS_INS_SDC2 = 370;
|
||||
public static final int MIPS_INS_SDL = 371;
|
||||
public static final int MIPS_INS_SDR = 372;
|
||||
public static final int MIPS_INS_SDXC1 = 373;
|
||||
public static final int MIPS_INS_SEB = 374;
|
||||
public static final int MIPS_INS_SEH = 375;
|
||||
public static final int MIPS_INS_SH = 376;
|
||||
public static final int MIPS_INS_SHF = 377;
|
||||
public static final int MIPS_INS_SHILO = 378;
|
||||
public static final int MIPS_INS_SHILOV = 379;
|
||||
public static final int MIPS_INS_SHLLV = 380;
|
||||
public static final int MIPS_INS_SHLLV_S = 381;
|
||||
public static final int MIPS_INS_SHLL = 382;
|
||||
public static final int MIPS_INS_SHLL_S = 383;
|
||||
public static final int MIPS_INS_SHRAV = 384;
|
||||
public static final int MIPS_INS_SHRAV_R = 385;
|
||||
public static final int MIPS_INS_SHRA = 386;
|
||||
public static final int MIPS_INS_SHRA_R = 387;
|
||||
public static final int MIPS_INS_SHRLV = 388;
|
||||
public static final int MIPS_INS_SHRL = 389;
|
||||
public static final int MIPS_INS_SLDI = 390;
|
||||
public static final int MIPS_INS_SLD = 391;
|
||||
public static final int MIPS_INS_SLL = 392;
|
||||
public static final int MIPS_INS_SLLI = 393;
|
||||
public static final int MIPS_INS_SLLV = 394;
|
||||
public static final int MIPS_INS_SLT = 395;
|
||||
public static final int MIPS_INS_SLTI = 396;
|
||||
public static final int MIPS_INS_SLTIU = 397;
|
||||
public static final int MIPS_INS_SLTU = 398;
|
||||
public static final int MIPS_INS_SPLATI = 399;
|
||||
public static final int MIPS_INS_SPLAT = 400;
|
||||
public static final int MIPS_INS_SRA = 401;
|
||||
public static final int MIPS_INS_SRAI = 402;
|
||||
public static final int MIPS_INS_SRARI = 403;
|
||||
public static final int MIPS_INS_SRAR = 404;
|
||||
public static final int MIPS_INS_SRAV = 405;
|
||||
public static final int MIPS_INS_SRL = 406;
|
||||
public static final int MIPS_INS_SRLI = 407;
|
||||
public static final int MIPS_INS_SRLRI = 408;
|
||||
public static final int MIPS_INS_SRLR = 409;
|
||||
public static final int MIPS_INS_SRLV = 410;
|
||||
public static final int MIPS_INS_ST = 411;
|
||||
public static final int MIPS_INS_SUBQH = 412;
|
||||
public static final int MIPS_INS_SUBQH_R = 413;
|
||||
public static final int MIPS_INS_SUBQ = 414;
|
||||
public static final int MIPS_INS_SUBQ_S = 415;
|
||||
public static final int MIPS_INS_SUBSUS_U = 416;
|
||||
public static final int MIPS_INS_SUBSUU_S = 417;
|
||||
public static final int MIPS_INS_SUBS_S = 418;
|
||||
public static final int MIPS_INS_SUBS_U = 419;
|
||||
public static final int MIPS_INS_SUBUH = 420;
|
||||
public static final int MIPS_INS_SUBUH_R = 421;
|
||||
public static final int MIPS_INS_SUBU = 422;
|
||||
public static final int MIPS_INS_SUBU_S = 423;
|
||||
public static final int MIPS_INS_SUBVI = 424;
|
||||
public static final int MIPS_INS_SUBV = 425;
|
||||
public static final int MIPS_INS_SUXC1 = 426;
|
||||
public static final int MIPS_INS_SW = 427;
|
||||
public static final int MIPS_INS_SWC1 = 428;
|
||||
public static final int MIPS_INS_SWC2 = 429;
|
||||
public static final int MIPS_INS_SWL = 430;
|
||||
public static final int MIPS_INS_SWR = 431;
|
||||
public static final int MIPS_INS_SWXC1 = 432;
|
||||
public static final int MIPS_INS_SYNC = 433;
|
||||
public static final int MIPS_INS_SYSCALL = 434;
|
||||
public static final int MIPS_INS_SAVE = 435;
|
||||
public static final int MIPS_INS_TEQ = 436;
|
||||
public static final int MIPS_INS_TEQI = 437;
|
||||
public static final int MIPS_INS_TGE = 438;
|
||||
public static final int MIPS_INS_TGEI = 439;
|
||||
public static final int MIPS_INS_TGEIU = 440;
|
||||
public static final int MIPS_INS_TGEU = 441;
|
||||
public static final int MIPS_INS_TLT = 442;
|
||||
public static final int MIPS_INS_TLTI = 443;
|
||||
public static final int MIPS_INS_TLTU = 444;
|
||||
public static final int MIPS_INS_TNE = 445;
|
||||
public static final int MIPS_INS_TNEI = 446;
|
||||
public static final int MIPS_INS_TRUNC = 447;
|
||||
public static final int MIPS_INS_TLTIU = 448;
|
||||
public static final int MIPS_INS_VSHF = 449;
|
||||
public static final int MIPS_INS_WAIT = 450;
|
||||
public static final int MIPS_INS_WRDSP = 451;
|
||||
public static final int MIPS_INS_WSBH = 452;
|
||||
public static final int MIPS_INS_XOR = 453;
|
||||
public static final int MIPS_INS_XORI = 454;
|
||||
public static final int MIPS_INS_NOP = 455;
|
||||
public static final int MIPS_INS_MAX = 456;
|
||||
|
||||
// MIPS group of instructions
|
||||
public static final int MIPS_GRP_INVALID = 0;
|
||||
public static final int MIPS_GRP_BITCOUNT = 1;
|
||||
public static final int MIPS_GRP_DSP = 2;
|
||||
public static final int MIPS_GRP_DSPR2 = 3;
|
||||
public static final int MIPS_GRP_FPIDX = 4;
|
||||
public static final int MIPS_GRP_MSA = 5;
|
||||
public static final int MIPS_GRP_MIPS32R2 = 6;
|
||||
public static final int MIPS_GRP_MIPS64 = 7;
|
||||
public static final int MIPS_GRP_MIPS64R2 = 8;
|
||||
public static final int MIPS_GRP_SEINREG = 9;
|
||||
public static final int MIPS_GRP_STDENC = 10;
|
||||
public static final int MIPS_GRP_SWAP = 11;
|
||||
public static final int MIPS_GRP_MICROMIPS = 12;
|
||||
public static final int MIPS_GRP_MIPS16MODE = 13;
|
||||
public static final int MIPS_GRP_FP64BIT = 14;
|
||||
public static final int MIPS_GRP_NONANSFPMATH = 15;
|
||||
public static final int MIPS_GRP_NOTFP64BIT = 16;
|
||||
public static final int MIPS_GRP_RELOCSTATIC = 17;
|
||||
public static final int MIPS_GRP_MAX = 18;
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
This has been tested with OpenJDK 6 on Ubuntu-12.04 and Arch Linux-3.11, 64-bit
|
||||
|
||||
- OpenJDK is required to compile and run this test code. Install OpenJDK 6 with:
|
||||
|
||||
$ sudo apt-get install openjdk-6-jre-headless openjdk-6-jdk libjna-java
|
||||
|
||||
- To compile and run this Java test code:
|
||||
|
||||
$ make
|
||||
$ ./run.sh
|
||||
|
|
@ -0,0 +1,152 @@
|
|||
/* Capstone Disassembler Engine */
|
||||
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
|
||||
|
||||
import com.sun.jna.Native;
|
||||
import com.sun.jna.Memory;
|
||||
import com.sun.jna.Pointer;
|
||||
|
||||
public class Test {
|
||||
public static class platform {
|
||||
public int arch;
|
||||
public int mode;
|
||||
public byte[] code;
|
||||
public String comment;
|
||||
|
||||
public platform(int a, int m, byte[] c, String s)
|
||||
{
|
||||
arch = a;
|
||||
mode = m;
|
||||
code = c;
|
||||
comment = s;
|
||||
}
|
||||
};
|
||||
|
||||
static String stringToHex(byte[] code)
|
||||
{
|
||||
StringBuilder buf = new StringBuilder(200);
|
||||
for (byte ch: code) {
|
||||
if (buf.length() > 0)
|
||||
buf.append(' ');
|
||||
buf.append(String.format("0x%02x", ch));
|
||||
}
|
||||
return buf.toString();
|
||||
}
|
||||
|
||||
static public void main(String argv[])
|
||||
{
|
||||
platform[] platforms = {
|
||||
new platform(
|
||||
Capstone.CS_ARCH_X86,
|
||||
Capstone.CS_MODE_16,
|
||||
new byte[] { (byte)0x8d, (byte)0x4c, (byte)0x32, (byte)0x08, (byte)0x01, (byte)0xd8, (byte)0x81, (byte)0xc6, (byte)0x34, (byte)0x12, 0x00, 0x00 },
|
||||
"X86 16bit (Intel syntax)"
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_X86,
|
||||
Capstone.CS_MODE_32 + Capstone.CS_MODE_SYNTAX_ATT,
|
||||
new byte[] { (byte)0x8d, 0x4c, 0x32, 0x08, 0x01, (byte)0xd8, (byte)0x81, (byte)0xc6, 0x34, 0x12, 0x00, 0x00 },
|
||||
"X86 32bit (ATT syntax)"
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_X86,
|
||||
Capstone.CS_MODE_32,
|
||||
new byte[] { (byte)0x8d, 0x4c, 0x32, 0x08, 0x01, (byte)0xd8, (byte)0x81, (byte)0xc6, 0x34, 0x12, 0x00, 0x00 },
|
||||
"X86 32bit (Intel syntax)"
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_X86,
|
||||
Capstone.CS_MODE_64,
|
||||
new byte[] { 0x55, 0x48, (byte)0x8b, 0x05, (byte)0xb8, 0x13, 0x00, 0x00 },
|
||||
"X86 64 (Intel syntax)"
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_ARM,
|
||||
Capstone.CS_MODE_ARM,
|
||||
new byte[] { (byte)0xED, (byte)0xFF, (byte)0xFF, (byte)0xEB, 0x04, (byte)0xe0, 0x2d, (byte)0xe5, 0x00, 0x00, 0x00, 0x00, (byte)0xe0, (byte)0x83, 0x22, (byte)0xe5, (byte)0xf1, 0x02, 0x03, 0x0e, 0x00, 0x00, (byte)0xa0, (byte)0xe3, 0x02, 0x30, (byte)0xc1, (byte)0xe7, 0x00, 0x00, 0x53, (byte)0xe3 },
|
||||
"ARM"
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_ARM,
|
||||
Capstone.CS_MODE_THUMB,
|
||||
new byte[] { 0x4f, (byte)0xf0, 0x00, 0x01, (byte)0xbd, (byte)0xe8, 0x00, (byte)0x88, (byte)0xd1, (byte)0xe8, 0x00, (byte)0xf0 },
|
||||
"THUMB-2"
|
||||
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_ARM,
|
||||
Capstone.CS_MODE_ARM,
|
||||
new byte[] { 0x10, (byte)0xf1, 0x10, (byte)0xe7, 0x11, (byte)0xf2, 0x31, (byte)0xe7, (byte)0xdc, (byte)0xa1, 0x2e, (byte)0xf3, (byte)0xe8, 0x4e, 0x62, (byte)0xf3 },
|
||||
"ARM: Cortex-A15 + NEON"
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_ARM,
|
||||
Capstone.CS_MODE_THUMB,
|
||||
new byte[] { 0x70, 0x47, (byte)0xeb, 0x46, (byte)0x83, (byte)0xb0, (byte)0xc9, 0x68 },
|
||||
"THUMB"
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_MIPS,
|
||||
Capstone.CS_MODE_32 + Capstone.CS_MODE_BIG_ENDIAN,
|
||||
new byte[] { 0x0C, 0x10, 0x00, (byte)0x97, 0x00, 0x00, 0x00, 0x00, 0x24, 0x02, 0x00, 0x0c, (byte)0x8f, (byte)0xa2, 0x00, 0x00, 0x34, 0x21, 0x34, 0x56 },
|
||||
"MIPS-32 (Big-endian)"
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_MIPS,
|
||||
Capstone.CS_MODE_64+ Capstone.CS_MODE_LITTLE_ENDIAN,
|
||||
new byte[] { 0x56, 0x34, 0x21, 0x34, (byte)0xc2, 0x17, 0x01, 0x00 },
|
||||
"MIPS-64-EL (Little-endian)"
|
||||
),
|
||||
new platform(
|
||||
Capstone.CS_ARCH_ARM64,
|
||||
Capstone.CS_MODE_ARM,
|
||||
new byte [] { 0x21, 0x7c, 0x02, (byte)0x9b, 0x21, 0x7c, 0x00, 0x53, 0x00, 0x40, 0x21, 0x4b, (byte)0xe1, 0x0b, 0x40, (byte)0xb9 },
|
||||
"ARM-64"
|
||||
),
|
||||
};
|
||||
|
||||
for (int j = 0; j < platforms.length; j++) {
|
||||
System.out.println("************");
|
||||
System.out.println(String.format("Platform: %s", platforms[j].comment));
|
||||
System.out.println(String.format("Code: %s", stringToHex(platforms[j].code)));
|
||||
|
||||
Capstone cs = new Capstone(platforms[j].arch, platforms[j].mode);
|
||||
|
||||
Capstone.cs_insn[] all_insn = cs.disasm(platforms[j].code, 0x1000);
|
||||
|
||||
for (int i = 0; i < all_insn.length; i++) {
|
||||
System.out.println(String.format("0x%x\t%s\t%s", all_insn[i].address,
|
||||
all_insn[i].mnemonic, all_insn[i].operands));
|
||||
|
||||
if (all_insn[i].regs_read[0] != 0) {
|
||||
System.out.print("\tRegister read: ");
|
||||
for(int k = 0; k < all_insn[i].regs_read.length; k++) {
|
||||
if (all_insn[i].regs_read[k] == 0)
|
||||
break;
|
||||
System.out.print(String.format("%d ", all_insn[i].regs_read[k]));
|
||||
}
|
||||
System.out.println();
|
||||
}
|
||||
|
||||
if (all_insn[i].regs_write[0] != 0) {
|
||||
System.out.print("\tRegister written: ");
|
||||
for(int k = 0; k < all_insn[i].regs_write.length; k++) {
|
||||
if (all_insn[i].regs_write[k] == 0)
|
||||
break;
|
||||
System.out.print(String.format("%d ", all_insn[i].regs_write[k]));
|
||||
}
|
||||
System.out.println();
|
||||
}
|
||||
|
||||
if (all_insn[i].groups[0] != 0) {
|
||||
System.out.print("\tThis instruction belongs to group: ");
|
||||
for(int k = 0; k < all_insn[i].groups.length; k++) {
|
||||
if (all_insn[i].groups[k] == 0)
|
||||
break;
|
||||
System.out.print(String.format("%d ", all_insn[i].groups[k]));
|
||||
}
|
||||
System.out.println();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,112 @@
|
|||
// Capstone Java binding
|
||||
// By Nguyen Anh Quynh & Dang Hoang Vu, 2013
|
||||
|
||||
import com.sun.jna.Native;
|
||||
import com.sun.jna.Memory;
|
||||
import com.sun.jna.Pointer;
|
||||
|
||||
public class TestArm {
|
||||
|
||||
static byte[] hexString2Byte(String s) {
|
||||
// from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
|
||||
int len = s.length();
|
||||
byte[] data = new byte[len / 2];
|
||||
for (int i = 0; i < len; i += 2) {
|
||||
data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
|
||||
+ Character.digit(s.charAt(i+1), 16));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
static final String ARM_CODE = "EDFFFFEB04e02de500000000e08322e5f102030e0000a0e30230c1e7000053e3";
|
||||
static final String ARM_CODE2 = "d1e800f0f02404071f3cf2c000004ff00001466c";
|
||||
static final String THUMB_CODE2 = "4ff00001bde80088d1e800f0";
|
||||
static final String THUMB_CODE = "7047eb4683b0c9681fb1";
|
||||
|
||||
public static Capstone cs;
|
||||
|
||||
private static String hex(int i) {
|
||||
return Integer.toString(i, 16);
|
||||
}
|
||||
|
||||
private static String hex(long i) {
|
||||
return Long.toString(i, 16);
|
||||
}
|
||||
|
||||
public static void print_ins_detail(Capstone.cs_insn ins) {
|
||||
System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.operands);
|
||||
|
||||
Arm.OpInfo op_info = (Arm.OpInfo) ins.op_info;
|
||||
|
||||
if (op_info.cc != Arm.ARM_CC_AL && op_info.cc != Arm.ARM_CC_INVALID){
|
||||
System.out.printf("\tCode condition: %d\n", op_info.cc);
|
||||
}
|
||||
|
||||
if (op_info.update_flags) {
|
||||
System.out.println("\tUpdate-flags: True");
|
||||
}
|
||||
|
||||
if (op_info.writeback) {
|
||||
System.out.println("\tWriteback: True");
|
||||
}
|
||||
|
||||
if (op_info.op != null) {
|
||||
System.out.printf("\top_count: %d\n", op_info.op.length);
|
||||
for (int c=1; c<op_info.op.length+1; c++) {
|
||||
Arm.Operand i = (Arm.Operand) op_info.op[c-1];
|
||||
String imm = hex(i.value.imm);
|
||||
if (i.type == Arm.ARM_OP_REG)
|
||||
System.out.printf("\t\toperands[%d].type: REG = %s\n", c, cs.reg_name(i.value.reg));
|
||||
if (i.type == Arm.ARM_OP_IMM)
|
||||
System.out.printf("\t\toperands[%d].type: IMM = %s\n", c, imm);
|
||||
if (i.type == Arm.ARM_OP_PIMM)
|
||||
System.out.printf("\t\toperands[%d].type: P-IMM = %s\n", c, imm);
|
||||
if (i.type == Arm.ARM_OP_CIMM)
|
||||
System.out.printf("\t\toperands[%d].type: C-IMM = %s\n", c, imm);
|
||||
if (i.type == Arm.ARM_OP_FP)
|
||||
System.out.printf("\t\toperands[%d].type: FP = %f\n", c, i.value.fp);
|
||||
if (i.type == Arm.ARM_OP_MEM) {
|
||||
System.out.printf("\t\toperands[%d].type: MEM\n",c);
|
||||
String base = cs.reg_name(i.value.mem.base);
|
||||
String index = cs.reg_name(i.value.mem.index);
|
||||
if (base != null)
|
||||
System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
|
||||
if (index != null)
|
||||
System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, index);
|
||||
if (i.value.mem.scale != 1)
|
||||
System.out.printf("\t\t\toperands[%d].mem.scale: %s\n", c, hex(i.value.mem.scale));
|
||||
if (i.value.mem.disp != 0)
|
||||
System.out.printf("\t\t\toperands[%d].mem.disp: %s\n", c, hex(i.value.mem.disp));
|
||||
}
|
||||
if (i.shift.type != Arm.ARM_SFT_INVALID && i.shift.value > 0)
|
||||
System.out.printf("\t\t\tShift: type = %d, value = %d\n", i.shift.type, i.shift.value);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
public static void main(String argv[]) {
|
||||
|
||||
final Test.platform[] all_tests = {
|
||||
new Test.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_ARM, hexString2Byte(ARM_CODE), "ARM"),
|
||||
new Test.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, hexString2Byte(THUMB_CODE), "Thumb"),
|
||||
new Test.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, hexString2Byte(ARM_CODE2), "Thumb-mixed"),
|
||||
new Test.platform(Capstone.CS_ARCH_ARM, Capstone.CS_MODE_THUMB, hexString2Byte(THUMB_CODE2), "Thumb-2"),
|
||||
};
|
||||
|
||||
for (int i=0; i<all_tests.length; i++) {
|
||||
Test.platform test = all_tests[i];
|
||||
System.out.println(new String(new char[30]).replace("\0", "*"));
|
||||
System.out.println("Platform: " + test.comment);
|
||||
System.out.println("Disasm:");
|
||||
|
||||
cs = new Capstone(test.arch, test.mode);
|
||||
Capstone.cs_insn[] all_ins = cs.disasm(test.code, 0x1000);
|
||||
|
||||
for (int j = 0; j < all_ins.length; j++) {
|
||||
print_ins_detail(all_ins[j]);
|
||||
System.out.println();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,104 @@
|
|||
// Capstone Java binding
|
||||
// By Nguyen Anh Quynh & Dang Hoang Vu, 2013
|
||||
|
||||
import com.sun.jna.Native;
|
||||
import com.sun.jna.Memory;
|
||||
import com.sun.jna.Pointer;
|
||||
|
||||
public class TestArm64 {
|
||||
|
||||
static byte[] hexString2Byte(String s) {
|
||||
// from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
|
||||
int len = s.length();
|
||||
byte[] data = new byte[len / 2];
|
||||
for (int i = 0; i < len; i += 2) {
|
||||
data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
|
||||
+ Character.digit(s.charAt(i+1), 16));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
static final String ARM64_CODE = "217c029b217c00530040214be10b40b9200481da2008028b";
|
||||
|
||||
public static Capstone cs;
|
||||
|
||||
private static String hex(int i) {
|
||||
return Integer.toString(i, 16);
|
||||
}
|
||||
|
||||
private static String hex(long i) {
|
||||
return Long.toString(i, 16);
|
||||
}
|
||||
|
||||
public static void print_ins_detail(Capstone.cs_insn ins) {
|
||||
System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.operands);
|
||||
|
||||
Arm64.OpInfo op_info = (Arm64.OpInfo) ins.op_info;
|
||||
|
||||
if (op_info.cc != Arm64.ARM64_CC_AL && op_info.cc != Arm64.ARM64_CC_INVALID){
|
||||
System.out.printf("\tCode condition: %d\n", op_info.cc);
|
||||
}
|
||||
|
||||
if (op_info.update_flags) {
|
||||
System.out.println("\tUpdate-flags: True");
|
||||
}
|
||||
|
||||
if (op_info.writeback) {
|
||||
System.out.println("\tWriteback: True");
|
||||
}
|
||||
|
||||
if (op_info.op != null) {
|
||||
System.out.printf("\top_count: %d\n", op_info.op.length);
|
||||
for (int c=1; c<op_info.op.length+1; c++) {
|
||||
Arm64.Operand i = (Arm64.Operand) op_info.op[c-1];
|
||||
String imm = hex(i.value.imm);
|
||||
if (i.type == Arm64.ARM64_OP_REG)
|
||||
System.out.printf("\t\toperands[%d].type: REG = %s\n", c, cs.reg_name(i.value.reg));
|
||||
if (i.type == Arm64.ARM64_OP_IMM)
|
||||
System.out.printf("\t\toperands[%d].type: IMM = %s\n", c, imm);
|
||||
if (i.type == Arm64.ARM64_OP_CIMM)
|
||||
System.out.printf("\t\toperands[%d].type: C-IMM = %s\n", c, imm);
|
||||
if (i.type == Arm64.ARM64_OP_FP)
|
||||
System.out.printf("\t\toperands[%d].type: FP = %f\n", c, i.value.fp);
|
||||
if (i.type == Arm64.ARM64_OP_MEM) {
|
||||
System.out.printf("\t\toperands[%d].type: MEM\n",c);
|
||||
String base = cs.reg_name(i.value.mem.base);
|
||||
String index = cs.reg_name(i.value.mem.index);
|
||||
if (base != null)
|
||||
System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
|
||||
if (index != null)
|
||||
System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, index);
|
||||
if (i.value.mem.disp != 0)
|
||||
System.out.printf("\t\t\toperands[%d].mem.disp: %s\n", c, hex(i.value.mem.disp));
|
||||
}
|
||||
if (i.shift.type != Arm64.ARM64_SFT_INVALID && i.shift.value > 0)
|
||||
System.out.printf("\t\t\tShift: type = %d, value = %d\n", i.shift.type, i.shift.value);
|
||||
if (i.ext != Arm64.ARM64_EXT_INVALID)
|
||||
System.out.printf("\t\t\tExt: %d\n", i.ext);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
public static void main(String argv[]) {
|
||||
|
||||
final Test.platform[] all_tests = {
|
||||
new Test.platform(Capstone.CS_ARCH_ARM64, Capstone.CS_MODE_ARM, hexString2Byte(ARM64_CODE), "ARM-64"),
|
||||
};
|
||||
|
||||
for (int i=0; i<all_tests.length; i++) {
|
||||
Test.platform test = all_tests[i];
|
||||
System.out.println(new String(new char[30]).replace("\0", "*"));
|
||||
System.out.println("Platform: " + test.comment);
|
||||
System.out.println("Disasm:");
|
||||
|
||||
cs = new Capstone(test.arch, test.mode);
|
||||
Capstone.cs_insn[] all_ins = cs.disasm(test.code, 0x1000);
|
||||
|
||||
for (int j = 0; j < all_ins.length; j++) {
|
||||
print_ins_detail(all_ins[j]);
|
||||
System.out.println();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
// Capstone Java binding
|
||||
// By Nguyen Anh Quynh & Dang Hoang Vu, 2013
|
||||
|
||||
import com.sun.jna.Native;
|
||||
import com.sun.jna.Memory;
|
||||
import com.sun.jna.Pointer;
|
||||
|
||||
public class TestMips {
|
||||
|
||||
static byte[] hexString2Byte(String s) {
|
||||
// from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
|
||||
int len = s.length();
|
||||
byte[] data = new byte[len / 2];
|
||||
for (int i = 0; i < len; i += 2) {
|
||||
data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
|
||||
+ Character.digit(s.charAt(i+1), 16));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
static final String MIPS_CODE = "0C100097000000002402000c8fa2000034213456";
|
||||
static final String MIPS_CODE2 = "56342134c2170100";
|
||||
|
||||
public static Capstone cs;
|
||||
|
||||
private static String hex(int i) {
|
||||
return Integer.toString(i, 16);
|
||||
}
|
||||
|
||||
private static String hex(long i) {
|
||||
return Long.toString(i, 16);
|
||||
}
|
||||
|
||||
public static void print_ins_detail(Capstone.cs_insn ins) {
|
||||
System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.operands);
|
||||
|
||||
Mips.OpInfo op_info = (Mips.OpInfo) ins.op_info;
|
||||
|
||||
if (op_info.op != null) {
|
||||
System.out.printf("\top_count: %d\n", op_info.op.length);
|
||||
for (int c=1; c<op_info.op.length+1; c++) {
|
||||
Mips.Operand i = (Mips.Operand) op_info.op[c-1];
|
||||
String imm = hex(i.value.imm);
|
||||
if (i.type == Mips.MIPS_OP_REG)
|
||||
System.out.printf("\t\toperands[%d].type: REG = %s\n", c, cs.reg_name(i.value.reg));
|
||||
if (i.type == Mips.MIPS_OP_IMM)
|
||||
System.out.printf("\t\toperands[%d].type: IMM = %s\n", c, imm);
|
||||
if (i.type == Mips.MIPS_OP_MEM) {
|
||||
System.out.printf("\t\toperands[%d].type: MEM\n",c);
|
||||
String base = cs.reg_name(i.value.mem.base);
|
||||
if (base != null)
|
||||
System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
|
||||
if (i.value.mem.disp != 0)
|
||||
System.out.printf("\t\t\toperands[%d].mem.disp: %s\n", c, hex(i.value.mem.disp));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
public static void main(String argv[]) {
|
||||
|
||||
final Test.platform[] all_tests = {
|
||||
new Test.platform(Capstone.CS_ARCH_MIPS, Capstone.CS_MODE_32 + Capstone.CS_MODE_BIG_ENDIAN, hexString2Byte(MIPS_CODE), "MIPS-32 (Big-endian)"),
|
||||
new Test.platform(Capstone.CS_ARCH_MIPS, Capstone.CS_MODE_64 + Capstone.CS_MODE_LITTLE_ENDIAN, hexString2Byte(MIPS_CODE2), "MIPS-64-EL (Little-endian)"),
|
||||
};
|
||||
|
||||
for (int i=0; i<all_tests.length; i++) {
|
||||
Test.platform test = all_tests[i];
|
||||
System.out.println(new String(new char[30]).replace("\0", "*"));
|
||||
System.out.println("Platform: " + test.comment);
|
||||
System.out.println("Disasm:");
|
||||
|
||||
cs = new Capstone(test.arch, test.mode);
|
||||
Capstone.cs_insn[] all_ins = cs.disasm(test.code, 0x1000);
|
||||
|
||||
for (int j = 0; j < all_ins.length; j++) {
|
||||
print_ins_detail(all_ins[j]);
|
||||
System.out.println();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
// Capstone Java binding
|
||||
// By Nguyen Anh Quynh & Dang Hoang Vu, 2013
|
||||
|
||||
import com.sun.jna.Native;
|
||||
import com.sun.jna.Memory;
|
||||
import com.sun.jna.Pointer;
|
||||
|
||||
public class TestX86 {
|
||||
|
||||
static byte[] hexString2Byte(String s) {
|
||||
// from http://stackoverflow.com/questions/140131/convert-a-string-representation-of-a-hex-dump-to-a-byte-array-using-java
|
||||
int len = s.length();
|
||||
byte[] data = new byte[len / 2];
|
||||
for (int i = 0; i < len; i += 2) {
|
||||
data[i / 2] = (byte) ((Character.digit(s.charAt(i), 16) << 4)
|
||||
+ Character.digit(s.charAt(i+1), 16));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
static final String X86_CODE16 = "8d4c320801d881c6341200000523010000368b84912301000041a113486d3a";
|
||||
static final String X86_CODE32 = "8d4c320801d881c6341200000523010000368b84912301000041a113486d3a8d0534120000";
|
||||
static final String X86_CODE64 = "55488b05b8130000";
|
||||
|
||||
public static Capstone cs;
|
||||
|
||||
private static String hex(int i) {
|
||||
return Integer.toString(i, 16);
|
||||
}
|
||||
|
||||
private static String hex(long i) {
|
||||
return Long.toString(i, 16);
|
||||
}
|
||||
|
||||
private static String array2hex(byte[] arr) {
|
||||
String ret = "";
|
||||
for (int i=0 ;i<arr.length; i++)
|
||||
ret += String.format("0x%02x ", arr[i]);
|
||||
return ret;
|
||||
}
|
||||
|
||||
public static void print_ins_detail(Capstone.cs_insn ins) {
|
||||
System.out.printf("0x%x:\t%s\t%s\n", ins.address, ins.mnemonic, ins.operands);
|
||||
|
||||
X86.OpInfo op_info = (X86.OpInfo) ins.op_info;
|
||||
|
||||
System.out.printf("\tPrefix: %s\n", array2hex(op_info.prefix));
|
||||
|
||||
if (op_info.segment != X86.X86_REG_INVALID)
|
||||
System.out.println("\tSegment override:" + cs.reg_name(op_info.segment));
|
||||
|
||||
|
||||
System.out.printf("\tOpcode: %s\n", array2hex(op_info.opcode));
|
||||
|
||||
// print operand's size, address size, displacement size & immediate size
|
||||
System.out.printf("\top_size: %d, addr_size: %d, disp_size: %d, imm_size: %d\n"
|
||||
, op_info.op_size, op_info.addr_size, op_info.disp_size, op_info.imm_size);
|
||||
|
||||
// print modRM byte
|
||||
System.out.printf("\tmodrm: 0x%x\n", op_info.modrm);
|
||||
|
||||
// print displacement value
|
||||
System.out.printf("\tdisp: 0x%s\n", hex(op_info.disp));
|
||||
|
||||
// SIB is not available in 16-bit mode
|
||||
if ( (cs.mode & Capstone.CS_MODE_16) == 0)
|
||||
// print SIB byte
|
||||
System.out.printf("\tsib: 0x%s\n", hex(op_info.sib));
|
||||
|
||||
int count = ins.op_count(X86.X86_OP_IMM);
|
||||
if (count > 0) {
|
||||
System.out.printf("\timm_count: %d\n", count);
|
||||
for (int i=0; i<count; i++) {
|
||||
int index = ins.op_index(X86.X86_OP_IMM, i + 1);
|
||||
System.out.printf("\t\timms[%d] = 0x%x\n", i+1, (op_info.op[index].value.imm));
|
||||
}
|
||||
}
|
||||
|
||||
if (op_info.op != null) {
|
||||
System.out.printf("\top_count: %d\n", op_info.op.length);
|
||||
for (int c=1; c<op_info.op.length+1; c++) {
|
||||
X86.Operand i = (X86.Operand) op_info.op[c-1];
|
||||
String imm = hex(i.value.imm);
|
||||
if (i.type == X86.X86_OP_REG)
|
||||
System.out.printf("\t\toperands[%d].type: REG = %s\n", c, cs.reg_name(i.value.reg));
|
||||
if (i.type == X86.X86_OP_IMM)
|
||||
System.out.printf("\t\toperands[%d].type: IMM = %s\n", c, imm);
|
||||
if (i.type == X86.X86_OP_FP)
|
||||
System.out.printf("\t\toperands[%d].type: FP = %f\n", c, i.value.fp);
|
||||
if (i.type == X86.X86_OP_MEM) {
|
||||
System.out.printf("\t\toperands[%d].type: MEM\n",c);
|
||||
String base = cs.reg_name(i.value.mem.base);
|
||||
String index = cs.reg_name(i.value.mem.index);
|
||||
if (base != null)
|
||||
System.out.printf("\t\t\toperands[%d].mem.base: REG = %s\n", c, base);
|
||||
if (index != null)
|
||||
System.out.printf("\t\t\toperands[%d].mem.index: REG = %s\n", c, index);
|
||||
if (i.value.mem.scale != 1)
|
||||
System.out.printf("\t\t\toperands[%d].mem.scale: 0x%s\n", c, hex(i.value.mem.scale));
|
||||
if (i.value.mem.disp != 0)
|
||||
System.out.printf("\t\t\toperands[%d].mem.disp: 0x%s\n", c, hex(i.value.mem.disp));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
public static void main(String argv[]) {
|
||||
|
||||
final Test.platform[] all_tests = {
|
||||
new Test.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_16, hexString2Byte(X86_CODE16), "X86 16bit (Intel syntax)"),
|
||||
new Test.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_32 + Capstone.CS_MODE_SYNTAX_ATT, hexString2Byte(X86_CODE32), "X86 32bit (ATT syntax)"),
|
||||
new Test.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_32, hexString2Byte(X86_CODE32), "X86 32 (Intel syntax)"),
|
||||
new Test.platform(Capstone.CS_ARCH_X86, Capstone.CS_MODE_64, hexString2Byte(X86_CODE64), "X86 64 (Intel syntax)"),
|
||||
};
|
||||
|
||||
for (int i=0; i<all_tests.length; i++) {
|
||||
Test.platform test = all_tests[i];
|
||||
System.out.println(new String(new char[30]).replace("\0", "*"));
|
||||
System.out.println("Platform: " + test.comment);
|
||||
System.out.println("Disasm:");
|
||||
|
||||
cs = new Capstone(test.arch, test.mode);
|
||||
Capstone.cs_insn[] all_ins = cs.disasm(test.code, 0x1000);
|
||||
|
||||
for (int j = 0; j < all_ins.length; j++) {
|
||||
print_ins_detail(all_ins[j]);
|
||||
System.out.println();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,16 @@
|
|||
#!/bin/sh
|
||||
JNA=/usr/share/java/jna.jar
|
||||
|
||||
if [ ! -f ${JNA} ]; then
|
||||
echo "JNA @ ${JNA} does not exist, edit this file with the correct path";
|
||||
exit
|
||||
fi
|
||||
|
||||
case "$1" in
|
||||
"") java -classpath ${JNA}:. Test ;;
|
||||
"arm") java -classpath ${JNA}:. TestArm ;;
|
||||
"arm64") java -classpath ${JNA}:. TestArm64 ;;
|
||||
"mips") java -classpath ${JNA}:. TestMips ;;
|
||||
"x86") java -classpath ${JNA}:. TestX86 ;;
|
||||
* ) echo "Usage: ./run.sh [arm]"; exit 1;;
|
||||
esac
|
||||
Loading…
Reference in New Issue