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x86: do not print EIZ register - issue #1456

This commit is contained in:
Nguyen Anh Quynh 2019-04-16 23:36:40 +08:00
parent 22c4fc577d
commit 7cfa70ffa4
2 changed files with 14 additions and 4 deletions
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9
arch/X86/X86ATTInstPrinter.c
View File

@ -53,6 +53,9 @@
#include "X86GenInstrInfo.inc" #include "X86GenInstrInfo.inc"
#endif #endif
#define GET_REGINFO_ENUM
#include "X86GenRegisterInfo.inc"
static void printMemReference(MCInst *MI, unsigned Op, SStream *O); static void printMemReference(MCInst *MI, unsigned Op, SStream *O);
static void printOperand(MCInst *MI, unsigned OpNo, SStream *O); static void printOperand(MCInst *MI, unsigned OpNo, SStream *O);
@ -715,7 +718,9 @@ static void printMemReference(MCInst *MI, unsigned Op, SStream *O)
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize;
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID;
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_register_map(MCOperand_getReg(BaseReg)); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_register_map(MCOperand_getReg(BaseReg));
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_register_map(MCOperand_getReg(IndexReg)); if (MCOperand_getReg(IndexReg) != X86_EIZ) {
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_register_map(MCOperand_getReg(IndexReg));
}
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1;
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0;
@ -761,7 +766,7 @@ static void printMemReference(MCInst *MI, unsigned Op, SStream *O)
if (MCOperand_getReg(BaseReg)) if (MCOperand_getReg(BaseReg))
_printOperand(MI, Op + X86_AddrBaseReg, O); _printOperand(MI, Op + X86_AddrBaseReg, O);
if (MCOperand_getReg(IndexReg)) { if (MCOperand_getReg(IndexReg) != X86_EIZ) {
SStream_concat0(O, ", "); SStream_concat0(O, ", ");
_printOperand(MI, Op + X86_AddrIndexReg, O); _printOperand(MI, Op + X86_AddrIndexReg, O);
ScaleVal = MCOperand_getImm(MCInst_getOperand(MI, Op + X86_AddrScaleAmt)); ScaleVal = MCOperand_getImm(MCInst_getOperand(MI, Op + X86_AddrScaleAmt));

9
arch/X86/X86IntelInstPrinter.c
View File

@ -52,6 +52,9 @@
#include "X86GenInstrInfo.inc" #include "X86GenInstrInfo.inc"
#endif #endif
#define GET_REGINFO_ENUM
#include "X86GenRegisterInfo.inc"
#include "X86BaseInfo.h" #include "X86BaseInfo.h"
static void printMemReference(MCInst *MI, unsigned Op, SStream *O); static void printMemReference(MCInst *MI, unsigned Op, SStream *O);
@ -944,7 +947,9 @@ static void printMemReference(MCInst *MI, unsigned Op, SStream *O)
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize;
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID;
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_register_map(MCOperand_getReg(BaseReg)); MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_register_map(MCOperand_getReg(BaseReg));
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_register_map(MCOperand_getReg(IndexReg)); if (MCOperand_getReg(IndexReg) != X86_EIZ) {
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_register_map(MCOperand_getReg(IndexReg));
}
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = (int)ScaleVal; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = (int)ScaleVal;
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0;
@ -971,7 +976,7 @@ static void printMemReference(MCInst *MI, unsigned Op, SStream *O)
NeedPlus = true; NeedPlus = true;
} }
if (MCOperand_getReg(IndexReg)) { if (MCOperand_getReg(IndexReg) != X86_EIZ) {
if (NeedPlus) SStream_concat0(O, " + "); if (NeedPlus) SStream_concat0(O, " + ");
_printOperand(MI, Op + X86_AddrIndexReg, O); _printOperand(MI, Op + X86_AddrIndexReg, O);
if (ScaleVal != 1) if (ScaleVal != 1)