Merge remote-tracking branch 'aquynh/master' into PowerShell-Binding
This commit is contained in:
commit
8e773ffbc1
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@ -61,3 +61,4 @@ Xipiter LLC: Capstone logo redesigned.
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Satoshi Tanda: Support Windows kernel driver.
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Tang Yuhang: cstool.
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Andrew Dutcher: better Python setup.
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Ruben Boonen: PowerShell binding.
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7
README
7
README
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@ -14,9 +14,10 @@ Capstone offers some unparalleled features:
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- Provide semantics of the disassembled instruction, such as list of implicit
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registers read & written.
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- Implemented in pure C language, with lightweight bindings for Emacs, Haskell, Perl, Python,
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Ruby, C#, NodeJS, Java, GO, C++, OCaml, Lua, Rust, Delphi, Free Pascal & Vala
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ready either in main code, or provided externally by the community).
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- Implemented in pure C language, with lightweight bindings for PowerShell,
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Emacs, Haskell, Perl, Python, Ruby, C#, NodeJS, Java, GO, C++, OCaml, Lua,
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Rust, Delphi, Free Pascal & Vala ready either in main code, or provided
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externally by the community).
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- Native support for all popular platforms: Windows, Mac OSX, iOS, Android,
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Linux, *BSD, Solaris, etc.
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@ -728,7 +728,7 @@ static void printMemReference(MCInst *MI, unsigned Op, SStream *O)
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}
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}
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} else {
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SStream_concat0(O, "0");
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//SStream_concat0(O, "0");
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}
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}
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@ -799,6 +799,15 @@ void X86_ATT_printInst(MCInst *MI, SStream *OS, void *info)
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else
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printInstruction(MI, OS, info);
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// HACK TODO: fix this in machine description
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switch(MI->flat_insn->id) {
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default: break;
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case X86_INS_SYSEXIT:
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SStream_Init(OS);
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SStream_concat0(OS, "sysexit");
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break;
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}
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if (MI->has_imm) {
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// if op_count > 1, then this operand's size is taken from the destination op
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if (MI->flat_insn->detail->x86.op_count > 1) {
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@ -14168,12 +14168,28 @@ static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI)
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uint64_t Bits2 = OpInfo2[opcode];
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uint64_t Bits = (Bits2 << 32) | Bits1;
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// assert(Bits != 0 && "Cannot print this instruction.");
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if (!X86_lockrep(MI, O))
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if (!X86_lockrep(MI, O)) {
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#ifndef CAPSTONE_DIET
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SStream_concat0(O, AsmStrs+(Bits & 16383)-1);
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#else
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;
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// HACK TODO
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switch(opcode) {
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default:
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SStream_concat0(O, AsmStrs+(Bits & 16383)-1);
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break;
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case X86_MOV32sm:
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SStream_concat0(O, "movw\t");
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break;
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case X86_ROL32r1:
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SStream_concat0(O, "rol\t$1, ");
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break;
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case X86_LGS64rm:
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SStream_concat0(O, "lgs\t");
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break;
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case X86_SLDT64m:
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SStream_concat0(O, "sldt\t");
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break;
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}
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#endif
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}
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// Fragment 0 encoded into 7 bits for 79 unique commands.
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@ -24,7 +24,7 @@ else
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endif
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clean:
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${RM} -rf *.o cstool
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${RM} -rf *.o $(TARGET)
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%.o: %.c
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ifeq ($(V),0)
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@ -7,7 +7,6 @@
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#include <capstone.h>
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#define VERSION "2.0"
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void print_insn_detail_x86(csh ud, cs_mode mode, cs_insn *ins);
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void print_insn_detail_arm(csh handle, cs_insn *ins);
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@ -73,7 +72,7 @@ static uint8_t *preprocess(char *code, size_t *size)
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static void usage(char *prog)
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{
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printf("Cstool v%s for Capstone Disassembler Engine (core v%u.%u.%u)\n\n", VERSION, CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA);
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printf("Cstool for Capstone Disassembler Engine v%u.%u.%u\n\n", CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA);
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printf("Syntax: %s [-d] <arch+mode> <assembly-hexstring> [start-address-in-hex-format]\n", prog);
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printf("\nThe following <arch+mode> options are supported:\n");
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@ -372,6 +371,18 @@ int main(int argc, char **argv)
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if (arch == CS_ARCH_XCORE) {
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print_insn_detail_xcore(handle, &insn[i]);
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}
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if (insn[i].detail->groups_count) {
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int j;
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printf("\tGroups: ");
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for(j = 0; j < insn[i].detail->groups_count; j++) {
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printf("%s ", cs_group_name(handle, insn[i].detail->groups[j]));
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}
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printf("\n");
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}
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printf("\n");
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}
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}
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cs_free(insn, count);
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@ -110,6 +110,4 @@ void print_insn_detail_arm(csh handle, cs_insn *ins)
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if (arm->mem_barrier)
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printf("\tMemory-barrier: %u\n", arm->mem_barrier);
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printf("\n");
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}
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@ -99,6 +99,4 @@ void print_insn_detail_arm64(csh handle, cs_insn *ins)
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if (arm64->cc)
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printf("\tCode-condition: %u\n", arm64->cc);
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printf("\n");
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}
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@ -44,6 +44,4 @@ void print_insn_detail_mips(csh handle, cs_insn *ins)
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}
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}
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printf("\n");
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}
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@ -86,6 +86,4 @@ void print_insn_detail_ppc(csh handle, cs_insn *ins)
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if (ppc->update_cr0)
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printf("\tUpdate-CR0: True\n");
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printf("\n");
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}
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@ -51,6 +51,4 @@ void print_insn_detail_sparc(csh handle, cs_insn *ins)
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if (sparc->hint != 0)
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printf("\tHint code: %u\n", sparc->hint);
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printf("\n");
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}
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@ -53,6 +53,4 @@ void print_insn_detail_sysz(csh handle, cs_insn *ins)
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if (sysz->cc != 0)
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printf("\tCode condition: %u\n", sysz->cc);
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printf("\n");
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}
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@ -108,6 +108,4 @@ void print_insn_detail_x86(csh ud, cs_mode mode, cs_insn *ins)
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printf("\t\toperands[%u].size: %u\n", i, op->size);
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}
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printf("\n");
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}
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