synctools: udpate somes scripts

suite/synctools/Makefile

@@ -1,10 +1,13 @@
 all:
+
+x86:
 	# compile disassembler2 with X86GenDisassemblerTables2.inc
 	$(CC) disassemblertables2.c -o disassemblertables2
 
 	# compile disassembler2 with X86GenDisassemblerTables_reduce2.inc
 	$(CC) -DCAPSTONE_X86_REDUCE disassemblertables2.c -o disassemblertables_reduce2
 
+arm64:
 	$(CC) arm64_gen_vreg.c -o arm64_gen_vreg
 
 clean:

suite/synctools/genall-arch.sh

@@ -31,8 +31,6 @@ echo "Generating ${ARCH}GenRegisterInfo.inc"
 echo "Generating ${ARCH}GenSubtargetInfo.inc"
 ./subtargetinfo.py $1/${ARCH}GenSubtargetInfo.inc ${ARCH} > ${ARCH}GenSubtargetInfo.inc
 
-make
-
 case $3 in
   ARM)
   # for ARM only
@@ -45,6 +43,8 @@ case $3 in
   # then copy these instructions to include/capstone/<arch>.h
   echo "Generating ${ARCH}MappingInsnOp.inc"
   ./mapping_insn_op-arch.py $1/${ARCH}GenAsmMatcher.inc $1/${ARCH}GenInstrInfo.inc  $2/${ARCH}MappingInsnOp.inc > ${ARCH}MappingInsnOp.inc 
+  echo "Generating ${ARCH}GenSystemRegister.inc"
+  ./systemregister.py $1/${ARCH}GenSystemRegister.inc > ${ARCH}GenSystemRegister.inc
   ;;
   AArch64)
   echo "Generating ${ARCH}GenSystemOperands.inc"
@@ -55,6 +55,7 @@ case $3 in
   ./arm64_gen_vreg > AArch64GenRegisterV.inc
   echo "Generating ${ARCH}MappingInsnOp.inc"
   ./mapping_insn_op-arch.py $1/${ARCH}GenAsmMatcher.inc $1/${ARCH}GenInstrInfo.inc  $2/${ARCH}MappingInsnOp.inc > ${ARCH}MappingInsnOp.inc 
+  make arm64
   ;;
   PowerPC)
   # PowerPC
@@ -62,8 +63,6 @@ case $3 in
   # then copy these instructions to include/capstone/arch.h
   ;;
   *)
-  echo "Generating ${ARCH}GenSystemRegister.inc"
-  ./systemregister.py $1/${ARCH}GenSystemRegister.inc > ${ARCH}GenSystemRegister.inc
   echo "Generating instruction enum in insn_list.txt (for include/capstone/<arch>.h)"
   ./insn.py $1/${ARCH}GenAsmMatcher.inc $1/${ARCH}GenInstrInfo.inc $2/${ARCH}MappingInsn.inc > insn_list.txt
   ;;

suite/synctools/genall-full.sh

@@ -29,3 +29,5 @@ echo "Generating GenInstrInfo.inc"
 
 echo "Generating GenDisassemblerTables.inc & X86GenDisassemblerTables2.inc"
 ./disassemblertables.py $1/X86GenDisassemblerTables.inc X86GenDisassemblerTables.inc X86GenDisassemblerTables2.inc
+
+make x86