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Be ready for V6-Alpha1 (#2492) 

* update version to v6-alpha1

* update bindings const values
This commit is contained in:
Wu ChenXu 2024-09-30 22:48:08 +08:00 committed by GitHub
parent 235ba8e0f6
commit a424e709e8
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GPG Key ID: B5690EEEBB952194
15 changed files with 14547 additions and 5623 deletions
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2
CMakeLists.txt
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@ -20,7 +20,7 @@ endif()
cmake_policy(SET CMP0042 NEW) cmake_policy(SET CMP0042 NEW)
project(capstone project(capstone
VERSION 5.0 VERSION 6.0
) )
set(UNIX_COMPILER_OPTIONS -Werror -Wall -Warray-bounds -Wshift-negative-value -Wreturn-type -Wformat -Wmissing-braces -Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context -Wmisleading-indentation) set(UNIX_COMPILER_OPTIONS -Werror -Wall -Warray-bounds -Wshift-negative-value -Wreturn-type -Wformat -Wmissing-braces -Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context -Wmisleading-indentation)

2014
bindings/java/capstone/Arm_const.java
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5075
bindings/java/capstone/Ppc_const.java
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2
bindings/java/capstone/Sparc_const.java
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@ -41,6 +41,8 @@ public class Sparc_const {
public static final int SPARC_HINT_A = 1<<0; public static final int SPARC_HINT_A = 1<<0;
public static final int SPARC_HINT_PT = 1<<1; public static final int SPARC_HINT_PT = 1<<1;
public static final int SPARC_HINT_PN = 1<<2; public static final int SPARC_HINT_PN = 1<<2;
public static final int SPARC_HINT_A_PN = SPARC_HINT_A|SPARC_HINT_PN;
public static final int SPARC_HINT_A_PT = SPARC_HINT_A|SPARC_HINT_PT;
public static final int SPARC_OP_INVALID = 0; public static final int SPARC_OP_INVALID = 0;
public static final int SPARC_OP_REG = 1; public static final int SPARC_OP_REG = 1;

2907
bindings/java/capstone/Systemz_const.java Normal file
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1
bindings/java/capstone/X86_const.java
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@ -400,6 +400,7 @@ public class X86_const {
public static final int X86_AVX_RM_RD = 2; public static final int X86_AVX_RM_RD = 2;
public static final int X86_AVX_RM_RU = 3; public static final int X86_AVX_RM_RU = 3;
public static final int X86_AVX_RM_RZ = 4; public static final int X86_AVX_RM_RZ = 4;
public static final int X86_PREFIX_0 = 0x0;
public static final int X86_PREFIX_LOCK = 0xf0; public static final int X86_PREFIX_LOCK = 0xf0;
public static final int X86_PREFIX_REP = 0xf3; public static final int X86_PREFIX_REP = 0xf3;
public static final int X86_PREFIX_REPE = 0xf3; public static final int X86_PREFIX_REPE = 0xf3;

2014
bindings/ocaml/arm_const.ml
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5075
bindings/ocaml/ppc_const.ml
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2
bindings/ocaml/sparc_const.ml
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@ -38,6 +38,8 @@ let _SPARC_HINT_INVALID = 0;;
let _SPARC_HINT_A = 1 lsl 0;; let _SPARC_HINT_A = 1 lsl 0;;
let _SPARC_HINT_PT = 1 lsl 1;; let _SPARC_HINT_PT = 1 lsl 1;;
let _SPARC_HINT_PN = 1 lsl 2;; let _SPARC_HINT_PN = 1 lsl 2;;
let _SPARC_HINT_A_PN = _SPARC_HINT_A lor SPARC_HINT_PN;;
let _SPARC_HINT_A_PT = _SPARC_HINT_A lor SPARC_HINT_PT;;
let _SPARC_OP_INVALID = 0;; let _SPARC_OP_INVALID = 0;;
let _SPARC_OP_REG = 1;; let _SPARC_OP_REG = 1;;

2903
bindings/ocaml/systemz_const.ml Normal file
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1
bindings/ocaml/x86_const.ml
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@ -397,6 +397,7 @@ let _X86_AVX_RM_RN = 1;;
let _X86_AVX_RM_RD = 2;; let _X86_AVX_RM_RD = 2;;
let _X86_AVX_RM_RU = 3;; let _X86_AVX_RM_RU = 3;;
let _X86_AVX_RM_RZ = 4;; let _X86_AVX_RM_RZ = 4;;
let _X86_PREFIX_0 = 0x0;;
let _X86_PREFIX_LOCK = 0xf0;; let _X86_PREFIX_LOCK = 0xf0;;
let _X86_PREFIX_REP = 0xf3;; let _X86_PREFIX_REP = 0xf3;;
let _X86_PREFIX_REPE = 0xf3;; let _X86_PREFIX_REPE = 0xf3;;

2
bindings/python/capstone/__init__.py
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@ -236,7 +236,7 @@ UINT16_MAX = 0xffff
# Capstone C interface # Capstone C interface
# API version # API version
CS_API_MAJOR = 5 CS_API_MAJOR = 6
CS_API_MINOR = 0 CS_API_MINOR = 0
# Package version # Package version

164
bindings/python/capstone/xtensa_const.py
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@ -1,4 +1,4 @@
from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM, CS_OP_MEM_REG, CS_OP_MEM_IMM, UINT16_MAX from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM, CS_OP_MEM_REG, CS_OP_MEM_IMM, UINT16_MAX, UINT8_MAX
# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [xtensa_const.py] # For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [xtensa_const.py]
XTENSA_REG_INVALID = 0 XTENSA_REG_INVALID = 0
@ -20,86 +20,87 @@ XTENSA_REG_A13 = 15
XTENSA_REG_A14 = 16 XTENSA_REG_A14 = 16
XTENSA_REG_A15 = 17 XTENSA_REG_A15 = 17
XTENSA_REG_ENDING = 18 XTENSA_REG_ENDING = 18
XTENSA_INS_INVALID = 19
XTENSA_INS_ABS = 20 XTENSA_INS_INVALID = 0
XTENSA_INS_ADD = 21 XTENSA_INS_ABS = 1
XTENSA_INS_ADDI = 22 XTENSA_INS_ADD = 2
XTENSA_INS_ADDMI = 23 XTENSA_INS_ADDI = 3
XTENSA_INS_ADDX2 = 24 XTENSA_INS_ADDMI = 4
XTENSA_INS_ADDX4 = 25 XTENSA_INS_ADDX2 = 5
XTENSA_INS_ADDX8 = 26 XTENSA_INS_ADDX4 = 6
XTENSA_INS_AND = 27 XTENSA_INS_ADDX8 = 7
XTENSA_INS_BALL = 28 XTENSA_INS_AND = 8
XTENSA_INS_BANY = 29 XTENSA_INS_BALL = 9
XTENSA_INS_BBC = 30 XTENSA_INS_BANY = 10
XTENSA_INS_BBCI = 31 XTENSA_INS_BBC = 11
XTENSA_INS_BBS = 32 XTENSA_INS_BBCI = 12
XTENSA_INS_BBSI = 33 XTENSA_INS_BBS = 13
XTENSA_INS_BEQ = 34 XTENSA_INS_BBSI = 14
XTENSA_INS_BEQI = 35 XTENSA_INS_BEQ = 15
XTENSA_INS_BEQZ = 36 XTENSA_INS_BEQI = 16
XTENSA_INS_BGE = 37 XTENSA_INS_BEQZ = 17
XTENSA_INS_BGEI = 38 XTENSA_INS_BGE = 18
XTENSA_INS_BGEU = 39 XTENSA_INS_BGEI = 19
XTENSA_INS_BGEUI = 40 XTENSA_INS_BGEU = 20
XTENSA_INS_BGEZ = 41 XTENSA_INS_BGEUI = 21
XTENSA_INS_BLT = 42 XTENSA_INS_BGEZ = 22
XTENSA_INS_BLTI = 43 XTENSA_INS_BLT = 23
XTENSA_INS_BLTU = 44 XTENSA_INS_BLTI = 24
XTENSA_INS_BLTUI = 45 XTENSA_INS_BLTU = 25
XTENSA_INS_BLTZ = 46 XTENSA_INS_BLTUI = 26
XTENSA_INS_BNALL = 47 XTENSA_INS_BLTZ = 27
XTENSA_INS_BNE = 48 XTENSA_INS_BNALL = 28
XTENSA_INS_BNEI = 49 XTENSA_INS_BNE = 29
XTENSA_INS_BNEZ = 50 XTENSA_INS_BNEI = 30
XTENSA_INS_BNONE = 51 XTENSA_INS_BNEZ = 31
XTENSA_INS_CALL0 = 52 XTENSA_INS_BNONE = 32
XTENSA_INS_CALLX0 = 53 XTENSA_INS_CALL0 = 33
XTENSA_INS_DSYNC = 54 XTENSA_INS_CALLX0 = 34
XTENSA_INS_ESYNC = 55 XTENSA_INS_DSYNC = 35
XTENSA_INS_EXTUI = 56 XTENSA_INS_ESYNC = 36
XTENSA_INS_EXTW = 57 XTENSA_INS_EXTUI = 37
XTENSA_INS_ISYNC = 58 XTENSA_INS_EXTW = 38
XTENSA_INS_J = 59 XTENSA_INS_ISYNC = 39
XTENSA_INS_JX = 60 XTENSA_INS_J = 40
XTENSA_INS_L16SI = 61 XTENSA_INS_JX = 41
XTENSA_INS_L16UI = 62 XTENSA_INS_L16SI = 42
XTENSA_INS_L32I = 63 XTENSA_INS_L16UI = 43
XTENSA_INS_L32R = 64 XTENSA_INS_L32I = 44
XTENSA_INS_L8UI = 65 XTENSA_INS_L32R = 45
XTENSA_INS_MEMW = 66 XTENSA_INS_L8UI = 46
XTENSA_INS_MOVEQZ = 67 XTENSA_INS_MEMW = 47
XTENSA_INS_MOVGEZ = 68 XTENSA_INS_MOVEQZ = 48
XTENSA_INS_MOVI = 69 XTENSA_INS_MOVGEZ = 49
XTENSA_INS_MOVLTZ = 70 XTENSA_INS_MOVI = 50
XTENSA_INS_MOVNEZ = 71 XTENSA_INS_MOVLTZ = 51
XTENSA_INS_NEG = 72 XTENSA_INS_MOVNEZ = 52
XTENSA_INS_NOP = 73 XTENSA_INS_NEG = 53
XTENSA_INS_OR = 74 XTENSA_INS_NOP = 54
XTENSA_INS_RET = 75 XTENSA_INS_OR = 55
XTENSA_INS_RSR = 76 XTENSA_INS_RET = 56
XTENSA_INS_RSYNC = 77 XTENSA_INS_RSR = 57
XTENSA_INS_S16I = 78 XTENSA_INS_RSYNC = 58
XTENSA_INS_S32I = 79 XTENSA_INS_S16I = 59
XTENSA_INS_S8I = 80 XTENSA_INS_S32I = 60
XTENSA_INS_SLL = 81 XTENSA_INS_S8I = 61
XTENSA_INS_SLLI = 82 XTENSA_INS_SLL = 62
XTENSA_INS_SRA = 83 XTENSA_INS_SLLI = 63
XTENSA_INS_SRAI = 84 XTENSA_INS_SRA = 64
XTENSA_INS_SRC = 85 XTENSA_INS_SRAI = 65
XTENSA_INS_SRL = 86 XTENSA_INS_SRC = 66
XTENSA_INS_SRLI = 87 XTENSA_INS_SRL = 67
XTENSA_INS_SSA8L = 88 XTENSA_INS_SRLI = 68
XTENSA_INS_SSAI = 89 XTENSA_INS_SSA8L = 69
XTENSA_INS_SSL = 90 XTENSA_INS_SSAI = 70
XTENSA_INS_SSR = 91 XTENSA_INS_SSL = 71
XTENSA_INS_SUB = 92 XTENSA_INS_SSR = 72
XTENSA_INS_SUBX2 = 93 XTENSA_INS_SUB = 73
XTENSA_INS_SUBX4 = 94 XTENSA_INS_SUBX2 = 74
XTENSA_INS_SUBX8 = 95 XTENSA_INS_SUBX4 = 75
XTENSA_INS_WSR = 96 XTENSA_INS_SUBX8 = 76
XTENSA_INS_XOR = 97 XTENSA_INS_WSR = 77
XTENSA_INS_XSR = 98 XTENSA_INS_XOR = 78
XTENSA_INS_XSR = 79
XTENSA_GRP_INVALID = 0 XTENSA_GRP_INVALID = 0
XTENSA_GRP_CALL = 1 XTENSA_GRP_CALL = 1
@ -113,3 +114,4 @@ XTENSA_OP_IMM = CS_OP_IMM
XTENSA_OP_MEM = CS_OP_MEM XTENSA_OP_MEM = CS_OP_MEM
XTENSA_OP_MEM_REG = CS_OP_MEM_REG XTENSA_OP_MEM_REG = CS_OP_MEM_REG
XTENSA_OP_MEM_IMM = CS_OP_MEM_IMM XTENSA_OP_MEM_IMM = CS_OP_MEM_IMM
XTENSA_OP_L32R = 130

4
include/capstone/capstone.h
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@ -48,13 +48,13 @@ extern "C" {
#endif #endif
// Capstone API version // Capstone API version
#define CS_API_MAJOR 5 #define CS_API_MAJOR 6
#define CS_API_MINOR 0 #define CS_API_MINOR 0
// Version for bleeding edge code of the Github's "next" branch. // Version for bleeding edge code of the Github's "next" branch.
// Use this if you want the absolutely latest development code. // Use this if you want the absolutely latest development code.
// This version number will be bumped up whenever we have a new major change. // This version number will be bumped up whenever we have a new major change.
#define CS_NEXT_VERSION 6 #define CS_NEXT_VERSION 7
// Capstone package version // Capstone package version
#define CS_VERSION_MAJOR CS_API_MAJOR #define CS_VERSION_MAJOR CS_API_MAJOR

4
pkgconfig.mk
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@ -2,11 +2,11 @@
# To be used to generate capstone.pc for pkg-config # To be used to generate capstone.pc for pkg-config
# version major & minor # version major & minor
PKG_MAJOR = 5 PKG_MAJOR = 6
PKG_MINOR = 0 PKG_MINOR = 0
# version bugfix level. Example: PKG_EXTRA = 1 # version bugfix level. Example: PKG_EXTRA = 1
PKG_EXTRA = 0 PKG_EXTRA = 0
# version tag. Examples: rc1, b2, post1 - or just comment out for no tag # version tag. Examples: rc1, b2, post1 - or just comment out for no tag
PKG_TAG = post1 PKG_TAG = alpha1