From e6ceee576d00da11f78c13a7905c9a234ff55d9d Mon Sep 17 00:00:00 2001 From: Nguyen Anh Quynh Date: Sun, 16 Dec 2018 20:47:52 +0800 Subject: [PATCH] mos65xx: fix warnings reported by CI --- arch/MOS65XX/MOS65XXDisassembler.c | 643 +++++++++++++++-------------- 1 file changed, 323 insertions(+), 320 deletions(-) diff --git a/arch/MOS65XX/MOS65XXDisassembler.c b/arch/MOS65XX/MOS65XXDisassembler.c index 08473f62..d1a653e9 100644 --- a/arch/MOS65XX/MOS65XXDisassembler.c +++ b/arch/MOS65XX/MOS65XXDisassembler.c @@ -9,263 +9,263 @@ typedef struct OpInfo { mos65xx_address_mode am; } OpInfo; -const struct OpInfo OpInfoTable[]= { - MOS65XX_INS_BRK , MOS65XX_AM_IMP , // 0x00 - MOS65XX_INS_ORA , MOS65XX_AM_INDX, // 0x01 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x02 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x03 - MOS65XX_INS_NOP , MOS65XX_AM_ZP , // 0x04 - MOS65XX_INS_ORA , MOS65XX_AM_ZP , // 0x05 - MOS65XX_INS_ASL , MOS65XX_AM_ZP , // 0x06 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x07 - MOS65XX_INS_PHP , MOS65XX_AM_IMP , // 0x08 - MOS65XX_INS_ORA , MOS65XX_AM_IMM , // 0x09 - MOS65XX_INS_ASL , MOS65XX_AM_ACC , // 0x0a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x0b - MOS65XX_INS_NOP , MOS65XX_AM_ABS , // 0x0c - MOS65XX_INS_ORA , MOS65XX_AM_ABS , // 0x0d - MOS65XX_INS_ASL , MOS65XX_AM_ABS , // 0x0e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x0f - MOS65XX_INS_BPL , MOS65XX_AM_REL , // 0x10 - MOS65XX_INS_ORA , MOS65XX_AM_INDY, // 0x11 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x12 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x13 - MOS65XX_INS_NOP , MOS65XX_AM_ZPX , // 0x14 - MOS65XX_INS_ORA , MOS65XX_AM_ZPX , // 0x15 - MOS65XX_INS_ASL , MOS65XX_AM_ZPX , // 0x16 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x17 - MOS65XX_INS_CLC , MOS65XX_AM_IMP , // 0x18 - MOS65XX_INS_ORA , MOS65XX_AM_ABSY, // 0x19 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0x1a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x1b - MOS65XX_INS_NOP , MOS65XX_AM_ABS , // 0x1c - MOS65XX_INS_ORA , MOS65XX_AM_ABSX, // 0x1d - MOS65XX_INS_ASL , MOS65XX_AM_ABSX, // 0x1e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x1f - MOS65XX_INS_JSR , MOS65XX_AM_ABS , // 0x20 - MOS65XX_INS_AND , MOS65XX_AM_INDX, // 0x21 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x22 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x23 - MOS65XX_INS_BIT , MOS65XX_AM_ZP , // 0x24 - MOS65XX_INS_AND , MOS65XX_AM_ZP , // 0x25 - MOS65XX_INS_ROL , MOS65XX_AM_ZP , // 0x26 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x27 - MOS65XX_INS_PLP , MOS65XX_AM_IMP , // 0x28 - MOS65XX_INS_AND , MOS65XX_AM_IMM , // 0x29 - MOS65XX_INS_ROL , MOS65XX_AM_ACC , // 0x2a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x2b - MOS65XX_INS_BIT , MOS65XX_AM_ABS , // 0x2c - MOS65XX_INS_AND , MOS65XX_AM_ABS , // 0x2d - MOS65XX_INS_ROL , MOS65XX_AM_ABS , // 0x2e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x2f - MOS65XX_INS_BMI , MOS65XX_AM_REL , // 0x30 - MOS65XX_INS_AND , MOS65XX_AM_INDY, // 0x31 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x32 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x33 - MOS65XX_INS_NOP , MOS65XX_AM_ZPX , // 0x34 - MOS65XX_INS_AND , MOS65XX_AM_ZPX , // 0x35 - MOS65XX_INS_ROL , MOS65XX_AM_ZPX , // 0x36 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x37 - MOS65XX_INS_SEC , MOS65XX_AM_IMP , // 0x38 - MOS65XX_INS_AND , MOS65XX_AM_ABSY, // 0x39 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0x3a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x3b - MOS65XX_INS_NOP , MOS65XX_AM_ABSX, // 0x3c - MOS65XX_INS_AND , MOS65XX_AM_ABSX, // 0x3d - MOS65XX_INS_ROL , MOS65XX_AM_ABSX, // 0x3e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x3f - MOS65XX_INS_RTI , MOS65XX_AM_IMP , // 0x40 - MOS65XX_INS_EOR , MOS65XX_AM_INDX, // 0x41 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x42 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x43 - MOS65XX_INS_NOP , MOS65XX_AM_ZP , // 0x44 - MOS65XX_INS_EOR , MOS65XX_AM_ZP , // 0x45 - MOS65XX_INS_LSR , MOS65XX_AM_ZP , // 0x46 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x47 - MOS65XX_INS_PHA , MOS65XX_AM_IMP , // 0x48 - MOS65XX_INS_EOR , MOS65XX_AM_IMM , // 0x49 - MOS65XX_INS_LSR , MOS65XX_AM_ACC , // 0x4a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x4b - MOS65XX_INS_JMP , MOS65XX_AM_ABS , // 0x4c - MOS65XX_INS_EOR , MOS65XX_AM_ABS , // 0x4d - MOS65XX_INS_LSR , MOS65XX_AM_ABS , // 0x4e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x4f - MOS65XX_INS_BVC , MOS65XX_AM_REL , // 0x50 - MOS65XX_INS_EOR , MOS65XX_AM_INDY, // 0x51 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x52 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x53 - MOS65XX_INS_NOP , MOS65XX_AM_ZPX , // 0x54 - MOS65XX_INS_EOR , MOS65XX_AM_ZPX , // 0x55 - MOS65XX_INS_LSR , MOS65XX_AM_ZPX , // 0x56 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x57 - MOS65XX_INS_CLI , MOS65XX_AM_IMP , // 0x58 - MOS65XX_INS_EOR , MOS65XX_AM_ABSY, // 0x59 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0x5a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x5b - MOS65XX_INS_NOP , MOS65XX_AM_ABSX, // 0x5c - MOS65XX_INS_EOR , MOS65XX_AM_ABSX, // 0x5d - MOS65XX_INS_LSR , MOS65XX_AM_ABSX, // 0x5e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x5f - MOS65XX_INS_RTS , MOS65XX_AM_IMP , // 0x60 - MOS65XX_INS_ADC , MOS65XX_AM_INDX, // 0x61 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x62 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x63 - MOS65XX_INS_NOP , MOS65XX_AM_ZP , // 0x64 - MOS65XX_INS_ADC , MOS65XX_AM_ZP , // 0x65 - MOS65XX_INS_ROR , MOS65XX_AM_ZP , // 0x66 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x67 - MOS65XX_INS_PLA , MOS65XX_AM_IMP , // 0x68 - MOS65XX_INS_ADC , MOS65XX_AM_IMM , // 0x69 - MOS65XX_INS_ROR , MOS65XX_AM_ACC , // 0x6a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x6b - MOS65XX_INS_JMP , MOS65XX_AM_IND , // 0x6c - MOS65XX_INS_ADC , MOS65XX_AM_ABS , // 0x6d - MOS65XX_INS_ROR , MOS65XX_AM_ABS , // 0x6e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x6f - MOS65XX_INS_BVS , MOS65XX_AM_REL , // 0x70 - MOS65XX_INS_ADC , MOS65XX_AM_INDY, // 0x71 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x72 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x73 - MOS65XX_INS_NOP , MOS65XX_AM_ZPX , // 0x74 - MOS65XX_INS_ADC , MOS65XX_AM_ZPX , // 0x75 - MOS65XX_INS_ROR , MOS65XX_AM_ZPX , // 0x76 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x77 - MOS65XX_INS_SEI , MOS65XX_AM_IMP , // 0x78 - MOS65XX_INS_ADC , MOS65XX_AM_ABSY, // 0x79 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0x7a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x7b - MOS65XX_INS_NOP , MOS65XX_AM_ABSX, // 0x7c - MOS65XX_INS_ADC , MOS65XX_AM_ABSX, // 0x7d - MOS65XX_INS_ROR , MOS65XX_AM_ABSX, // 0x7e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x7f - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0x80 - MOS65XX_INS_STA , MOS65XX_AM_INDX, // 0x81 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0x82 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x83 - MOS65XX_INS_STY , MOS65XX_AM_ZP , // 0x84 - MOS65XX_INS_STA , MOS65XX_AM_ZP , // 0x85 - MOS65XX_INS_STX , MOS65XX_AM_ZP , // 0x86 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x87 - MOS65XX_INS_DEY , MOS65XX_AM_IMP , // 0x88 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0x89 - MOS65XX_INS_TXA , MOS65XX_AM_IMP , // 0x8a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x8b - MOS65XX_INS_STY , MOS65XX_AM_ABS , // 0x8c - MOS65XX_INS_STA , MOS65XX_AM_ABS , // 0x8d - MOS65XX_INS_STX , MOS65XX_AM_ABS , // 0x8e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x8f - MOS65XX_INS_BCC , MOS65XX_AM_REL , // 0x90 - MOS65XX_INS_STA , MOS65XX_AM_INDY, // 0x91 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x92 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x93 - MOS65XX_INS_STY , MOS65XX_AM_ZPX , // 0x94 - MOS65XX_INS_STA , MOS65XX_AM_ZPX , // 0x95 - MOS65XX_INS_STX , MOS65XX_AM_ZPY , // 0x96 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x97 - MOS65XX_INS_TYA , MOS65XX_AM_IMP , // 0x98 - MOS65XX_INS_STA , MOS65XX_AM_ABSY, // 0x99 - MOS65XX_INS_TXS , MOS65XX_AM_IMP , // 0x9a - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x9b - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x9c - MOS65XX_INS_STA , MOS65XX_AM_ABSX, // 0x9d - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x9e - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0x9f - MOS65XX_INS_LDY , MOS65XX_AM_IMM , // 0xa0 - MOS65XX_INS_LDA , MOS65XX_AM_INDX, // 0xa1 - MOS65XX_INS_LDX , MOS65XX_AM_IMM , // 0xa2 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xa3 - MOS65XX_INS_LDY , MOS65XX_AM_ZP , // 0xa4 - MOS65XX_INS_LDA , MOS65XX_AM_ZP , // 0xa5 - MOS65XX_INS_LDX , MOS65XX_AM_ZP , // 0xa6 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xa7 - MOS65XX_INS_TAY , MOS65XX_AM_IMP , // 0xa8 - MOS65XX_INS_LDA , MOS65XX_AM_IMM , // 0xa9 - MOS65XX_INS_TAX , MOS65XX_AM_IMP , // 0xaa - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xab - MOS65XX_INS_LDY , MOS65XX_AM_ABS , // 0xac - MOS65XX_INS_LDA , MOS65XX_AM_ABS , // 0xad - MOS65XX_INS_LDX , MOS65XX_AM_ABS , // 0xae - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xaf - MOS65XX_INS_BCS , MOS65XX_AM_REL , // 0xb0 - MOS65XX_INS_LDA , MOS65XX_AM_INDY, // 0xb1 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xb2 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xb3 - MOS65XX_INS_LDY , MOS65XX_AM_ZPX , // 0xb4 - MOS65XX_INS_LDA , MOS65XX_AM_ZPX , // 0xb5 - MOS65XX_INS_LDX , MOS65XX_AM_ZPY , // 0xb6 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xb7 - MOS65XX_INS_CLV , MOS65XX_AM_IMP , // 0xb8 - MOS65XX_INS_LDA , MOS65XX_AM_ABSY, // 0xb9 - MOS65XX_INS_TSX , MOS65XX_AM_IMP , // 0xba - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xbb - MOS65XX_INS_LDY , MOS65XX_AM_ABSX, // 0xbc - MOS65XX_INS_LDA , MOS65XX_AM_ABSX, // 0xbd - MOS65XX_INS_LDX , MOS65XX_AM_ABSY, // 0xbe - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xbf - MOS65XX_INS_CPY , MOS65XX_AM_IMM , // 0xc0 - MOS65XX_INS_CMP , MOS65XX_AM_INDX, // 0xc1 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0xc2 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xc3 - MOS65XX_INS_CPY , MOS65XX_AM_ZP , // 0xc4 - MOS65XX_INS_CMP , MOS65XX_AM_ZP , // 0xc5 - MOS65XX_INS_DEC , MOS65XX_AM_ZP , // 0xc6 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xc7 - MOS65XX_INS_INY , MOS65XX_AM_IMP , // 0xc8 - MOS65XX_INS_CMP , MOS65XX_AM_IMM , // 0xc9 - MOS65XX_INS_DEX , MOS65XX_AM_IMP , // 0xca - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xcb - MOS65XX_INS_CPY , MOS65XX_AM_ABS , // 0xcc - MOS65XX_INS_CMP , MOS65XX_AM_ABS , // 0xcd - MOS65XX_INS_DEC , MOS65XX_AM_ABS , // 0xce - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xcf - MOS65XX_INS_BNE , MOS65XX_AM_REL , // 0xd0 - MOS65XX_INS_CMP , MOS65XX_AM_INDY, // 0xd1 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xd2 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xd3 - MOS65XX_INS_NOP , MOS65XX_AM_ZPX , // 0xd4 - MOS65XX_INS_CMP , MOS65XX_AM_ZPX , // 0xd5 - MOS65XX_INS_DEC , MOS65XX_AM_ZPX , // 0xd6 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xd7 - MOS65XX_INS_CLD , MOS65XX_AM_IMP , // 0xd8 - MOS65XX_INS_CMP , MOS65XX_AM_ABSY, // 0xd9 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0xda - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xdb - MOS65XX_INS_NOP , MOS65XX_AM_ABSX, // 0xdc - MOS65XX_INS_CMP , MOS65XX_AM_ABSX, // 0xdd - MOS65XX_INS_DEC , MOS65XX_AM_ABSX, // 0xde - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xdf - MOS65XX_INS_CPX , MOS65XX_AM_IMM , // 0xe0 - MOS65XX_INS_SBC , MOS65XX_AM_INDX, // 0xe1 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0xe2 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xe3 - MOS65XX_INS_CPX , MOS65XX_AM_ZP , // 0xe4 - MOS65XX_INS_SBC , MOS65XX_AM_ZP , // 0xe5 - MOS65XX_INS_INC , MOS65XX_AM_ZP , // 0xe6 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xe7 - MOS65XX_INS_INX , MOS65XX_AM_IMP , // 0xe8 - MOS65XX_INS_SBC , MOS65XX_AM_IMM , // 0xe9 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0xea - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xeb - MOS65XX_INS_CPX , MOS65XX_AM_ABS , // 0xec - MOS65XX_INS_SBC , MOS65XX_AM_ABS , // 0xed - MOS65XX_INS_INC , MOS65XX_AM_ABS , // 0xee - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xef - MOS65XX_INS_BEQ , MOS65XX_AM_REL , // 0xf0 - MOS65XX_INS_SBC , MOS65XX_AM_INDY, // 0xf1 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xf2 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xf3 - MOS65XX_INS_NOP , MOS65XX_AM_ZPX , // 0xf4 - MOS65XX_INS_SBC , MOS65XX_AM_ZPX , // 0xf5 - MOS65XX_INS_INC , MOS65XX_AM_ZPX , // 0xf6 - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xf7 - MOS65XX_INS_SED , MOS65XX_AM_IMP , // 0xf8 - MOS65XX_INS_SBC , MOS65XX_AM_ABSY, // 0xf9 - MOS65XX_INS_NOP , MOS65XX_AM_IMP , // 0xfa - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xfb - MOS65XX_INS_NOP , MOS65XX_AM_ABSX, // 0xfc - MOS65XX_INS_SBC , MOS65XX_AM_ABSX, // 0xfd - MOS65XX_INS_INC , MOS65XX_AM_ABSX, // 0xfe - MOS65XX_INS_INVALID, MOS65XX_AM_NONE, // 0xff +static const struct OpInfo OpInfoTable[]= { + { MOS65XX_INS_BRK , MOS65XX_AM_IMP }, // 0x00 + { MOS65XX_INS_ORA , MOS65XX_AM_INDX }, // 0x01 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x02 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x03 + { MOS65XX_INS_NOP , MOS65XX_AM_ZP }, // 0x04 + { MOS65XX_INS_ORA , MOS65XX_AM_ZP }, // 0x05 + { MOS65XX_INS_ASL , MOS65XX_AM_ZP }, // 0x06 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x07 + { MOS65XX_INS_PHP , MOS65XX_AM_IMP }, // 0x08 + { MOS65XX_INS_ORA , MOS65XX_AM_IMM }, // 0x09 + { MOS65XX_INS_ASL , MOS65XX_AM_ACC }, // 0x0a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x0b + { MOS65XX_INS_NOP , MOS65XX_AM_ABS }, // 0x0c + { MOS65XX_INS_ORA , MOS65XX_AM_ABS }, // 0x0d + { MOS65XX_INS_ASL , MOS65XX_AM_ABS }, // 0x0e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x0f + { MOS65XX_INS_BPL , MOS65XX_AM_REL }, // 0x10 + { MOS65XX_INS_ORA , MOS65XX_AM_INDY }, // 0x11 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x12 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x13 + { MOS65XX_INS_NOP , MOS65XX_AM_ZPX }, // 0x14 + { MOS65XX_INS_ORA , MOS65XX_AM_ZPX }, // 0x15 + { MOS65XX_INS_ASL , MOS65XX_AM_ZPX }, // 0x16 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x17 + { MOS65XX_INS_CLC , MOS65XX_AM_IMP }, // 0x18 + { MOS65XX_INS_ORA , MOS65XX_AM_ABSY }, // 0x19 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0x1a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x1b + { MOS65XX_INS_NOP , MOS65XX_AM_ABS }, // 0x1c + { MOS65XX_INS_ORA , MOS65XX_AM_ABSX }, // 0x1d + { MOS65XX_INS_ASL , MOS65XX_AM_ABSX }, // 0x1e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x1f + { MOS65XX_INS_JSR , MOS65XX_AM_ABS }, // 0x20 + { MOS65XX_INS_AND , MOS65XX_AM_INDX }, // 0x21 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x22 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x23 + { MOS65XX_INS_BIT , MOS65XX_AM_ZP }, // 0x24 + { MOS65XX_INS_AND , MOS65XX_AM_ZP }, // 0x25 + { MOS65XX_INS_ROL , MOS65XX_AM_ZP }, // 0x26 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x27 + { MOS65XX_INS_PLP , MOS65XX_AM_IMP }, // 0x28 + { MOS65XX_INS_AND , MOS65XX_AM_IMM }, // 0x29 + { MOS65XX_INS_ROL , MOS65XX_AM_ACC }, // 0x2a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x2b + { MOS65XX_INS_BIT , MOS65XX_AM_ABS }, // 0x2c + { MOS65XX_INS_AND , MOS65XX_AM_ABS }, // 0x2d + { MOS65XX_INS_ROL , MOS65XX_AM_ABS }, // 0x2e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x2f + { MOS65XX_INS_BMI , MOS65XX_AM_REL }, // 0x30 + { MOS65XX_INS_AND , MOS65XX_AM_INDY }, // 0x31 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x32 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x33 + { MOS65XX_INS_NOP , MOS65XX_AM_ZPX }, // 0x34 + { MOS65XX_INS_AND , MOS65XX_AM_ZPX }, // 0x35 + { MOS65XX_INS_ROL , MOS65XX_AM_ZPX }, // 0x36 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x37 + { MOS65XX_INS_SEC , MOS65XX_AM_IMP }, // 0x38 + { MOS65XX_INS_AND , MOS65XX_AM_ABSY }, // 0x39 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0x3a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x3b + { MOS65XX_INS_NOP , MOS65XX_AM_ABSX }, // 0x3c + { MOS65XX_INS_AND , MOS65XX_AM_ABSX }, // 0x3d + { MOS65XX_INS_ROL , MOS65XX_AM_ABSX }, // 0x3e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x3f + { MOS65XX_INS_RTI , MOS65XX_AM_IMP }, // 0x40 + { MOS65XX_INS_EOR , MOS65XX_AM_INDX }, // 0x41 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x42 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x43 + { MOS65XX_INS_NOP , MOS65XX_AM_ZP }, // 0x44 + { MOS65XX_INS_EOR , MOS65XX_AM_ZP }, // 0x45 + { MOS65XX_INS_LSR , MOS65XX_AM_ZP }, // 0x46 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x47 + { MOS65XX_INS_PHA , MOS65XX_AM_IMP }, // 0x48 + { MOS65XX_INS_EOR , MOS65XX_AM_IMM }, // 0x49 + { MOS65XX_INS_LSR , MOS65XX_AM_ACC }, // 0x4a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x4b + { MOS65XX_INS_JMP , MOS65XX_AM_ABS }, // 0x4c + { MOS65XX_INS_EOR , MOS65XX_AM_ABS }, // 0x4d + { MOS65XX_INS_LSR , MOS65XX_AM_ABS }, // 0x4e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x4f + { MOS65XX_INS_BVC , MOS65XX_AM_REL }, // 0x50 + { MOS65XX_INS_EOR , MOS65XX_AM_INDY }, // 0x51 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x52 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x53 + { MOS65XX_INS_NOP , MOS65XX_AM_ZPX }, // 0x54 + { MOS65XX_INS_EOR , MOS65XX_AM_ZPX }, // 0x55 + { MOS65XX_INS_LSR , MOS65XX_AM_ZPX }, // 0x56 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x57 + { MOS65XX_INS_CLI , MOS65XX_AM_IMP }, // 0x58 + { MOS65XX_INS_EOR , MOS65XX_AM_ABSY }, // 0x59 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0x5a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x5b + { MOS65XX_INS_NOP , MOS65XX_AM_ABSX }, // 0x5c + { MOS65XX_INS_EOR , MOS65XX_AM_ABSX }, // 0x5d + { MOS65XX_INS_LSR , MOS65XX_AM_ABSX }, // 0x5e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x5f + { MOS65XX_INS_RTS , MOS65XX_AM_IMP }, // 0x60 + { MOS65XX_INS_ADC , MOS65XX_AM_INDX }, // 0x61 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x62 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x63 + { MOS65XX_INS_NOP , MOS65XX_AM_ZP }, // 0x64 + { MOS65XX_INS_ADC , MOS65XX_AM_ZP }, // 0x65 + { MOS65XX_INS_ROR , MOS65XX_AM_ZP }, // 0x66 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x67 + { MOS65XX_INS_PLA , MOS65XX_AM_IMP }, // 0x68 + { MOS65XX_INS_ADC , MOS65XX_AM_IMM }, // 0x69 + { MOS65XX_INS_ROR , MOS65XX_AM_ACC }, // 0x6a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x6b + { MOS65XX_INS_JMP , MOS65XX_AM_IND }, // 0x6c + { MOS65XX_INS_ADC , MOS65XX_AM_ABS }, // 0x6d + { MOS65XX_INS_ROR , MOS65XX_AM_ABS }, // 0x6e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x6f + { MOS65XX_INS_BVS , MOS65XX_AM_REL }, // 0x70 + { MOS65XX_INS_ADC , MOS65XX_AM_INDY }, // 0x71 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x72 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x73 + { MOS65XX_INS_NOP , MOS65XX_AM_ZPX }, // 0x74 + { MOS65XX_INS_ADC , MOS65XX_AM_ZPX }, // 0x75 + { MOS65XX_INS_ROR , MOS65XX_AM_ZPX }, // 0x76 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x77 + { MOS65XX_INS_SEI , MOS65XX_AM_IMP }, // 0x78 + { MOS65XX_INS_ADC , MOS65XX_AM_ABSY }, // 0x79 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0x7a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x7b + { MOS65XX_INS_NOP , MOS65XX_AM_ABSX }, // 0x7c + { MOS65XX_INS_ADC , MOS65XX_AM_ABSX }, // 0x7d + { MOS65XX_INS_ROR , MOS65XX_AM_ABSX }, // 0x7e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x7f + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0x80 + { MOS65XX_INS_STA , MOS65XX_AM_INDX }, // 0x81 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0x82 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x83 + { MOS65XX_INS_STY , MOS65XX_AM_ZP }, // 0x84 + { MOS65XX_INS_STA , MOS65XX_AM_ZP }, // 0x85 + { MOS65XX_INS_STX , MOS65XX_AM_ZP }, // 0x86 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x87 + { MOS65XX_INS_DEY , MOS65XX_AM_IMP }, // 0x88 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0x89 + { MOS65XX_INS_TXA , MOS65XX_AM_IMP }, // 0x8a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x8b + { MOS65XX_INS_STY , MOS65XX_AM_ABS }, // 0x8c + { MOS65XX_INS_STA , MOS65XX_AM_ABS }, // 0x8d + { MOS65XX_INS_STX , MOS65XX_AM_ABS }, // 0x8e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x8f + { MOS65XX_INS_BCC , MOS65XX_AM_REL }, // 0x90 + { MOS65XX_INS_STA , MOS65XX_AM_INDY }, // 0x91 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x92 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x93 + { MOS65XX_INS_STY , MOS65XX_AM_ZPX }, // 0x94 + { MOS65XX_INS_STA , MOS65XX_AM_ZPX }, // 0x95 + { MOS65XX_INS_STX , MOS65XX_AM_ZPY }, // 0x96 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x97 + { MOS65XX_INS_TYA , MOS65XX_AM_IMP }, // 0x98 + { MOS65XX_INS_STA , MOS65XX_AM_ABSY }, // 0x99 + { MOS65XX_INS_TXS , MOS65XX_AM_IMP }, // 0x9a + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x9b + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x9c + { MOS65XX_INS_STA , MOS65XX_AM_ABSX }, // 0x9d + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x9e + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0x9f + { MOS65XX_INS_LDY , MOS65XX_AM_IMM }, // 0xa0 + { MOS65XX_INS_LDA , MOS65XX_AM_INDX }, // 0xa1 + { MOS65XX_INS_LDX , MOS65XX_AM_IMM }, // 0xa2 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xa3 + { MOS65XX_INS_LDY , MOS65XX_AM_ZP }, // 0xa4 + { MOS65XX_INS_LDA , MOS65XX_AM_ZP }, // 0xa5 + { MOS65XX_INS_LDX , MOS65XX_AM_ZP }, // 0xa6 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xa7 + { MOS65XX_INS_TAY , MOS65XX_AM_IMP }, // 0xa8 + { MOS65XX_INS_LDA , MOS65XX_AM_IMM }, // 0xa9 + { MOS65XX_INS_TAX , MOS65XX_AM_IMP }, // 0xaa + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xab + { MOS65XX_INS_LDY , MOS65XX_AM_ABS }, // 0xac + { MOS65XX_INS_LDA , MOS65XX_AM_ABS }, // 0xad + { MOS65XX_INS_LDX , MOS65XX_AM_ABS }, // 0xae + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xaf + { MOS65XX_INS_BCS , MOS65XX_AM_REL }, // 0xb0 + { MOS65XX_INS_LDA , MOS65XX_AM_INDY }, // 0xb1 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xb2 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xb3 + { MOS65XX_INS_LDY , MOS65XX_AM_ZPX }, // 0xb4 + { MOS65XX_INS_LDA , MOS65XX_AM_ZPX }, // 0xb5 + { MOS65XX_INS_LDX , MOS65XX_AM_ZPY }, // 0xb6 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xb7 + { MOS65XX_INS_CLV , MOS65XX_AM_IMP }, // 0xb8 + { MOS65XX_INS_LDA , MOS65XX_AM_ABSY }, // 0xb9 + { MOS65XX_INS_TSX , MOS65XX_AM_IMP }, // 0xba + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xbb + { MOS65XX_INS_LDY , MOS65XX_AM_ABSX }, // 0xbc + { MOS65XX_INS_LDA , MOS65XX_AM_ABSX }, // 0xbd + { MOS65XX_INS_LDX , MOS65XX_AM_ABSY }, // 0xbe + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xbf + { MOS65XX_INS_CPY , MOS65XX_AM_IMM }, // 0xc0 + { MOS65XX_INS_CMP , MOS65XX_AM_INDX }, // 0xc1 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0xc2 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xc3 + { MOS65XX_INS_CPY , MOS65XX_AM_ZP }, // 0xc4 + { MOS65XX_INS_CMP , MOS65XX_AM_ZP }, // 0xc5 + { MOS65XX_INS_DEC , MOS65XX_AM_ZP }, // 0xc6 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xc7 + { MOS65XX_INS_INY , MOS65XX_AM_IMP }, // 0xc8 + { MOS65XX_INS_CMP , MOS65XX_AM_IMM }, // 0xc9 + { MOS65XX_INS_DEX , MOS65XX_AM_IMP }, // 0xca + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xcb + { MOS65XX_INS_CPY , MOS65XX_AM_ABS }, // 0xcc + { MOS65XX_INS_CMP , MOS65XX_AM_ABS }, // 0xcd + { MOS65XX_INS_DEC , MOS65XX_AM_ABS }, // 0xce + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xcf + { MOS65XX_INS_BNE , MOS65XX_AM_REL }, // 0xd0 + { MOS65XX_INS_CMP , MOS65XX_AM_INDY }, // 0xd1 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xd2 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xd3 + { MOS65XX_INS_NOP , MOS65XX_AM_ZPX }, // 0xd4 + { MOS65XX_INS_CMP , MOS65XX_AM_ZPX }, // 0xd5 + { MOS65XX_INS_DEC , MOS65XX_AM_ZPX }, // 0xd6 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xd7 + { MOS65XX_INS_CLD , MOS65XX_AM_IMP }, // 0xd8 + { MOS65XX_INS_CMP , MOS65XX_AM_ABSY }, // 0xd9 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0xda + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xdb + { MOS65XX_INS_NOP , MOS65XX_AM_ABSX }, // 0xdc + { MOS65XX_INS_CMP , MOS65XX_AM_ABSX }, // 0xdd + { MOS65XX_INS_DEC , MOS65XX_AM_ABSX }, // 0xde + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xdf + { MOS65XX_INS_CPX , MOS65XX_AM_IMM }, // 0xe0 + { MOS65XX_INS_SBC , MOS65XX_AM_INDX }, // 0xe1 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0xe2 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xe3 + { MOS65XX_INS_CPX , MOS65XX_AM_ZP }, // 0xe4 + { MOS65XX_INS_SBC , MOS65XX_AM_ZP }, // 0xe5 + { MOS65XX_INS_INC , MOS65XX_AM_ZP }, // 0xe6 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xe7 + { MOS65XX_INS_INX , MOS65XX_AM_IMP }, // 0xe8 + { MOS65XX_INS_SBC , MOS65XX_AM_IMM }, // 0xe9 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0xea + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xeb + { MOS65XX_INS_CPX , MOS65XX_AM_ABS }, // 0xec + { MOS65XX_INS_SBC , MOS65XX_AM_ABS }, // 0xed + { MOS65XX_INS_INC , MOS65XX_AM_ABS }, // 0xee + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xef + { MOS65XX_INS_BEQ , MOS65XX_AM_REL }, // 0xf0 + { MOS65XX_INS_SBC , MOS65XX_AM_INDY }, // 0xf1 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xf2 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xf3 + { MOS65XX_INS_NOP , MOS65XX_AM_ZPX }, // 0xf4 + { MOS65XX_INS_SBC , MOS65XX_AM_ZPX }, // 0xf5 + { MOS65XX_INS_INC , MOS65XX_AM_ZPX }, // 0xf6 + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xf7 + { MOS65XX_INS_SED , MOS65XX_AM_IMP }, // 0xf8 + { MOS65XX_INS_SBC , MOS65XX_AM_ABSY }, // 0xf9 + { MOS65XX_INS_NOP , MOS65XX_AM_IMP }, // 0xfa + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xfb + { MOS65XX_INS_NOP , MOS65XX_AM_ABSX }, // 0xfc + { MOS65XX_INS_SBC , MOS65XX_AM_ABSX }, // 0xfd + { MOS65XX_INS_INC , MOS65XX_AM_ABSX }, // 0xfe + { MOS65XX_INS_INVALID, MOS65XX_AM_NONE }, // 0xff }; static const char* RegNames[] = { @@ -284,74 +284,74 @@ static const char* GroupNames[] = { }; typedef struct InstructionInfo { - char* name; + const char* name; mos65xx_group_type group_type; mos65xx_reg write, read; bool modifies_status; } InstructionInfo; -const struct InstructionInfo InstructionInfoTable[]= { - "INVALID", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, false, - "ADC", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true, - "AND", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true, - "ASL", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "BCC", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false, - "BCS", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false, - "BEQ", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false, - "BIT", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "BMI", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false, - "BNE", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false, - "BPL", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false, - "BRK", MOS65XX_GRP_INVALID, MOS65XX_REG_SP, MOS65XX_REG_INVALID, false, - "BVC", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false, - "BVS", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false, - "CLC", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "CLD", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "CLI", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "CLV", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "CMP", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_ACC, true, - "CPX", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_X, true, - "CPY", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_Y, true, - "DEC", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "DEX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_X, true, - "DEY", MOS65XX_GRP_INVALID, MOS65XX_REG_Y, MOS65XX_REG_Y, true, - "EOR", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "INC", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "INX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_X, true, - "INY", MOS65XX_GRP_INVALID, MOS65XX_REG_Y, MOS65XX_REG_Y, true, - "JMP", MOS65XX_GRP_JUMP, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, false, - "JSR", MOS65XX_GRP_CALL, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, false, - "LDA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true, - "LDX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_INVALID, true, - "LDY", MOS65XX_GRP_INVALID, MOS65XX_REG_Y, MOS65XX_REG_INVALID, true, - "LSR", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "NOP", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, false, - "ORA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true, - "PHA", MOS65XX_GRP_INVALID, MOS65XX_REG_SP, MOS65XX_REG_ACC, false, - "PLA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_SP, true, - "PHP", MOS65XX_GRP_INVALID, MOS65XX_REG_SP, MOS65XX_REG_P, false, - "PLP", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_SP, true, - "ROL", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "ROR", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "RTI", MOS65XX_GRP_IRET, MOS65XX_REG_SP, MOS65XX_REG_INVALID, true, - "RTS", MOS65XX_GRP_RET, MOS65XX_REG_SP, MOS65XX_REG_INVALID, false, - "SBC", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true, - "SEC", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "SED", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "SEI", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true, - "STA", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_ACC, false, - "STX", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_X, false, - "STY", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_Y, false, - "TAX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_ACC, true, - "TAY", MOS65XX_GRP_INVALID, MOS65XX_REG_Y, MOS65XX_REG_ACC, true, - "TSX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_SP, true, - "TXA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_X, true, - "TXS", MOS65XX_GRP_INVALID, MOS65XX_REG_SP, MOS65XX_REG_X, true, - "TYA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_Y, true, +static const struct InstructionInfo InstructionInfoTable[]= { + { "INVALID", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, false }, + { "ADC", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true }, + { "AND", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true }, + { "ASL", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "BCC", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false }, + { "BCS", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false }, + { "BEQ", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false }, + { "BIT", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "BMI", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false }, + { "BNE", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false }, + { "BPL", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false }, + { "BRK", MOS65XX_GRP_INVALID, MOS65XX_REG_SP, MOS65XX_REG_INVALID, false }, + { "BVC", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false }, + { "BVS", MOS65XX_GRP_BRANCH_RELATIVE, MOS65XX_REG_INVALID, MOS65XX_REG_P, false }, + { "CLC", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "CLD", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "CLI", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "CLV", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "CMP", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_ACC, true }, + { "CPX", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_X, true }, + { "CPY", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_Y, true }, + { "DEC", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "DEX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_X, true }, + { "DEY", MOS65XX_GRP_INVALID, MOS65XX_REG_Y, MOS65XX_REG_Y, true }, + { "EOR", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "INC", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "INX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_X, true }, + { "INY", MOS65XX_GRP_INVALID, MOS65XX_REG_Y, MOS65XX_REG_Y, true }, + { "JMP", MOS65XX_GRP_JUMP, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, false }, + { "JSR", MOS65XX_GRP_CALL, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, false }, + { "LDA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true }, + { "LDX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_INVALID, true }, + { "LDY", MOS65XX_GRP_INVALID, MOS65XX_REG_Y, MOS65XX_REG_INVALID, true }, + { "LSR", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "NOP", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, false }, + { "ORA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true }, + { "PHA", MOS65XX_GRP_INVALID, MOS65XX_REG_SP, MOS65XX_REG_ACC, false }, + { "PLA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_SP, true }, + { "PHP", MOS65XX_GRP_INVALID, MOS65XX_REG_SP, MOS65XX_REG_P, false }, + { "PLP", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_SP, true }, + { "ROL", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "ROR", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "RTI", MOS65XX_GRP_IRET, MOS65XX_REG_SP, MOS65XX_REG_INVALID, true }, + { "RTS", MOS65XX_GRP_RET, MOS65XX_REG_SP, MOS65XX_REG_INVALID, false }, + { "SBC", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_INVALID, true }, + { "SEC", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "SED", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "SEI", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_INVALID, true }, + { "STA", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_ACC, false }, + { "STX", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_X, false }, + { "STY", MOS65XX_GRP_INVALID, MOS65XX_REG_INVALID, MOS65XX_REG_Y, false }, + { "TAX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_ACC, true }, + { "TAY", MOS65XX_GRP_INVALID, MOS65XX_REG_Y, MOS65XX_REG_ACC, true }, + { "TSX", MOS65XX_GRP_INVALID, MOS65XX_REG_X, MOS65XX_REG_SP, true }, + { "TXA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_X, true }, + { "TXS", MOS65XX_GRP_INVALID, MOS65XX_REG_SP, MOS65XX_REG_X, true }, + { "TYA", MOS65XX_GRP_INVALID, MOS65XX_REG_ACC, MOS65XX_REG_Y, true }, }; #endif -int getInstructionLength(mos65xx_address_mode am) +static int getInstructionLength(mos65xx_address_mode am) { switch(am) { case MOS65XX_AM_NONE: @@ -377,7 +377,8 @@ int getInstructionLength(mos65xx_address_mode am) } #ifndef CAPSTONE_DIET -void fillDetails(MCInst *MI, unsigned char opcode) { +static void fillDetails(MCInst *MI, unsigned char opcode) +{ cs_detail *detail = MI->flat_insn->detail; mos65xx_insn ins = OpInfoTable[opcode].ins; mos65xx_address_mode am = OpInfoTable[opcode].am; @@ -445,8 +446,10 @@ void MOS65XX_printInst(MCInst *MI, struct SStream *O, void *PrinterInfo) SStream_concat0(O, InstructionInfoTable[OpInfoTable[MI->Opcode].ins].name); unsigned int value = MI->Operands[0].ImmVal; - switch (OpInfoTable[opcode].am) - { + switch (OpInfoTable[opcode].am) { + default: + break; + case MOS65XX_AM_IMP: break;