Merge branch 'next' of https://github.com/danghvu/capstone into vu
This commit is contained in:
commit
f5d8496c52
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@ -304,375 +304,32 @@ class CsInsn(object):
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return detail.groups[:detail.groups_count]
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return None
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@property
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def cc(self):
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if not self._cs._detail:
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return None
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def __gen_detail(self):
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arch = self._cs.arch
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all_info = self._raw.detail.contents
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if arch == CS_ARCH_ARM:
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(self.cc, self.update_flags, self.writeback, self.operands) = \
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arm.get_arch_info(all_info.arch.arm)
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elif arch == CS_ARCH_ARM64:
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(self.cc, self.update_flags, self.writeback, self.operands) = \
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arm64.get_arch_info(all_info.arch.arm64)
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elif arch == CS_ARCH_X86:
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(self.prefix, self.segment, self.opcode, self.op_size, self.addr_size, \
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self.disp_size, self.imm_size, self.modrm, self.sib, self.disp, \
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self.sib_index, self.sib_scale, self.sib_base, self.operands) = x86.get_arch_info(all_info.arch.x86)
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elif arch == CS_ARCH_MIPS:
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self.operands = mips.get_arch_info(all_info.arch.mips)
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_ARM:
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try:
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return self._cc
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except:
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(self._cc, self._update_flags, self._writeback, self._operands) = \
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arm.get_arch_info(detail.arch.arm)
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return self._cc
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elif self._cs.arch == CS_ARCH_ARM64:
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try:
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return self._cc
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except:
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(self._cc, self._update_flags, self._writeback, self._operands) = \
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arm64.get_arch_info(detail.arch.arm64)
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return self._cc
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else:
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def __getattr__(self, name):
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attr = object.__getattribute__
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if not attr(self, '_cs')._detail:
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return None
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@property
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def update_flags(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_ARM:
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try:
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return self._update_flags
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except:
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(self._cc, self._update_flags, self._writeback, self._operands) = \
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arm.get_arch_info(detail.arch.arm)
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return self._update_flags
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elif self._cs.arch == CS_ARCH_ARM64:
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try:
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return self._update_flags
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except:
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(self._cc, self._update_flags, self._writeback, self._operands) = \
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arm64.get_arch_info(detail.arch.arm64)
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return self._update_flags
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else:
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return None
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@property
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def writeback(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_ARM:
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try:
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return self._writeback
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except:
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(self._cc, self._update_flags, self._writeback, self._operands) = \
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arm.get_arch_info(detail.arch.arm)
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return self._writeback
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elif self._cs.arch == CS_ARCH_ARM64:
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try:
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return self._writeback
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except:
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(self._cc, self._update_flags, self._writeback, self._operands) = \
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arm64.get_arch_info(detail.arch.arm64)
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return self._writeback
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else:
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return None
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@property
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def operands(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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try:
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return self._operands
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except:
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if self._cs.arch == CS_ARCH_ARM:
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(self._cc, self._update_flags, self._writeback, self._operands) = \
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arm.get_arch_info(detail.arch.arm)
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return self._operands
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elif self._cs.arch == CS_ARCH_ARM64:
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(self._cc, self._update_flags, self._writeback, self._operands) = \
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arm64.get_arch_info(detail.arch.arm64)
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return self._operands
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elif self._cs.arch == CS_ARCH_X86:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._operands
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elif self._cs.arch == CS_ARCH_MIPS:
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self._operands = mips.get_arch_info(detail.arch.mips)
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return self._operands
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if self._cs.arch == CS_ARCH_PPC:
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(self._bc, self._bh, self._update_cr0, self._operands) = \
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ppc.get_arch_info(detail.arch.ppc)
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return self._operands
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else:
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return None
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@property
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def bc(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_PPC:
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try:
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return self._bc
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except:
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(self._bc, self._bh, self._update_cr0, self._operands) = \
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ppc.get_arch_info(detail.arch.ppc)
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return self._bc
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else:
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return None
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@property
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def bh(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_PPC:
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try:
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return self._bh
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except:
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(self._bc, self._bh, self._update_cr0, self._operands) = \
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ppc.get_arch_info(detail.arch.ppc)
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return self._bh
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else:
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return None
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@property
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def update_cr0(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_PPC:
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try:
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return self._update_cr0
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except:
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(self._bc, self._bh, self._update_cr0, self._operands) = \
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ppc.get_arch_info(detail.arch.ppc)
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return self._update_cr0
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else:
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return None
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@property
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def prefix(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._prefix
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self.prefix
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else:
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return None
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@property
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def segment(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._segment
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._segment
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else:
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return None
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@property
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def opcode(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._opcode
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self.opcode
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else:
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return None
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@property
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def op_size(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._op_size
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._op_size
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else:
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return None
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@property
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def addr_size(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._addr_size
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._addr_size
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else:
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return None
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@property
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def disp_size(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._disp_size
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._disp_size
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else:
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return None
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@property
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def imm_size(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._imm_size
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._imm_size
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else:
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return None
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@property
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def modrm(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._modrm
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._modrm
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else:
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return None
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@property
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def sib(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._sib
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._sib
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else:
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return None
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@property
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def disp(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._disp
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._disp
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else:
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return None
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@property
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def sib_index(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._sib_index
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._sib_index
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else:
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return None
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@property
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def sib_scale(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._sib_scale
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._sib_scale
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else:
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return None
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@property
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def sib_base(self):
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if not self._cs._detail:
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return None
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detail = self._raw.detail.contents
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if self._cs.arch == CS_ARCH_X86:
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try:
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return self._sib_base
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except:
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(self._prefix, self._segment, self._opcode, self._op_size, self._addr_size, \
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self._disp_size, self._imm_size, self._modrm, self._sib, self._disp, \
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self._sib_index, self._sib_scale, self._sib_base, self._operands) = x86.get_arch_info(detail.arch.x86)
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return self._sib_base
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else:
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_dict = attr(self, '__dict__')
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if 'operands' not in _dict:
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self.__gen_detail()
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if name not in _dict:
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return None
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return _dict[name]
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# get the last error code
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def errno():
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|
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Reference in New Issue