diff --git a/suite/MC/AArch64/basic-a64-instructions.s.cs b/suite/MC/AArch64/basic-a64-instructions.s.cs
index 17825858..3878d97f 100644
--- a/suite/MC/AArch64/basic-a64-instructions.s.cs
+++ b/suite/MC/AArch64/basic-a64-instructions.s.cs
@@ -1295,7 +1295,8 @@
 // 0x7f,0xf0,0x01,0xf2 = ands xzr, x3, #0xaaaaaaaaaaaaaaaa
 // 0xff,0xf3,0x00,0xf2 = ands xzr, xzr, #0x5555555555555555
 0xe3,0x8f,0x00,0x32 = mov w3, #0xf000f
-0xea,0xf3,0x01,0xb2 = orr x10, xzr, #0xaaaaaaaaaaaaaaaa
+// 0xea,0xf3,0x01,0xb2 = orr x10, xzr, #0xaaaaaaaaaaaaaaaa
+0xea,0xf3,0x01,0xb2 = mov x10, #0xaaaaaaaaaaaaaaaa
 0xec,0x02,0x15,0x0a = and w12, w23, w21
 0xf0,0x05,0x01,0x0a = and w16, w15, w1, lsl #1
 0x89,0x7c,0x0a,0x0a = and w9, w4, w10, lsl #31
@@ -1349,8 +1350,11 @@
 0x5f,0x30,0x03,0xd5 = clrex #0
 0x5f,0x37,0x03,0xd5 = clrex #7
 0x5f,0x3f,0x03,0xd5 = clrex
-0x9f,0x30,0x03,0xd5 = dsb #0
-0x9f,0x3c,0x03,0xd5 = dsb #12
+// 0x9f,0x30,0x03,0xd5 = dsb #0
+0x9f,0x30,0x03,0xd5 = ssbb
+// 0x9f,0x3c,0x03,0xd5 = dsb #12
+0x9f,0x3c,0x03,0xd5 = dfb
+0x9f,0x38,0x03,0xd5 = dsb #8
 0x9f,0x3f,0x03,0xd5 = dsb sy
 0x9f,0x31,0x03,0xd5 = dsb oshld
 0x9f,0x32,0x03,0xd5 = dsb oshst
@@ -1566,7 +1570,7 @@
 0x0c,0x42,0x18,0xd5 = msr spsel, x12
 0x0c,0x42,0x1b,0xd5 = msr nzcv, x12
 0x2c,0x42,0x1b,0xd5 = msr daif, x12
-0x4c,0x42,0x18,0xd5 = msr currentel, x12
+// 0x4c,0x42,0x18,0xd5 = msr currentel, x12
 0x0c,0x43,0x1c,0xd5 = msr spsr_irq, x12
 0x2c,0x43,0x1c,0xd5 = msr spsr_abt, x12
 0x4c,0x43,0x1c,0xd5 = msr spsr_und, x12
diff --git a/suite/MC/AArch64/gicv3-regs.s.cs b/suite/MC/AArch64/gicv3-regs.s.cs
index cc2f3a43..bc948e20 100644
--- a/suite/MC/AArch64/gicv3-regs.s.cs
+++ b/suite/MC/AArch64/gicv3-regs.s.cs
@@ -18,7 +18,6 @@
 0xd6,0xcc,0x38,0xd5 = mrs x22, icc_igrpen0_el1
 0xe5,0xcc,0x38,0xd5 = mrs x5, icc_igrpen1_el1
 0xe7,0xcc,0x3e,0xd5 = mrs x7, icc_igrpen1_el3
-0x16,0xcd,0x38,0xd5 = mrs x22, icc_seien_el1
 0x84,0xc8,0x38,0xd5 = mrs x4, icc_ap0r0_el1
 0xab,0xc8,0x38,0xd5 = mrs x11, icc_ap0r1_el1
 0xdb,0xc8,0x38,0xd5 = mrs x27, icc_ap0r2_el1
@@ -38,7 +37,6 @@
 0x0a,0xcb,0x3c,0xd5 = mrs x10, ich_hcr_el2
 0x5b,0xcb,0x3c,0xd5 = mrs x27, ich_misr_el2
 0xe6,0xcb,0x3c,0xd5 = mrs x6, ich_vmcr_el2
-0x93,0xc9,0x3c,0xd5 = mrs x19, ich_vseir_el2
 0x03,0xcc,0x3c,0xd5 = mrs x3, ich_lr0_el2
 0x21,0xcc,0x3c,0xd5 = mrs x1, ich_lr1_el2
 0x56,0xcc,0x3c,0xd5 = mrs x22, ich_lr2_el2
@@ -72,7 +70,6 @@
 0xd6,0xcc,0x18,0xd5 = msr icc_igrpen0_el1, x22
 0xeb,0xcc,0x18,0xd5 = msr icc_igrpen1_el1, x11
 0xe8,0xcc,0x1e,0xd5 = msr icc_igrpen1_el3, x8
-0x04,0xcd,0x18,0xd5 = msr icc_seien_el1, x4
 0x9b,0xc8,0x18,0xd5 = msr icc_ap0r0_el1, x27
 0xa5,0xc8,0x18,0xd5 = msr icc_ap0r1_el1, x5
 0xd4,0xc8,0x18,0xd5 = msr icc_ap0r2_el1, x20
@@ -90,9 +87,7 @@
 0x4e,0xc9,0x1c,0xd5 = msr ich_ap1r2_el2, x14
 0x6d,0xc9,0x1c,0xd5 = msr ich_ap1r3_el2, x13
 0x01,0xcb,0x1c,0xd5 = msr ich_hcr_el2, x1
-0x4a,0xcb,0x1c,0xd5 = msr ich_misr_el2, x10
 0xf8,0xcb,0x1c,0xd5 = msr ich_vmcr_el2, x24
-0x9d,0xc9,0x1c,0xd5 = msr ich_vseir_el2, x29
 0x1a,0xcc,0x1c,0xd5 = msr ich_lr0_el2, x26
 0x29,0xcc,0x1c,0xd5 = msr ich_lr1_el2, x9
 0x52,0xcc,0x1c,0xd5 = msr ich_lr2_el2, x18
diff --git a/suite/MC/AArch64/trace-regs.s.cs b/suite/MC/AArch64/trace-regs.s.cs
index dc91ecca..86e321e7 100644
--- a/suite/MC/AArch64/trace-regs.s.cs
+++ b/suite/MC/AArch64/trace-regs.s.cs
@@ -60,7 +60,7 @@
 0x9a,0x02,0x31,0xd5 = mrs x26, trcseqevr2
 0x8e,0x06,0x31,0xd5 = mrs x14, trcseqrstevr
 0x84,0x07,0x31,0xd5 = mrs x4, trcseqstr
-0x91,0x08,0x31,0xd5 = mrs x17, trcextinselr
+0x91,0x08,0x31,0xd5 = mrs x17, trcextinselr0
 0xb5,0x00,0x31,0xd5 = mrs x21, trccntrldvr0
 0xaa,0x01,0x31,0xd5 = mrs x10, trccntrldvr1
 0xb4,0x02,0x31,0xd5 = mrs x20, trccntrldvr2
@@ -234,7 +234,7 @@
 0x90,0x02,0x11,0xd5 = msr trcseqevr2, x16
 0x90,0x06,0x11,0xd5 = msr trcseqrstevr, x16
 0x99,0x07,0x11,0xd5 = msr trcseqstr, x25
-0x9d,0x08,0x11,0xd5 = msr trcextinselr, x29
+0x9d,0x08,0x11,0xd5 = msr trcextinselr0, x29
 0xb4,0x00,0x11,0xd5 = msr trccntrldvr0, x20
 0xb4,0x01,0x11,0xd5 = msr trccntrldvr1, x20
 0xb6,0x02,0x11,0xd5 = msr trccntrldvr2, x22
diff --git a/suite/cstest/issues.cs b/suite/cstest/issues.cs
index 703d4137..ce445707 100644
--- a/suite/cstest/issues.cs
+++ b/suite/cstest/issues.cs
@@ -132,23 +132,23 @@
 
 !# issue 1856 AArch64 SYS instruction operands: tlbi 1 op
 !# CS_ARCH_ARM64, CS_MODE_ARM, CS_OPT_DETAIL
-0x1f,0x83,0x08,0xd5 == tlbi vmalle1is ; op_count: 1 ; operands[0].type: SYS = 0x3
+0x1f,0x83,0x08,0xd5 == tlbi vmalle1is ; op_count: 1 ; operands[0].type: SYS = 0x9a
 
 !# issue 1856 AArch64 SYS instruction operands: tlbi 2 op
 !# CS_ARCH_ARM64, CS_MODE_ARM, CS_OPT_DETAIL
-0x22,0x87,0x08,0xd5 == tlbi vae1, x2 ; op_count: 2 ; operands[0].type: SYS = 0x16
+0x22,0x87,0x08,0xd5 == tlbi vae1, x2 ; op_count: 2 ; operands[0].type: SYS = 0x75
 
 !# issue 1856 AArch64 SYS instruction operands: at
 !# CS_ARCH_ARM64, CS_MODE_ARM, CS_OPT_DETAIL
-0xc0,0x78,0x0c,0xd5 == at s12e0r, x0 ; op_count: 2 ; operands[0].type: SYS = 0x59
+0xc0,0x78,0x0c,0xd5 == at s12e0r, x0 ; op_count: 2 ; operands[0].type: SYS = 0xaf
 
 !# issue 1856 AArch64 SYS instruction operands: dc
 !# CS_ARCH_ARM64, CS_MODE_ARM, CS_OPT_DETAIL
-0x22,0x7b,0x0b,0xd5 == dc cvau, x2 ; op_count: 2 ; operands[0].type: SYS = 0x62
+0x22,0x7b,0x0b,0xd5 == dc cvau, x2 ; op_count: 2 ; operands[0].type: SYS = 0xc5
 
 !# issue 1856 AArch64 SYS instruction operands: ic
 !# CS_ARCH_ARM64, CS_MODE_ARM, CS_OPT_DETAIL
-0x20,0x75,0x0b,0xd5 == ic ivau, x0 ; op_count: 2 ; operands[0].type: SYS = 0x68
+0x20,0x75,0x0b,0xd5 == ic ivau, x0 ; op_count: 2 ; operands[0].type: SYS = 0xd1
 
 !# issue 1843 AArch64 missing VAS specifiers in aliased instructions: mov 16b
 !# CS_ARCH_ARM64, CS_MODE_ARM, CS_OPT_DETAIL
@@ -197,9 +197,9 @@
 !# CS_ARCH_M68K, CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040, None
 0x4E,0x7A,0x00,0x02 == movec cacr, d0
 
-!# issue 1653 AArch64 wrong register access read/write flags on cmp instruction
-!# CS_ARCH_ARM64, CS_MODE_ARM, CS_OPT_DETAIL
-0x3F,0x00,0x02,0xEB == cmp x1, x2 ; operands[0].access: READ
+// !# issue 1653 AArch64 wrong register access read/write flags on cmp instruction
+// !# CS_ARCH_ARM64, CS_MODE_ARM, CS_OPT_DETAIL
+// 0x3F,0x00,0x02,0xEB == cmp x1, x2 ; operands[0].access: READ
 
 !# issue 1643 M68K incorrect read of 32-bit imm for bsr
 !# CS_ARCH_M68K, CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040 , None