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989 Commits

Author SHA1 Message Date
Fotis Loukos 4d6b830deb Fixed myinttypes.h 2017-04-14 17:40:53 +03:00
Fotis Loukos ae6f2d1411 Added support for the TMS320C64x architecture. 2017-04-14 17:00:40 +03:00
Nguyen Anh Quynh 33bacd7b85 x86: support BND prefix. issue #872 2017-03-17 23:44:34 +08:00
Nguyen Anh Quynh f76c4dc090 x86: consistent register names ST0-ST7 with the asm output 2017-02-22 15:54:37 +08:00
Nguyen Anh Quynh 695e60be9d arm: add IMM operand for printPostIdxImm8s4Operand(). issue #861 2017-02-22 09:27:16 +08:00
Nguyen Anh Quynh eebd47d78a ppc: print 0 offset for memory operand. see issue #856 2017-02-19 21:28:05 +08:00
Nguyen Anh Quynh 76b94cba23 switch endian mode with cs_option() for Arm/Arm64/Mips/Sparc. fix issue #849 2017-02-01 11:19:00 +08:00
Vincent Bénony ad1d38b582 Fixes truncated immediate value in operand details 
The instruction encoded « 00 00 19 B2 » was correctly disassembled « orr x0, x0, #0x8000000080 », but the reported immediate value, in the detail structure, was truncated to 0x80 due to the cast.
 2017-01-26 17:10:16 +01:00
Daniel Collin 1510c4f26f Fixed incorrect 8-bit displacement 
8-bit displacement was treated as unsigned while it should actually be signed.
 2017-01-23 20:11:53 +01:00
Nguyen Anh Quynh 25a6bab761 arm: groups for Thumb SETEND instruction. ported from #843 2017-01-19 09:13:49 +08:00
Nguyen Anh Quynh c2b8488b66 x86: Fix the operand encoding in the test instruction for reduce set, issue #702 2017-01-03 01:33:21 +08:00
Nguyen Anh Quynh e985c455d2 Merge branch 'next' of https://github.com/aquynh/capstone into next 2017-01-03 01:06:06 +08:00
Nguyen Anh Quynh daabe1004d x86: Fix the operand encoding in the test instruction, issue #702 2017-01-03 01:05:52 +08:00
BartmanAbyss 6830660783 (M68k) make displacements signed (#836) 
* (M68k) make displacements signed

* (M68k) revert group changes

* (m68k) signed displacement in python bindings
 2017-01-01 01:11:48 +08:00
Nguyen Anh Quynh 6e247def0b arm: fix operand access info for Bcc & BL. see issue #826 2016-12-13 18:20:01 +07:00
Nguyen Anh Quynh e22c6c6100 arm: fix access info for RET. see issue #825 2016-12-13 18:02:51 +07:00
Nguyen Anh Quynh 06a4c383aa arm: fix decoding Thumb big-endian instructions. ported from PR #813 2016-11-14 21:37:23 +09:00
Nguyen Anh Quynh 030e9be4eb x86: fix instruction MOVAPS & MOVAPD. see issue #809 2016-11-11 11:27:34 +09:00
Nguyen Anh Quynh e25accac25 x86: fix (AT&T) instruction SLDT for issue #807 2016-11-08 11:46:21 +08:00
Nguyen Anh Quynh 24794deded x86: fix (AT&T) instruction lgs for issue #805 2016-11-08 11:39:10 +08:00
Nguyen Anh Quynh 5701c6b295 x86: fix (AT&T) ROL instruction in issue #804 2016-11-08 11:28:09 +08:00
Nguyen Anh Quynh 10bafd3bab x86: fix movw instruction in #789 2016-11-08 10:56:18 +08:00
Nguyen Anh Quynh bda181a6b5 x86: fix sysexit in #806 2016-11-08 10:29:07 +08:00
Samuel Chevet 8060ecbc0d Add X86_REG_EFLAGS to X86_CLC, X86_CLD, X86_CMC (#801) 
* add X86_REG_EFLAGS for X86_STC

* remove wrong X86_GRP_PRIVILEGE for X86_STC ; add X86_REG_EFLAGS for X86_STD

* Add X86_REG_EFLAGS to X86_CLC, X86_CLD, X86_CMC

* add X86_REG_EFLAGS to X86_CLC, X86_CLD, X86_CMC for reduced instructions too
 2016-10-28 21:49:41 +08:00
Samuel Chevet 57c3481e31 add X86_REG_EFLAGS for X86_STC (#797) 
* add X86_REG_EFLAGS for X86_STC

* remove wrong X86_GRP_PRIVILEGE for X86_STC ; add X86_REG_EFLAGS for X86_STD
 2016-10-28 03:23:50 +08:00
Andrew Dutcher 081e7dc978 Fix two missing register operands in X86 AT&T syntax (#791) 
* Bug fix: missing register operand in AT&T emitter for `movb %ax, imm`

* Bug fix: missing register operand in AT&T emitter for `movb %al, imm`
 2016-10-14 13:26:27 +08:00
Nguyen Anh Quynh 3ab94f7d9c x86: RET read/write stack register. this fixes issue #790 2016-10-13 20:44:42 +08:00
Satoshi Tanda cda8f0eb78 add explanation comment for use of CAPSTONE_API 
Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com>
 2016-09-28 17:22:36 -07:00
Satoshi Tanda 02609c367c fix compile error with capstone_static_winkernel 
The MSVC project capstone_static_winkernel uses __stdcall as a
default calling convention to fit with environment for Windows driver
development. This leads to a compile error in a use of qsort() with
regs_cmp() since it is compiled as a __stdcall function while qsort()
expects a __cdelc function.

This fix adds explicit calling convention to regs_cmp() for MSVC.

Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com>
 2016-09-28 08:00:22 -07:00
Satoshi Tanda c6592d5c7e suppress MSVC code analysis (PREfast) warnings for m68k 
Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com>
 2016-09-28 07:59:25 -07:00
Satoshi Tanda c7b00b3756 suppress MSVC code analysis (PREfast) warnings 
Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com>
 2016-09-28 07:33:39 -07:00
Ole André Vadla Ravnås de995b0edd Fix use of uninitialized value for some instructions 
Caught by Valgrind:

    Conditional jump or move depends on uninitialised value(s)
       at 0xD5BB6F: readModRM (X86DisassemblerDecoder.c:1528)
       by 0xD5BF02: getIDWithAttrMask (X86DisassemblerDecoder.c:1101)
       by 0xD5CC5E: getID (X86DisassemblerDecoder.c:1249)
       by 0xD5CC5E: decodeInstruction (X86DisassemblerDecoder.c:2335)
       by 0xD52009: X86_getInstruction (X86Disassembler.c:822)
       by 0xD51781: cs_disasm (cs.c:503)
 2016-09-27 08:51:16 +08:00
Nguyen Anh Quynh 53a4473c92 arm: update imm in printOperand() to fix error reported by @trufae in PR #764 2016-09-22 22:22:36 +08:00
Simorfo a7fce04074 AArch64 set good extender 2016-09-09 21:03:38 +08:00
Nguyen Anh Quynh 399dd9da81 Merge pull request #764 from akihikodaki/next 
arm: treat ARM address as unsigned
 2016-09-07 09:51:04 +08:00
Nguyen Anh Quynh fe8572d80f arm: fix issue #767 2016-09-05 23:05:03 +08:00
Akihiko Odaki e7e4e1dfda arm: treat ARM address as unsigned 
It should be unsigned because:
* It does arithmetic operations
* Format strings have "%u" instead of "%d"

# Conflicts:
#	arch/ARM/ARMInstPrinter.c
#	bindings/python/test_arm.py
#	tests/test_arm.c
 2016-09-04 00:13:50 +09:00
Nguyen Anh Quynh 24179e1b15 Merge branch 'fcompi' of https://github.com/mrexodia/capstone into mrexodia-fcompi 2016-09-03 00:34:27 +08:00
Nguyen Anh Quynh c6ddb2b553 arm: fix issue #760 2016-09-02 01:05:57 +08:00
mrexodia e7bc93c8de final change for fcomip and fucomip 2016-08-30 23:34:11 +02:00
mrexodia fb2c843f66 changed fcompi to fcomip and fucompi to fucomip 2016-08-30 23:10:04 +02:00
Nguyen Anh Quynh fc24d6d602 x86: fast path checking for X86_insn_reg_intel() 2016-08-27 20:54:37 +08:00
Nguyen Anh Quynh c3ef3df13c x86: fix issue #756 2016-08-27 13:06:59 +08:00
Nguyen Anh Quynh e93290962c arm64: add NEGS & NGCS alias instructions. this fixes issue #752 2016-08-23 14:01:17 +08:00
Nguyen Anh Quynh 65eec12d33 arm: fix issue #750 2016-08-17 16:23:40 +08:00
Nguyen Anh Quynh 383adcf41f cleanup 2016-08-17 16:20:52 +08:00
Nguyen Anh Quynh 452c4e934f arm: fix issue #747 2016-08-17 16:19:21 +08:00
Nguyen Anh Quynh 34ecce8b72 arm: fix issue #746 2016-08-15 20:00:40 +08:00
Nguyen Anh Quynh 08fd47e040 arm: fix issue #744 2016-08-13 13:25:52 +08:00
Nguyen Anh Quynh a4634b45dc Merge pull request #696 from emoon/m68k-reg-read-write 
[M68K] Implemented regs read/write lists
 2016-08-11 11:22:48 +08:00