6cfbd06b61
arch/M68k: do not return reg_name if beyond limits ( #1219 )
...
* arch/M68k: do not return reg_name if beyond limits
(patch coming from radare2)
* arch: checks index when returning reg names
2018-07-24 16:25:47 +08:00
afffa5d741
merge next to master
2018-07-20 12:36:50 +08:00
22ead3e0bf
Constify backend data ( #1040 )
...
* Constify string literals
Use -Wwrite-strings to force string literals to be of
type "const char[]", then fix up all warning fallout.
* Constify common infrastructure
Step one in allowing backend data to be readonly.
Minimal changes to backends for now; just set all pointers
in common structs that aren't modified to const.
* Constify AArch64 backend
Section size changes within libcapstone.so are
-.rodata 602587
-.data.rel.ro 228416
-.data 1003746
+.rodata 769051
+.data.rel.ro 241120
+.data 824578
* Constify ARM backend
Section size changes within libcapstone.so are
-.rodata 769051
-.data.rel.ro 241120
-.data 824578
+.rodata 959835
+.data.rel.ro 245120
+.data 629506
* Constify Mips backend
Section size changes within libcapstone.so are
-.rodata 959835
-.data.rel.ro 245120
-.data 629506
+.rodata 1069851
+.data.rel.ro 256416
+.data 508194
* Constify PowerPC backend
Section size changes within libcapstone.so are
-.rodata 1069851
-.data.rel.ro 256416
-.data 508194
+.rodata 1142715
+.data.rel.ro 272224
+.data 419490
* Constify Sparc backend
Section size changes within libcapstone.so are
-.rodata 1142715
-.data.rel.ro 272224
-.data 419490
+.rodata 1175227
+.data.rel.ro 277536
+.data 381666
* Constify SystemZ backend
Section size changes within libcapstone.so are
-.rodata 1175227
-.data.rel.ro 277536
-.data 381666
+.rodata 1221883
+.data.rel.ro 278016
+.data 334498
* Constify X86 backend
Section size changes within libcapstone.so are
-.rodata 1221883
-.data.rel.ro 278016
-.data 334498
+.rodata 1533531
+.data.rel.ro 281184
+.data 19714
* Constify XCore backend
Section size changes within libcapstone.so are
-.rodata 1533531
-.data.rel.ro 281184
-.data 19714
+.rodata 1553026
+.data.rel.ro 281280
+.data 40
2017-10-22 08:45:40 +08:00
9f6b28cc0b
Add name to relative branch group in supported architectures. ( #982 )
2017-08-01 16:49:43 +08:00
91d4273021
Add missing MIPS groups
2016-05-12 10:11:00 -07:00
5cb3fe320e
Add MIPS_GRP_XXX aliases for generic types.
2016-05-03 07:30:31 -07:00
901f407c0c
mips: remove alias_insns[]
2015-06-22 15:48:45 +08:00
517a0fe68e
mips: remove alias_insns map
2015-06-22 15:30:25 +08:00
ffb878ab53
mips: delete the alias map SUBU to NEGU. bug reported by @joelpx
2015-06-22 11:21:49 +08:00
2ad9eb2a43
mips: delete the alias map SUBU to NEGU. bug reported by @joelpx
2015-06-22 11:21:14 +08:00
1182d25759
simplify ARCH_group_name() by using lookup table as suggested by @learn_more. also added the missing group name for GRP_PRIVILEGE
2015-04-27 12:13:34 +08:00
efffe787d1
Add new API and start to provide access information for instruction operands
...
- New API cs_regs_access() that provide registers being read & modified by instruction
- New field cs_x86_op.access provides access info (READ, WRITE) for each operand
- New field cs_x86.eflags provides EFLAGS affected by instruction
- Extend cs_detail.{regs_read, regs_write} from uint8_t to uint16_t type
2015-03-25 15:02:13 +08:00
bb5dccedfa
core: put insns[] into separate .inc files to make it easier to manage
2015-03-08 10:54:32 +08:00
c87ccd1b89
mips: fix bugs in the last update
2015-03-02 17:31:44 +08:00
cfe18ad7ca
mips: update core
2015-03-02 15:12:42 +08:00
c2ea812ea7
fix cs_group_name() after the change on generic group ids
2014-10-31 15:36:19 +08:00
c64d6292fc
mips: remove MIPS_REG_PC register. reviewed by Jay Oster
2014-10-10 21:11:50 +08:00
9bf1b87a66
mips: fix out-of-bounds read error in Mips_reg_name(). issue reported by Coverity
2014-10-01 14:32:15 +08:00
d7e42b7d36
rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly
2014-09-29 17:15:25 +08:00
54f8cef449
mips: add JR.HB & JALR.HB instructions. also update Ocaml/Python/Java bindings
2014-09-24 22:53:54 +08:00
5691dd4637
mips: fixed & added new instructions. also updated Ocaml/Python/Java bindings
2014-09-24 18:03:47 +08:00
e0eb06b7ab
mips: correct mapping instruction string to instruction ID for alias instructions BAL & BEQZ. bug reported by Pancake
2014-08-29 22:40:38 +08:00
46a74e53b7
arm64: update core. this added a lot more details to cs_arm64_op struct
2014-08-25 16:47:12 +08:00
2124b8a9c9
mips: indentations
2014-08-15 16:37:03 +08:00
0f0eb9851a
mips: update core. this added bunch of new instructions & groups. updated Python & Java bindings accordingly
2014-08-14 18:26:39 +08:00
650f96ce43
add new API cs_group_name() to return group name in string, given the group id
2014-07-08 08:59:27 +08:00
5e2e660be7
fix some warnings reported by Coverity
2014-05-30 17:43:36 +08:00
9148420b0d
replace strcasecmp() with strcmp()
2014-05-28 12:57:46 +08:00
04f2ec6d0f
cleanup redundant headers included
2014-05-27 10:39:04 +08:00
984ed7e9e8
MIPS: Add HI, LO, and PC registers to MipsMapping.c
...
- Using MIPS_REG_HI, MIPS_REG_LO, and MIPS_REG_PC with cs_reg_name() caused out-of-bounds reads
2014-05-19 22:56:19 -07:00
1d2e69b869
msvc: remove headers/ directory & replace it with include/platform.h
2014-05-15 13:56:54 +08:00
b2a88df20f
MSVC added some code picked up by MingW, so cross-win32/74 compile is broken. this fixes the issue
2014-05-14 14:28:40 +08:00
8598a219f3
enable arch code from source with CAPSTONE_HAS_* for MSVC to pick up
2014-05-14 11:26:41 +08:00
bb0744df5d
do not initialize some local vars unnecessarily. this problem was introduced when we fixed C89 issues for MSVC
2014-05-12 13:41:49 +08:00
35c8467275
still want that to compile on other systems
2014-05-09 20:51:02 +01:00
42706a39e2
indentation with tab
2014-05-09 07:33:35 +08:00
779d4c75d9
first changes to get a successfully compiled version of capstone on VS2012
2014-05-08 23:44:49 +01:00
f6c7cbc972
core: fix some warnings
2014-03-12 12:50:54 +08:00
fc83a439e5
add diet compile option (CAPSTONE_DIET option in config.mk). This reduces binary size by around 40%
2014-02-22 23:26:27 +08:00
bc0b3b92fd
mips: update core
2014-02-19 15:13:20 +08:00
74c41ebb1d
mips: simplify handling alias insn
2014-02-18 17:57:06 +08:00
46018db884
Initial set of changes to support building with MSVC 2013. Right now there's a bunch fo assumptions in the .vcxproj file and some things are not as clean as they should be, but it does build a full build and works (at least the x86 side). The point of this initial checkpoint is to make sure that nothing breaks on the GCC side, that everyone is ok with the changes to the source (or if better fixes/typing can be done).
2014-01-22 09:45:00 -08:00
3732725342
rename mapping.c, mapping.h, module.c to have arch prefix. suggested by Alex Ionescu
2014-01-20 09:52:05 +08:00
Riccardo Schirone