* Update init of cs_detail for AArch64
as @aquynh requested in #1125
* Update init of cs_detail for ARM
as @aquynh requested in #1125
* Update init of cs_detail for EVM
as @aquynh requested in #1125
* Update init of cs_detail for M680X
as @aquynh requested in #1125
* Update init of cs_detail for M68K
as @aquynh requested in #1125
* Update init of cs_detail for Mips
as @aquynh requested in #1125
* Update init of cs_detail for PowerPC
as @aquynh requested in #1125
* Update init of cs_detail for Sparc
as @aquynh requested in #1125
* Update init of cs_detail for SystemZ
as @aquynh requested in #1125
* Update init of cs_detail for TMS320C64x
as @aquynh requested in #1125
* Update init of cs_detail for XCore
as @aquynh requested in #1125
* Comment on init of cs_detail
* wrap long lines
* Declare global arch arrays with contents (#1171)
This eliminates the need for archs_enable() and eliminates the racey
initialization.
This makes the architecture-specific init and option functions
non-static so that they may be called from a different file.
Cherry-picked 853a2870
* Add cs_arch_disallowed_mode_mask global
Cherry-pick 94bce437:
mips: CS_MODE_MIPS32R6 implies CS_MODE_32
Cherry-pick 8998a3a1:
ppc: fix endian check (#1029)
Fixes bug where endianness could not be set for ppc.
Remove `big_endian` field of `cs_struct`.
Added a helper macro `MODE_IS_BIG_ENDIAN()` to check if
`CS_MODE_BIG_ENDIAN` is set.
Refactored `cs_open()` check for valid mode out of arch-specific code
into arch-independent code. Also added a valid mode check to
`cs_option()`. The checks use a new global array
`cs_arch_disallowed_mode_mask[]`.
* Make global arrays static
Make all_arch uint32_t to guarantee a certain number of bits (with
adequate room for growth).
This eliminates the need for archs_enable() and eliminates the racey
initialization.
This makes the architecture-specific init, option, and destroy functions
non-static so that they may be called from a different file.
* Fix undefined shifts
Found by oss-fuzz
uint8_t gets promoted to integer
and integers shift cannot overflow on sign bit
* Fix undefined shifts
shifting 31 bits the sign bit
* Fix undefined shifts
uint8 gets promoted to signed integer
in ARM, MIPS, Sparc
in AArch64, PPC and Xcore
* fix undefined shift in powerpc
* Fix undefined shift in Mips
use mulitply instead
* Remove `big_endian` field of `cs_struct`
Added a helper macro `MODE_IS_BIG_ENDIAN()` to check if
`CS_MODE_BIG_ENDIAN` is set.
Refactored `cs_open()` check for valid mode out of arch-specific code
into arch-independent code. Also added a valid mode check to
`cs_option()`. The checks use a new global array
`arch_disallowed_mode_mask[]`, which is initialized in the arch-specific
`*_enable()` functions.
Fixes bug where endianness could not be set for ppc.
* Fix Mac OS brew for Travis CI
Added support for building binaries for Windows CE 7 on ARMv7 (a.k.a., Windows Embedded Compact 7) and for Windows CE 8 on ARMv7 (a.k.a., Windows Embedded Compact 2013).
Added support for building binaries for Windows CE 7 on ARMv7 (a.k.a., Windows Embedded Compact 7) and for Windows CE 8 on ARMv7 (a.k.a., Windows Embedded Compact 2013).
Replaced header inclusions of "stdint.h" and "intrin.h" by selective inclusions to support platforms that do not provide those headers. The header "platform.h" handles the platform test.
Updated the build script for Windows CE 7 on ARMv7.
- New API cs_regs_access() that provide registers being read & modified by instruction
- New field cs_x86_op.access provides access info (READ, WRITE) for each operand
- New field cs_x86.eflags provides EFLAGS affected by instruction
- Extend cs_detail.{regs_read, regs_write} from uint8_t to uint16_t type
Nguyen Anh Quynh