4948fd1b56
PPC: print 16bit imm as unsigned
2018-11-25 21:12:05 +07:00
afffa5d741
merge next to master
2018-07-20 12:36:50 +08:00
2b054af693
Use printint functions from SStream ( #1165 )
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in perticular, not to overflow -INT_MIN
2018-06-06 06:31:53 +08:00
d5c7b75a83
Fix undefined shifts ( #1158 )
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Use multiply instead
Found by oss-fuzz
2018-06-02 16:52:52 +08:00
fb798d3f9b
Undefined shifts ( #1154 )
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* Fix undefined shifts
uint8 gets promoted to signed integer
in ARM, MIPS, Sparc
in AArch64, PPC and Xcore
* fix undefined shift in powerpc
* Fix undefined shift in Mips
use mulitply instead
2018-06-02 16:49:36 +08:00
22ead3e0bf
Constify backend data ( #1040 )
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* Constify string literals
Use -Wwrite-strings to force string literals to be of
type "const char[]", then fix up all warning fallout.
* Constify common infrastructure
Step one in allowing backend data to be readonly.
Minimal changes to backends for now; just set all pointers
in common structs that aren't modified to const.
* Constify AArch64 backend
Section size changes within libcapstone.so are
-.rodata 602587
-.data.rel.ro 228416
-.data 1003746
+.rodata 769051
+.data.rel.ro 241120
+.data 824578
* Constify ARM backend
Section size changes within libcapstone.so are
-.rodata 769051
-.data.rel.ro 241120
-.data 824578
+.rodata 959835
+.data.rel.ro 245120
+.data 629506
* Constify Mips backend
Section size changes within libcapstone.so are
-.rodata 959835
-.data.rel.ro 245120
-.data 629506
+.rodata 1069851
+.data.rel.ro 256416
+.data 508194
* Constify PowerPC backend
Section size changes within libcapstone.so are
-.rodata 1069851
-.data.rel.ro 256416
-.data 508194
+.rodata 1142715
+.data.rel.ro 272224
+.data 419490
* Constify Sparc backend
Section size changes within libcapstone.so are
-.rodata 1142715
-.data.rel.ro 272224
-.data 419490
+.rodata 1175227
+.data.rel.ro 277536
+.data 381666
* Constify SystemZ backend
Section size changes within libcapstone.so are
-.rodata 1175227
-.data.rel.ro 277536
-.data 381666
+.rodata 1221883
+.data.rel.ro 278016
+.data 334498
* Constify X86 backend
Section size changes within libcapstone.so are
-.rodata 1221883
-.data.rel.ro 278016
-.data 334498
+.rodata 1533531
+.data.rel.ro 281184
+.data 19714
* Constify XCore backend
Section size changes within libcapstone.so are
-.rodata 1533531
-.data.rel.ro 281184
-.data 19714
+.rodata 1553026
+.data.rel.ro 281280
+.data 40
2017-10-22 08:45:40 +08:00
2fa3f02f2a
ppc: print 0 offset for memory operand. see issue #856
2017-02-19 21:28:05 +08:00
f15f3bc6f2
ppc: print 0 offset for memory operand. see issue #856
2017-02-19 21:27:17 +08:00
45e5eab646
port Windows driver support
2016-05-11 21:48:32 -07:00
5441d5c0f5
Do not truncate branch target address to 32 bit
2016-03-25 17:07:39 +01:00
586e439f75
fix some compilation warnings reported by MSVC
2016-03-08 00:49:15 +08:00
c2bc152176
ppc: avoid potential memleak issue when alias mnemonic is empty in PPC_printInst()
2015-06-06 19:11:25 +08:00
6183e381f9
ppc: avoid potential memleak issue when alias mnemonic is empty in PPC_printInst()
2015-06-06 18:06:38 +08:00
c4dbf077da
ppc: make sure alias mnememonic is not empty in PPC_printInst()
2015-06-06 16:10:07 +08:00
3cf62514ce
ppc: make sure alias mnememonic is not empty in PPC_printInst()
2015-06-06 16:09:15 +08:00
aa17e372d1
Fix building by MSVC 2010 lacking inttypes.h
2015-05-24 19:12:27 +02:00
b0217f6ebd
ppc: fix an warning on comparison of unsigned int
2015-05-16 09:25:29 +08:00
8102aacfda
Make PowerPC imm 64 bit (instad 32 bit)
2015-05-14 23:16:55 +02:00
bfcaba5851
2015
2015-03-04 17:45:23 +08:00
0be9eab6ba
ppc: update core
2015-03-04 17:06:48 +08:00
4e732c7db4
Populate PowerPC slwi/srwi instruction details with SH operand.
2014-11-23 00:15:19 +00:00
e07bc91349
ppc: fix a stupid mistake on printing operands of MR instruction
2014-11-11 13:12:22 +08:00
d82b28a75f
ppc: do not print a dot in front of absolute address. issue reported by @pancake
2014-11-11 11:05:20 +08:00
5c0d9a4ade
Add '4*cri+cond' to operand list
2014-10-17 14:52:03 +02:00
f2b699a716
Don't add cr0 to the operand list as it's not displayed by the disassembly
2014-10-02 20:53:55 +02:00
e96935ed68
ppc: remove duplicate op_addReg() in printAliasInstrEx()
2014-10-02 17:09:22 +08:00
48eb13c33c
ppc: add detail for alias instructions introduced in the latest change by @kratolp
2014-10-01 21:18:55 +08:00
6b731a097f
fix conflicts when merging
2014-10-01 21:05:51 +08:00
630bcd6d4e
ppc: c99
2014-10-01 21:02:30 +08:00
70fa90fbfe
ppc: coding style
2014-10-01 18:21:02 +08:00
73835104a4
Merge branch 'next' of https://github.com/aquynh/capstone into next
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Conflicts:
arch/PowerPC/PPCInstPrinter.c
2014-10-01 11:54:14 +02:00
a3f0aef79a
PPC: Fix absolute/relative offset for branch instruction
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PPC: Fix non handling of bc instruction that uses the CTR
2014-10-01 11:39:15 +02:00
7e644f0fea
ppc: initialize needComma to false. issue reported by Coverity
2014-10-01 14:13:48 +08:00
6756eddee5
ppc: alias instructions handled by printAliasInstrEx() miss CR* registers in detail mode. fixed
2014-09-29 23:32:14 +08:00
ca44c4897d
ppc: coding style for PPCInstPrinter.c
2014-09-29 17:58:20 +08:00
f0221a2aeb
* Fix pcc branch offset in a better way
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* Update PPC branch alias function to print cri register
* Fix immediate branch offset sign extension for bd type branch instruction
2014-09-29 10:59:12 +02:00
7e57e79800
ppc: handle branch condition for alias instructions. this also updates Python & Java bindings
2014-09-21 13:04:50 +08:00
9d6383973f
ppc: move our own alias instructions to PPCInstPrinter.c to isolate them from auto-gen code of LLVM
2014-09-20 12:02:19 +08:00
05d4b83391
Extend sign of the branch destination operand
2014-09-16 17:15:50 +02:00
f46ef2e0fe
ppc: alias instruction for 'gBC 4, 2, target' to 'bne target'. issue reported by @kratolp
2014-09-15 12:12:10 +08:00
721d07f6b2
ppc: support alias instructions. update Python & Java bindings accordingly
2014-09-04 12:03:31 +08:00
1ce5dea3e0
ppc: fix an unused variable warning
2014-08-20 11:51:46 +08:00
dd3deec1e9
ppc: update core. this added new instructions, groups & registers. updated Python & Java bindings accordingly
2014-08-15 13:26:12 +08:00
7f15f67544
ppc: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible
2014-06-16 12:11:50 +08:00
29fd0f6405
fix all the code in other non-X86 archs after the change made by commit 5329a6ffd4
2014-06-09 08:00:18 +07:00
2c20a1b5a3
ppc: wrong comparison in printOperand(). bug found by Coverity
2014-05-30 17:00:20 +08:00
6456481508
x86: add immediate operand (1) for SHL/SHR/ROR/ROL/SAR/SAL in detail mode & Intel syntax
2014-05-19 16:46:31 +08:00
8598a219f3
enable arch code from source with CAPSTONE_HAS_* for MSVC to pick up
2014-05-14 11:26:41 +08:00
bb0744df5d
do not initialize some local vars unnecessarily. this problem was introduced when we fixed C89 issues for MSVC
2014-05-12 13:41:49 +08:00
42706a39e2
indentation with tab
2014-05-09 07:33:35 +08:00
Nguyen Anh Quynh