65c0be823c
Fix undefined shifts ( #1156 )
...
* Fix undefined shifts
Found by oss-fuzz
uint8_t gets promoted to integer
and integers shift cannot overflow on sign bit
* Fix undefined shifts
shifting 31 bits the sign bit
2018-06-02 16:51:40 +08:00
5423b215bf
Constify backend data ( #1040 )
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* Constify string literals
Use -Wwrite-strings to force string literals to be of
type "const char[]", then fix up all warning fallout.
* Constify common infrastructure
Step one in allowing backend data to be readonly.
Minimal changes to backends for now; just set all pointers
in common structs that aren't modified to const.
* Constify AArch64 backend
Section size changes within libcapstone.so are
-.rodata 602587
-.data.rel.ro 228416
-.data 1003746
+.rodata 769051
+.data.rel.ro 241120
+.data 824578
* Constify ARM backend
Section size changes within libcapstone.so are
-.rodata 769051
-.data.rel.ro 241120
-.data 824578
+.rodata 959835
+.data.rel.ro 245120
+.data 629506
* Constify Mips backend
Section size changes within libcapstone.so are
-.rodata 959835
-.data.rel.ro 245120
-.data 629506
+.rodata 1069851
+.data.rel.ro 256416
+.data 508194
* Constify PowerPC backend
Section size changes within libcapstone.so are
-.rodata 1069851
-.data.rel.ro 256416
-.data 508194
+.rodata 1142715
+.data.rel.ro 272224
+.data 419490
* Constify Sparc backend
Section size changes within libcapstone.so are
-.rodata 1142715
-.data.rel.ro 272224
-.data 419490
+.rodata 1175227
+.data.rel.ro 277536
+.data 381666
* Constify SystemZ backend
Section size changes within libcapstone.so are
-.rodata 1175227
-.data.rel.ro 277536
-.data 381666
+.rodata 1221883
+.data.rel.ro 278016
+.data 334498
* Constify X86 backend
Section size changes within libcapstone.so are
-.rodata 1221883
-.data.rel.ro 278016
-.data 334498
+.rodata 1533531
+.data.rel.ro 281184
+.data 19714
* Constify XCore backend
Section size changes within libcapstone.so are
-.rodata 1533531
-.data.rel.ro 281184
-.data 19714
+.rodata 1553026
+.data.rel.ro 281280
+.data 40
2017-10-22 08:45:40 +08:00
7d5266d64c
sparc, systemz, xcore: getInstruction() should return boolean instead of DecodeStatus
2015-03-10 15:22:06 +08:00
0c07cc9b06
zero-out instruction details, mnemonic & op_str so cs_insn doesnt have garbage in Diet mode
2014-08-27 22:31:54 +08:00
cae09bf543
replace offset_of with offsetof from stddef.h
2014-06-17 14:58:39 +08:00
d06f3d662b
xcore: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free
2014-06-16 14:35:08 +08:00
69582d71ae
initialize cs_insn.detail by properly zero-out right members for each arch
2014-06-09 17:50:01 +07:00
c80d840ffc
add XCore architecture
2014-05-26 23:02:48 +08:00
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