ccd9066461
Replace CAPSTONE_API to mycallback and cs_skipdata_cb_t
2016-04-08 08:14:04 -07:00
375d7432c8
Rename CS_OPT_NONE to CS_OPT_INVALID
2016-04-08 08:05:06 -07:00
6dad56669b
Use CAPSTONE_API for cs_skipdata_cb_t
2016-04-03 18:05:58 -07:00
6bf747e5a5
Addressed compile errors occur when built as C++11
2016-03-31 18:12:34 -07:00
cf731a27c2
improve type safety, use ppc_reg instead of unsigned int
2015-12-13 12:53:44 +01:00
6960082f69
delete old code
2015-09-29 15:10:35 +08:00
7c74861085
https://github.com/aquynh/capstone/issues/483
2015-09-28 15:08:25 +08:00
d8d11edd43
suite: move fuzz_hardness.c to suite/fuzz/
2015-06-16 17:32:03 +08:00
48cb42d7a7
Add debug build target and fuzz testing harness.
2015-06-16 10:51:40 +02:00
9d60607645
inttypes.h fix
2015-03-29 18:29:06 +08:00
faa925ab8f
fix bindings (python/java) and tests after the last change on the type of imm of cs_arm64_op
2014-11-17 11:39:36 +08:00
84df600944
tests: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64
2014-11-13 11:27:51 +08:00
0d97a3b3aa
mips: CS_MODE_MIPS32R6 is an independent mode, and should not combine with CS_MODE_32
2014-11-13 11:12:52 +08:00
8cdafda551
arm: add new field mem_barrier to cs_arm struct. this requires changes in bindings
2014-11-11 22:30:30 +08:00
83466d4277
test: add sample code for ARM's CS_MODE_MCLASS & CS_MODE_V8
2014-11-11 21:44:42 +08:00
248519efea
mips: properly handle Mips32R6 mode. bug reported by Jay Oster
2014-11-09 14:07:07 +08:00
2f5081c1f9
tests: remove broken test on Mips's Micro mode
2014-10-29 22:36:11 +08:00
5720cb7ae1
tests: add tests for mips's modes: MIPS32R6 & MICRO (C & Python code)
2014-10-29 22:35:02 +08:00
5c0d9a4ade
Add '4*cri+cond' to operand list
2014-10-17 14:52:03 +02:00
f0acace803
Merge branch 'newapi' of https://github.com/aquynh/capstone into next
2014-10-12 10:30:57 +08:00
7170cb2ea2
tests: add some comments for test_iter.c
2014-10-11 10:43:27 +08:00
2d752f9e4e
tests: add introductions for test_skipdata.c & test_iter.c to README
2014-10-11 01:33:32 +08:00
0a2eca7c6c
modify API cs_disasm_iter() and add new API cs_malloc(). also adds sample code test_iter.c
2014-10-11 00:36:16 +08:00
8fb2eab459
arm: some operands can get subtracted from base register, thus have '-' sign associated. this adds subtracted field into cs_arm_op to provide this info. issue reported by Yegor Derevenets
2014-10-06 20:27:25 +08:00
910a4df9a3
tests: compile without -O3 flag. this is to make it easier to maintain FreeBSD package
2014-10-02 15:49:53 +08:00
839890b83a
tests: use cs_group_name() to print out group names in test_detail.c & test_detail.py
2014-10-01 10:51:18 +08:00
54f8cef449
mips: add JR.HB & JALR.HB instructions. also update Ocaml/Python/Java bindings
2014-09-24 22:53:54 +08:00
ced9d24e35
Workaround missing <inttypes.h> on MSVC 2010
2014-09-21 17:27:11 +02:00
7e57e79800
ppc: handle branch condition for alias instructions. this also updates Python & Java bindings
2014-09-21 13:04:50 +08:00
04d9f8ee17
arm: update core with a lot more details provided in detail mode now. update Python & Java bindings to reflect the core's changes
2014-09-01 23:27:24 +08:00
4f0d7048cd
arm64: vector_index = 0 is valid. this changed invalid value of vector_index to -1
2014-08-29 15:11:23 +08:00
0beb0d494b
api: get back the old API cs_disasm() & mark cs_disasm_ex() deprecated. cs_disasm_ex() will be removed in the future
2014-08-27 22:55:29 +08:00
9be1f93f88
fixed warnings in MSVC x64 compilation
2014-08-26 23:51:12 +08:00
5166236e1c
python: update after the latest changes in the core on arm64
2014-08-25 17:28:34 +08:00
46a74e53b7
arm64: update core. this added a lot more details to cs_arm64_op struct
2014-08-25 16:47:12 +08:00
0df7e93a3c
Change the prototype of the callback in SKIPDATA option. Suggested by Ben Nagy.
...
Original prototype:
typedef size_t (*cs_skipdata_cb_t)(const uint8_t *code, uint64_t offset, void* user_data);
Now we add @code_size argument to reflect the size of the input buffer @code.
Also, we change the data type of @offset to size_t because this argument indicates the
distance from currently examining bytes to @code, but not the address of the byte.
typedef size_t (*cs_skipdata_cb_t)(const uint8_t *code, size_t code_size, size_t offset, void* user_data);
2014-07-10 15:42:16 +08:00
faf368b656
Merge branch 'next' into opsize
2014-07-07 11:59:36 +08:00
ffc8aaa38a
Fix minor style inconsistency
2014-07-04 23:39:59 +02:00
b202b914f9
Simplify universal builds by relying on the linker to do the right thing
2014-07-04 23:38:20 +02:00
6583f069a7
Fix universal build support for Mac and iOS
2014-07-04 23:09:19 +02:00
9f6ed7155a
x86: add @rex to cs_x86 struct. updated python & java binding for this change
2014-07-01 10:13:28 +08:00
1a66fecdbc
x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change
2014-06-26 12:09:15 +08:00
92a3d4c079
x86: add AVX's zero_opmask to cs_x86_op struct. updated Python & Java bindings for this change
2014-06-25 23:10:39 +08:00
f1ec52628e
x86: provide size for X86_OP_IMM operand. thank Gabriel Quadros for some suggestions
2014-06-25 22:03:18 +08:00
4c5eabc32b
x86: support SSE_CC & AVX_CC in cs_x86 struct. this also updates Python & Java bindings
2014-06-24 23:50:41 +08:00
0d716450fc
x86: add avx_bcast to cs_x86_op to support AVX512 instructions. this also updates Python & Java binding
2014-06-24 22:51:56 +08:00
bb6440c5ef
x86: extend cs_x86.opcode to 4 bytes to contain EVEX opcode. this also updates Python binding following this interface change
2014-06-24 21:46:54 +08:00
14ba46bfab
x86: add segment to x86_op_mem struct. this fixes a bug in generating detail for instructions with segment override. bug reported by Sean Heelan.
2014-06-24 14:32:01 +08:00
d948dd42b8
tests/test_x86: prefix[] size is now 4, not 5
2014-06-20 13:55:24 +08:00
1085073f8f
x86: remove disp_size, imm_size, op_size. add size to each operand. thanks Gabriel Quadros for some nice ideas
2014-06-18 12:16:24 +08:00
tandasat