e3edf79e7e
ppc: BDZLA is absolute branch. fix issue #968
2019-05-16 11:06:24 +08:00
30627ba853
ppc: alias for Bcc instructions. issue #1468
2019-05-10 00:57:03 +08:00
faa962426f
ppc: proper map internal register ID to public register ID
2019-05-09 18:26:45 +08:00
0c31f14db1
ppc: print condition register bits. issue #1469
2019-05-08 13:56:40 +08:00
6077ee133f
ppc: fix target address of B. issue #1468
2019-05-07 16:08:45 +08:00
11206deb78
ppc: sync with llvm 7.0.1
2019-04-30 13:50:42 +08:00
6cfbd06b61
arch/M68k: do not return reg_name if beyond limits ( #1219 )
...
* arch/M68k: do not return reg_name if beyond limits
(patch coming from radare2)
* arch: checks index when returning reg names
2018-07-24 16:25:47 +08:00
afffa5d741
merge next to master
2018-07-20 12:36:50 +08:00
22ead3e0bf
Constify backend data ( #1040 )
...
* Constify string literals
Use -Wwrite-strings to force string literals to be of
type "const char[]", then fix up all warning fallout.
* Constify common infrastructure
Step one in allowing backend data to be readonly.
Minimal changes to backends for now; just set all pointers
in common structs that aren't modified to const.
* Constify AArch64 backend
Section size changes within libcapstone.so are
-.rodata 602587
-.data.rel.ro 228416
-.data 1003746
+.rodata 769051
+.data.rel.ro 241120
+.data 824578
* Constify ARM backend
Section size changes within libcapstone.so are
-.rodata 769051
-.data.rel.ro 241120
-.data 824578
+.rodata 959835
+.data.rel.ro 245120
+.data 629506
* Constify Mips backend
Section size changes within libcapstone.so are
-.rodata 959835
-.data.rel.ro 245120
-.data 629506
+.rodata 1069851
+.data.rel.ro 256416
+.data 508194
* Constify PowerPC backend
Section size changes within libcapstone.so are
-.rodata 1069851
-.data.rel.ro 256416
-.data 508194
+.rodata 1142715
+.data.rel.ro 272224
+.data 419490
* Constify Sparc backend
Section size changes within libcapstone.so are
-.rodata 1142715
-.data.rel.ro 272224
-.data 419490
+.rodata 1175227
+.data.rel.ro 277536
+.data 381666
* Constify SystemZ backend
Section size changes within libcapstone.so are
-.rodata 1175227
-.data.rel.ro 277536
-.data 381666
+.rodata 1221883
+.data.rel.ro 278016
+.data 334498
* Constify X86 backend
Section size changes within libcapstone.so are
-.rodata 1221883
-.data.rel.ro 278016
-.data 334498
+.rodata 1533531
+.data.rel.ro 281184
+.data 19714
* Constify XCore backend
Section size changes within libcapstone.so are
-.rodata 1533531
-.data.rel.ro 281184
-.data 19714
+.rodata 1553026
+.data.rel.ro 281280
+.data 40
2017-10-22 08:45:40 +08:00
1182d25759
simplify ARCH_group_name() by using lookup table as suggested by @learn_more. also added the missing group name for GRP_PRIVILEGE
2015-04-27 12:13:34 +08:00
efffe787d1
Add new API and start to provide access information for instruction operands
...
- New API cs_regs_access() that provide registers being read & modified by instruction
- New field cs_x86_op.access provides access info (READ, WRITE) for each operand
- New field cs_x86.eflags provides EFLAGS affected by instruction
- Extend cs_detail.{regs_read, regs_write} from uint8_t to uint16_t type
2015-03-25 15:02:13 +08:00
b8ffb86b02
ppc: fix a bug in QPX mode & add some QPX alias instructions.
2015-03-12 16:52:31 +08:00
0cc0543486
ppc: add missing groups to group_name_maps[]. bug reported by Coverity
2015-03-12 00:30:44 +08:00
8c212fd25e
ppc: add the missing Q0 register to reg_name_maps[]. bug reported by Coverity
2015-03-11 10:29:08 +08:00
bb5dccedfa
core: put insns[] into separate .inc files to make it easier to manage
2015-03-08 10:54:32 +08:00
bfcaba5851
2015
2015-03-04 17:45:23 +08:00
0be9eab6ba
ppc: update core
2015-03-04 17:06:48 +08:00
674db4c96f
ppc: fix some compilation bugs when DIET mode is enable
2014-12-16 22:12:23 +08:00
c00bc2efb6
fix the left-over C89 issues introduced by Pedro
2014-11-21 19:29:47 +08:00
68197d9a5e
Make it C89 compatible.
2014-11-20 13:45:43 +00:00
202da41980
Fix compiler warnings about different sizes and sign.
2014-11-20 12:13:19 +00:00
c2ea812ea7
fix cs_group_name() after the change on generic group ids
2014-10-31 15:36:19 +08:00
73835104a4
Merge branch 'next' of https://github.com/aquynh/capstone into next
...
Conflicts:
arch/PowerPC/PPCInstPrinter.c
2014-10-01 11:54:14 +02:00
a3f0aef79a
PPC: Fix absolute/relative offset for branch instruction
...
PPC: Fix non handling of bc instruction that uses the CTR
2014-10-01 11:39:15 +02:00
e135056f17
fix a negative array index read in PPC_alias_insn(). issue reported by Coverity
2014-10-01 14:23:35 +08:00
d7e42b7d36
rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly
2014-09-29 17:15:25 +08:00
7e57e79800
ppc: handle branch condition for alias instructions. this also updates Python & Java bindings
2014-09-21 13:04:50 +08:00
eaecfa4925
ppc: add PPC_INS_BNE for alias instruction BNE
2014-09-16 23:13:14 +08:00
721d07f6b2
ppc: support alias instructions. update Python & Java bindings accordingly
2014-09-04 12:03:31 +08:00
159ddbd99f
ppc: add new groups to group_name_maps[]
2014-08-15 16:35:12 +08:00
91a64776a8
ppc: fix a mistake on interpreting CR registers by deleting CR8 -> CR31
2014-08-15 13:48:11 +08:00
dd3deec1e9
ppc: update core. this added new instructions, groups & registers. updated Python & Java bindings accordingly
2014-08-15 13:26:12 +08:00
650f96ce43
add new API cs_group_name() to return group name in string, given the group id
2014-07-08 08:59:27 +08:00
04f2ec6d0f
cleanup redundant headers included
2014-05-27 10:39:04 +08:00
8598a219f3
enable arch code from source with CAPSTONE_HAS_* for MSVC to pick up
2014-05-14 11:26:41 +08:00
f6c7cbc972
core: fix some warnings
2014-03-12 12:50:54 +08:00
fc83a439e5
add diet compile option (CAPSTONE_DIET option in config.mk). This reduces binary size by around 40%
2014-02-22 23:26:27 +08:00
8b915ed765
ppc: update core
2014-02-19 17:01:44 +08:00
585018f831
ppc & arm: remove functions *_get_insn_id2()
2014-02-18 00:13:34 +08:00
b57c90dd23
fix some issues introduced by MSVC port
2014-01-23 21:43:08 +08:00
46018db884
Initial set of changes to support building with MSVC 2013. Right now there's a bunch fo assumptions in the .vcxproj file and some things are not as clean as they should be, but it does build a full build and works (at least the x86 side). The point of this initial checkpoint is to make sure that nothing breaks on the GCC side, that everyone is ok with the changes to the source (or if better fixes/typing can be done).
2014-01-22 09:45:00 -08:00
3732725342
rename mapping.c, mapping.h, module.c to have arch prefix. suggested by Alex Ionescu
2014-01-20 09:52:05 +08:00
Nguyen Anh Quynh