Commit Graph

15 Commits

Author SHA1 Message Date
Rot127 926cfebd6b Architecture updater (auto-sync) - Updating PPC (#2013) 2023-09-05 12:24:59 +08:00
Rot127 104f693c11 Architecture updater (auto-sync) - Updating ARM (#1949)
* Add auto-sync updater.

* Update Capstone core with auto-sync changes.

* Update ARM via auto-sync.

* Make changes to arch modules which are introduced by auto-sync.

* Update tests for ARM.

* Fix build warnings for make

* Remove meson.build

* Print shift amount in decimal

* Patch non LLVM register alias.

* Change type of immediate operand to unsiged (due to: #771)

* Replace all occurances of a register with its alias.

* Fix printing of signed imms

* Print rotate amount in decimal

* CHange imm type to int64_t to match LLVM imm type.

* Fix search for register names, by completing string first.

* Print ModImm operands always in decimal

* Use number format of previous capstone version.

* Correct implicit writes and update_flags according to SBit.

* Add missing test for RegImmShift

* Reverse incorrect comparision.

* Set shift information for move instructions.

* Set mem access for all memory operands

* Set subtracted flag if offset is negative.

* Add flag for post-index memory operands.

* Add detail op for BX_RET and MOVPCLR

* Use instruction post_index operand.

* Add VPOP and VPUSH as unique CS IDs.

* Add shifting info for MOVsr.

* Add TODOs.

* Add in LLVM hardcoded operands to detail.

* Move detail editing from InstPrinter to Mapping

* Formatting

* Add removed check.

* Add writeback register and constraints to RFEI instructions.

* Translate shift immediate

* Print negative immediates

* Remove duplicate invalid entry

* Add CS groups to instructions

* Fix write attriutes of stores.

* Add missing names of added instructions

* Fix LLVM bug

* Add more post_index flags

* http -> https

* Make generated functions static

* Remove tab prefix for alias instructions.

* Set ValidateMCOperand to NULL.

* Fix AddrMode3Operand operands

* Allow getting system and banked register name via API

* Add writeback to STC/LDC instructions.

* Fix (hopefully) last case where disp is negative and subtracted = true

* Remove accidentially introduced regressions
2023-07-19 17:56:27 +08:00
Nguyen Anh Quynh b543c345ca ppc: sync with llvm 7.0.1 2019-04-30 13:50:42 +08:00
Nguyen Anh Quynh f407e94249 arm64: sync with LLVM 7.0.1 2019-04-10 14:17:08 +08:00
Nguyen Anh Quynh 3dcdcfa713 sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
Nguyen Anh Quynh 76c1c3c4e9 merge next to master 2018-07-20 12:36:50 +08:00
Richard Henderson 5423b215bf Constify backend data (#1040)
* Constify string literals

Use -Wwrite-strings to force string literals to be of
type "const char[]", then fix up all warning fallout.

* Constify common infrastructure

Step one in allowing backend data to be readonly.
Minimal changes to backends for now; just set all pointers
in common structs that aren't modified to const.

* Constify AArch64 backend

Section size changes within libcapstone.so are

-.rodata               602587
-.data.rel.ro          228416
-.data                1003746
+.rodata               769051
+.data.rel.ro          241120
+.data                 824578

* Constify ARM backend

Section size changes within libcapstone.so are

-.rodata               769051
-.data.rel.ro          241120
-.data                 824578
+.rodata               959835
+.data.rel.ro          245120
+.data                 629506

* Constify Mips backend

Section size changes within libcapstone.so are

-.rodata               959835
-.data.rel.ro          245120
-.data                 629506
+.rodata              1069851
+.data.rel.ro          256416
+.data                 508194

* Constify PowerPC backend

Section size changes within libcapstone.so are

-.rodata              1069851
-.data.rel.ro          256416
-.data                 508194
+.rodata              1142715
+.data.rel.ro          272224
+.data                 419490

* Constify Sparc backend

Section size changes within libcapstone.so are

-.rodata              1142715
-.data.rel.ro          272224
-.data                 419490
+.rodata              1175227
+.data.rel.ro          277536
+.data                 381666

* Constify SystemZ backend

Section size changes within libcapstone.so are

-.rodata              1175227
-.data.rel.ro          277536
-.data                 381666
+.rodata              1221883
+.data.rel.ro          278016
+.data                 334498

* Constify X86 backend

Section size changes within libcapstone.so are

-.rodata              1221883
-.data.rel.ro          278016
-.data                 334498
+.rodata              1533531
+.data.rel.ro          281184
+.data                  19714

* Constify XCore backend

Section size changes within libcapstone.so are

-.rodata              1533531
-.data.rel.ro          281184
-.data                  19714
+.rodata              1553026
+.data.rel.ro          281280
+.data                     40
2017-10-22 08:45:40 +08:00
Koutheir Attouchi 9f2070748c Added support for building binaries for Windows CE 7 on ARMv7 (a.k.a., Windows Embedded Compact 7) and for Windows CE 8 on ARMv7 (a.k.a., Windows Embedded Compact 2013).
Added support for building binaries for Windows CE 7 on ARMv7 (a.k.a., Windows Embedded Compact 7) and for Windows CE 8 on ARMv7 (a.k.a., Windows Embedded Compact 2013).

Added support for building binaries for Windows CE 7 on ARMv7 (a.k.a., Windows Embedded Compact 7) and for Windows CE 8 on ARMv7 (a.k.a., Windows Embedded Compact 2013).

Replaced header inclusions of "stdint.h" and "intrin.h" by selective inclusions to support platforms that do not provide those headers. The header "platform.h" handles the platform test.
Updated the build script for Windows CE 7 on ARMv7.
2016-04-07 17:05:00 +02:00
Nguyen Anh Quynh bfcaba5851 2015 2015-03-04 17:45:23 +08:00
Nguyen Anh Quynh 03a1836454 arm64: set absolute (rather than relative) address B/BL. issue reported by Pancake 2014-12-12 22:06:06 +08:00
Nguyen Anh Quynh c109e8eef3 arm64: print shifter in decimal mode. this is to be consistent with ARM engine 2014-11-08 13:58:50 +08:00
Nguyen Anh Quynh 46a74e53b7 arm64: update core. this added a lot more details to cs_arm64_op struct 2014-08-25 16:47:12 +08:00
Nguyen Anh Quynh b76233c648 avoid using vsnprintf when possible for SStream_concat() to improve performance. based on the idea of Dang Hoang Vu. 2014-06-04 18:31:02 +08:00
Nguyen Anh Quynh 6023ef7843 Disassembler -> Disassembly 2014-04-29 11:21:04 +08:00
Nguyen Anh Quynh 26ee41aa67 initial import 2013-11-27 12:11:31 +08:00