Andrew Calvano 7925323569 Bug fix for incorrect operand type in certain load/store instructions on AArch64. (#952)

2017-08-03 23:00:53 +08:00

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AArch64

Bug fix for incorrect operand type in certain load/store instructions on AArch64. (#952)

2017-08-03 23:00:53 +08:00

ARM

arm: UADD8 updates flags. fix #980

2017-07-31 01:06:17 +07:00

Mips

switch endian mode with cs_option() for Arm/Arm64/Mips/Sparc. fix issue #849

2017-02-01 11:17:13 +08:00

PowerPC

ppc: print 0 offset for memory operand. see issue #856

2017-02-19 21:27:17 +08:00

Sparc

switch endian mode with cs_option() for Arm/Arm64/Mips/Sparc. fix issue #849

2017-02-01 11:17:13 +08:00

SystemZ

remove myinttypes.h

2016-04-26 09:47:30 +08:00

X86

x86: MOV AL, [mem] has 2 operands. fix #959

2017-07-08 13:58:36 +07:00

XCore

suppress MSVC code analysis (PREfast) warnings

2016-09-27 08:08:58 -07:00