Vincent Bénony 9271db7c7f Fixes truncated immediate value in operand details ... The instruction encoded « 00 00 19 B2 » was correctly disassembled « orr x0, x0, #0x8000000080 », but the reported immediate value, in the detail structure, was truncated to 0x80 due to the cast.		2017-01-26 17:10:16 +01:00
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AArch64	Fixes truncated immediate value in operand details	2017-01-26 17:10:16 +01:00
ARM	arm: groups for Thumb SETEND instruction. ported from #843	2017-01-19 09:13:49 +08:00
M68K	Fixed incorrect 8-bit displacement	2017-01-23 20:11:53 +01:00
Mips	fix merging conflict	2016-05-22 08:58:33 +08:00
PowerPC	Merge remote-tracking branch 'upstream/next' into next	2016-05-11 22:52:34 -07:00
Sparc	suppress MSVC code analysis (PREfast) warnings	2016-09-28 07:33:39 -07:00
SystemZ	Merge remote-tracking branch 'upstream/next' into next	2016-05-11 22:52:34 -07:00
X86	x86: Fix the operand encoding in the test instruction for reduce set, issue #702	2017-01-03 01:33:21 +08:00
XCore	suppress MSVC code analysis (PREfast) warnings	2016-09-28 07:33:39 -07:00