Virtualization
/
capstone
mirror of https://gitlab.com/qemu-project/capstone.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
capstone/arch/X86
History
Ole André Vadla Ravnås e0276cdb64 Fix use of uninitialized value for some instructions 
Caught by Valgrind:

    Conditional jump or move depends on uninitialised value(s)
       at 0xD5BB6F: readModRM (X86DisassemblerDecoder.c:1528)
       by 0xD5BF02: getIDWithAttrMask (X86DisassemblerDecoder.c:1101)
       by 0xD5CC5E: getID (X86DisassemblerDecoder.c:1249)
       by 0xD5CC5E: decodeInstruction (X86DisassemblerDecoder.c:2335)
       by 0xD52009: X86_getInstruction (X86Disassembler.c:822)
       by 0xD51781: cs_disasm (cs.c:503)
 		2016-09-26 15:01:18 +02:00
..
X86ATTInstPrinter.c x86: fix issue #717 2016-06-26 01:03:26 +08:00
X86BaseInfo.h x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change 2014-08-13 13:01:50 +08:00
X86Disassembler.c remove myinttypes.h 2016-04-26 09:47:30 +08:00
X86Disassembler.h skip stdint.h for windows driver configuration 2016-04-23 15:58:31 -07:00
X86DisassemblerDecoder.c Fix use of uninitialized value for some instructions 2016-09-26 15:01:18 +02:00
X86DisassemblerDecoder.h skip stdint.h for windows driver configuration 2016-04-23 15:58:31 -07:00
X86DisassemblerDecoderCommon.h skip stdint.h for windows driver configuration 2016-04-23 15:58:31 -07:00
X86GenAsmWriter.inc x86: make all shifted instructions to support first operand in AT&T syntax 2015-05-08 14:23:08 +08:00
X86GenAsmWriter1.inc x86: make all shifted instructions to support first operand in AT&T syntax 2015-05-08 14:23:08 +08:00
X86GenAsmWriter1_reduce.inc x86: make all shifted instructions to support first operand in AT&T syntax 2015-05-08 14:23:08 +08:00
X86GenAsmWriter_reduce.inc x86: make all shifted instructions to support first operand in AT&T syntax 2015-05-08 14:23:08 +08:00
X86GenDisassemblerTables.inc x86: more encodings for FXCH & FCOMP. also print LJUMP without * as prefix for Intel syntax. handle BOUND & FARCALL better 2014-12-26 16:49:10 +08:00
X86GenDisassemblerTables_reduce.inc x86: more encodings for FXCH & FCOMP. also print LJUMP without * as prefix for Intel syntax. handle BOUND & FARCALL better 2014-12-26 16:49:10 +08:00
X86GenInstrInfo.inc x86: more encodings for FXCH & FCOMP. also print LJUMP without * as prefix for Intel syntax. handle BOUND & FARCALL better 2014-12-26 16:49:10 +08:00
X86GenInstrInfo_reduce.inc x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86GenRegisterInfo.inc x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change 2014-08-13 13:01:50 +08:00
X86InstPrinter.h Disassembler -> Disassembly 2014-05-27 10:45:58 +08:00
X86IntelInstPrinter.c address warnings with capstone_static_winkernel 2016-05-04 05:54:28 -07:00
X86Mapping.c LOOP* branch fix for full x64 instructions 2015-10-18 19:42:31 +02:00
X86Mapping.h x86: add missing operands in detail mode for 'IN/OUT reg, reg' instructions. bug reported by Andrew Wesie 2014-12-12 11:25:12 +08:00
X86Module.c Silencing Clang warning bys casting values 2015-03-02 22:11:55 -05:00