Nguyen Anh Quynh efc9036063 x86: AT&T syntax bug with zero offset segment register. see #884

2017-05-06 10:38:08 +08:00

..

AArch64

replace if-s in AArch64_AM_decodeAdvSIMDModImmType10 with lookup table (#552)

2017-04-15 09:50:06 +08:00

ARM

arm: POP {reg} read/write SP register. this fixes #913

2017-05-04 17:21:41 +08:00

Mips

switch endian mode with cs_option() for Arm/Arm64/Mips/Sparc. fix issue #849

2017-02-01 11:17:13 +08:00

PowerPC

ppc: print 0 offset for memory operand. see issue #856

2017-02-19 21:27:17 +08:00

Sparc

switch endian mode with cs_option() for Arm/Arm64/Mips/Sparc. fix issue #849

2017-02-01 11:17:13 +08:00

SystemZ

remove myinttypes.h

2016-04-26 09:47:30 +08:00

X86

x86: AT&T syntax bug with zero offset segment register. see #884

2017-05-06 10:38:08 +08:00

XCore

suppress MSVC code analysis (PREfast) warnings

2016-09-27 08:08:58 -07:00