mirror of
https://gitlab.com/qemu-project/capstone.git
synced 2025-07-03 04:42:13 +08:00
4298f3f84b
* test suite
* updating issue dispatcher
* fixing
* add makefile
* fixing addStr
* done
* Done test system
* remove garbage
* re-construct project
* re-construct project
* fix Makefile
* fixing
* fix detail
* fixing
* done fix
* add name to CREDITS.TXT
* fix issue
* fix getopt warning
* fix README
* Update README.md
* fix usage
* report.py: print details/general informations
* fix offset
* cstest: README
* cstest: coding style
* cstest: rename some functions for better consistency
* cstest: make report.py executable
* cstest: README
* cstest: remove double spaces in MC/
* cstest: more cleanup
* CREDITS.TXT
* fixed Mos65xx not included in MacOS; Add -D option to report; Add NOREGNAME while testing
* remove space/tab
* remove ifndef
* cstest: cleanup
* MC: normalize suite/MC/SystemZ/insn-good.s.cs
* fix noregname
* MC: fix thumb offset
* MC: fix more thumb offset
* MC: use lowercase for testcases
* MC: use lowercase for testcases
* MC: remove FP tests of Arm64
* MC: dup = mov (arm64)
* fixing
* MC: fix arm offset
* cstest: code style
* cstest: code style
* MC: try comment out
* fixing capstone_test.c
* done fixing
* cstest: indentation
* cstest: protopye for trim_str & replace_hex
* MC: normalize SysZ input
* MC: alias instructions for Sparc
* MC: alias instructions for PPC
* x86: support CS_OPT_UNSIGNED for ATT syntax
* Revert "x86: support CS_OPT_UNSIGNED for ATT syntax"
This reverts commit 911af545ab.
* fix crash
* MC: alias registers for Mips
* MC: alias registers for Mips - v1
* MC: alias registers for Mips
* MC: alias registers for Mips
* MC: more fix for Mips .cs
* MC: more fix for Mips .cs
18 lines
688 B
C#
18 lines
688 B
C#
# CS_ARCH_MIPS, CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, None
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0x40,0xac,0x80,0x02 = dmtc0 $t4, $s0, 2
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0x40,0xac,0x80,0x00 = dmtc0 $t4, $s0, 0
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0x40,0x8c,0x80,0x02 = mtc0 $t4, $s0, 2
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0x40,0x8c,0x80,0x00 = mtc0 $t4, $s0, 0
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0x40,0x2c,0x80,0x02 = dmfc0 $t4, $s0, 2
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0x40,0x2c,0x80,0x00 = dmfc0 $t4, $s0, 0
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0x40,0x0c,0x80,0x02 = mfc0 $t4, $s0, 2
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0x40,0x0c,0x80,0x00 = mfc0 $t4, $s0, 0
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0x48,0xac,0x80,0x02 = dmtc2 $t4, $s0, 2
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0x48,0xac,0x80,0x00 = dmtc2 $t4, $s0, 0
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0x48,0x8c,0x80,0x02 = mtc2 $t4, $s0, 2
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0x48,0x8c,0x80,0x00 = mtc2 $t4, $s0, 0
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0x48,0x2c,0x80,0x02 = dmfc2 $t4, $s0, 2
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0x48,0x2c,0x80,0x00 = dmfc2 $t4, $s0, 0
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0x48,0x0c,0x80,0x02 = mfc2 $t4, $s0, 2
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0x48,0x0c,0x80,0x00 = mfc2 $t4, $s0, 0
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