UefiCpuPkg: Add MicrocodeLib for loading microcode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3303 Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com>
This commit is contained in:
Ray Ni
mergify[bot]
parent
19d5bccc76
commit
1a957f17bc
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/** @file
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Public include file for Microcode library.
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef MICROCODE_LIB_H_
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#define MICROCODE_LIB_H_
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#include <Register/Intel/Microcode.h>
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#include <Ppi/ShadowMicrocode.h>
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/**
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Get microcode update signature of currently loaded microcode update.
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@return Microcode signature.
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**/
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UINT32
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EFIAPI
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GetProcessorMicrocodeSignature (
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VOID
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);
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/**
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Get the processor signature and platform ID for current processor.
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@param MicrocodeCpuId Return the processor signature and platform ID.
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**/
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VOID
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EFIAPI
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GetProcessorMicrocodeCpuId (
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EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuId
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);
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/**
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Return the total size of the microcode entry.
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Logic follows pseudo code in SDM as below:
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N = 512
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If (Update.DataSize != 00000000H)
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N = Update.TotalSize / 4
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If Microcode is NULL, then ASSERT.
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@param Microcode Pointer to the microcode entry.
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@return The microcode total size.
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**/
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UINT32
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EFIAPI
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GetMicrocodeLength (
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IN CPU_MICROCODE_HEADER *Microcode
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);
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/**
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Load the microcode to the processor.
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If Microcode is NULL, then ASSERT.
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@param Microcode Pointer to the microcode entry.
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**/
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VOID
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EFIAPI
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LoadMicrocode (
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IN CPU_MICROCODE_HEADER *Microcode
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);
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/**
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Detect whether specified processor can find matching microcode patch and load it.
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Microcode format is as below:
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+----------------------------------------+-------------------------------------------------+
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| CPU_MICROCODE_HEADER | |
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+----------------------------------------+ V
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| Update Data | CPU_MICROCODE_HEADER.Checksum
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+----------------------------------------+-------+ ^
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| CPU_MICROCODE_EXTENDED_TABLE_HEADER | | |
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+----------------------------------------+ V |
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| CPU_MICROCODE_EXTENDED_TABLE[0] | CPU_MICROCODE_EXTENDED_TABLE_HEADER.Checksum |
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| CPU_MICROCODE_EXTENDED_TABLE[1] | ^ |
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| ... | | |
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+----------------------------------------+-------+-----------------------------------------+
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There may by multiple CPU_MICROCODE_EXTENDED_TABLE in this format.
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The count of CPU_MICROCODE_EXTENDED_TABLE is indicated by ExtendedSignatureCount
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of CPU_MICROCODE_EXTENDED_TABLE_HEADER structure.
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If Microcode is NULL, then ASSERT.
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@param Microcode Pointer to a microcode entry.
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@param MicrocodeLength The total length of the microcode entry.
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@param MinimumRevision The microcode whose revision <= MinimumRevision is treated as invalid.
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Caller can supply value get from GetProcessorMicrocodeSignature() to check
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whether the microcode is newer than loaded one.
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Caller can supply 0 to treat any revision (except 0) microcode as valid.
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@param MicrocodeCpuIds Pointer to an array of processor signature and platform ID that represents
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a set of processors.
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Caller can supply zero-element array to skip the processor signature and
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platform ID check.
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@param MicrocodeCpuIdCount The number of elements in MicrocodeCpuIds.
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@param VerifyChecksum FALSE to skip all the checksum verifications.
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@retval TRUE The microcode is valid.
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@retval FALSE The microcode is invalid.
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**/
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BOOLEAN
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EFIAPI
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IsValidMicrocode (
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IN CPU_MICROCODE_HEADER *Microcode,
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IN UINTN MicrocodeLength,
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IN UINT32 MinimumRevision,
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IN EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuIds,
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IN UINTN MicrocodeCpuIdCount,
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IN BOOLEAN VerifyChecksum
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);
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#endif
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@ -0,0 +1,322 @@
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/** @file
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Implementation of MicrocodeLib.
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Uefi/UefiBaseType.h>
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#include <Register/Intel/Cpuid.h>
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#include <Register/Intel/ArchitecturalMsr.h>
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#include <Register/Intel/Microcode.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Ppi/ShadowMicrocode.h>
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/**
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Get microcode update signature of currently loaded microcode update.
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@return Microcode signature.
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**/
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UINT32
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EFIAPI
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GetProcessorMicrocodeSignature (
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VOID
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)
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{
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MSR_IA32_BIOS_SIGN_ID_REGISTER BiosSignIdMsr;
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AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);
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AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
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BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);
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return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;
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}
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/**
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Get the processor signature and platform ID for current processor.
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@param MicrocodeCpuId Return the processor signature and platform ID.
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**/
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VOID
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EFIAPI
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GetProcessorMicrocodeCpuId (
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EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuId
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)
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{
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MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;
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ASSERT (MicrocodeCpuId != NULL);
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PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);
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MicrocodeCpuId->PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;
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AsmCpuid (CPUID_VERSION_INFO, &MicrocodeCpuId->ProcessorSignature, NULL, NULL, NULL);
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}
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/**
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Return the total size of the microcode entry.
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Logic follows pseudo code in SDM as below:
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N = 512
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If (Update.DataSize != 00000000H)
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N = Update.TotalSize / 4
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If Microcode is NULL, then ASSERT.
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@param Microcode Pointer to the microcode entry.
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@return The microcode total size.
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**/
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UINT32
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EFIAPI
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GetMicrocodeLength (
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IN CPU_MICROCODE_HEADER *Microcode
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)
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{
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UINT32 TotalSize;
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ASSERT (Microcode != NULL);
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TotalSize = 2048;
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if (Microcode->DataSize != 0) {
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TotalSize = Microcode->TotalSize;
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}
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return TotalSize;
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}
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/**
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Load the microcode to the processor.
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If Microcode is NULL, then ASSERT.
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@param Microcode Pointer to the microcode entry.
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**/
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VOID
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EFIAPI
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LoadMicrocode (
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IN CPU_MICROCODE_HEADER *Microcode
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)
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{
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ASSERT (Microcode != NULL);
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AsmWriteMsr64 (MSR_IA32_BIOS_UPDT_TRIG, (UINT64) (UINTN) (Microcode + 1));
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}
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/**
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Determine if a microcode patch matchs the specific processor signature and flag.
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@param[in] ProcessorSignature The processor signature field value in a
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microcode patch.
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@param[in] ProcessorFlags The processor flags field value in a
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microcode patch.
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@param[in] MicrocodeCpuId A pointer to an array of EDKII_PEI_MICROCODE_CPU_ID
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structures.
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@param[in] MicrocodeCpuIdCount Number of elements in MicrocodeCpuId array.
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@retval TRUE The specified microcode patch matches to one of the MicrocodeCpuId.
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@retval FALSE The specified microcode patch doesn't match to any of the MicrocodeCpuId.
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**/
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BOOLEAN
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IsProcessorMatchedMicrocode (
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IN UINT32 ProcessorSignature,
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IN UINT32 ProcessorFlags,
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IN EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuId,
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IN UINTN MicrocodeCpuIdCount
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)
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{
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UINTN Index;
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if (MicrocodeCpuIdCount == 0) {
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return TRUE;
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}
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for (Index = 0; Index < MicrocodeCpuIdCount; Index++) {
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if ((ProcessorSignature == MicrocodeCpuId[Index].ProcessorSignature) &&
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(ProcessorFlags & (1 << MicrocodeCpuId[Index].PlatformId)) != 0) {
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return TRUE;
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}
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}
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return FALSE;
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}
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/**
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Detect whether specified processor can find matching microcode patch and load it.
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Microcode format is as below:
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+----------------------------------------+-------------------------------------------------+
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| CPU_MICROCODE_HEADER | |
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+----------------------------------------+ V
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| Update Data | CPU_MICROCODE_HEADER.Checksum
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+----------------------------------------+-------+ ^
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| CPU_MICROCODE_EXTENDED_TABLE_HEADER | | |
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+----------------------------------------+ V |
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| CPU_MICROCODE_EXTENDED_TABLE[0] | CPU_MICROCODE_EXTENDED_TABLE_HEADER.Checksum |
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| CPU_MICROCODE_EXTENDED_TABLE[1] | ^ |
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| ... | | |
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+----------------------------------------+-------+-----------------------------------------+
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There may by multiple CPU_MICROCODE_EXTENDED_TABLE in this format.
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The count of CPU_MICROCODE_EXTENDED_TABLE is indicated by ExtendedSignatureCount
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of CPU_MICROCODE_EXTENDED_TABLE_HEADER structure.
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If Microcode is NULL, then ASSERT.
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@param Microcode Pointer to a microcode entry.
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@param MicrocodeLength The total length of the microcode entry.
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@param MinimumRevision The microcode whose revision <= MinimumRevision is treated as invalid.
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Caller can supply value get from GetProcessorMicrocodeSignature() to check
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whether the microcode is newer than loaded one.
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Caller can supply 0 to treat any revision (except 0) microcode as valid.
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@param MicrocodeCpuIds Pointer to an array of processor signature and platform ID that represents
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a set of processors.
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Caller can supply zero-element array to skip the processor signature and
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platform ID check.
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@param MicrocodeCpuIdCount The number of elements in MicrocodeCpuIds.
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@param VerifyChecksum FALSE to skip all the checksum verifications.
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@retval TRUE The microcode is valid.
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@retval FALSE The microcode is invalid.
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**/
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BOOLEAN
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EFIAPI
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IsValidMicrocode (
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IN CPU_MICROCODE_HEADER *Microcode,
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IN UINTN MicrocodeLength,
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IN UINT32 MinimumRevision,
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IN EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuIds,
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IN UINTN MicrocodeCpuIdCount,
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IN BOOLEAN VerifyChecksum
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)
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{
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UINTN Index;
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UINT32 DataSize;
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UINT32 TotalSize;
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CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
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CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;
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UINT32 ExtendedTableLength;
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UINT32 Sum32;
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BOOLEAN Match;
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ASSERT (Microcode != NULL);
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//
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// It's invalid when:
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// the input microcode buffer is so small that even cannot contain the header.
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// the input microcode buffer is so large that exceeds MAX_ADDRESS.
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//
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if ((MicrocodeLength < sizeof (CPU_MICROCODE_HEADER)) || (MicrocodeLength > (MAX_ADDRESS - (UINTN) Microcode))) {
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return FALSE;
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}
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//
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// Per SDM, HeaderVersion and LoaderRevision should both be 1.
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//
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if ((Microcode->HeaderVersion != 1) || (Microcode->LoaderRevision != 1)) {
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return FALSE;
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}
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//
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// The microcode revision should be larger than the minimum revision.
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//
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if (Microcode->UpdateRevision <= MinimumRevision) {
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return FALSE;
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}
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DataSize = Microcode->DataSize;
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if (DataSize == 0) {
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DataSize = 2000;
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}
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//
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// Per SDM, DataSize should be multiple of DWORDs.
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//
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if ((DataSize % 4) != 0) {
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return FALSE;
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}
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TotalSize = GetMicrocodeLength (Microcode);
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//
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// Check whether the whole microcode is within the buffer.
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// TotalSize should be multiple of 1024.
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//
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if (((TotalSize % SIZE_1KB) != 0) || (TotalSize > MicrocodeLength)) {
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return FALSE;
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}
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//
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// The summation of all DWORDs in microcode should be zero.
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//
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if (VerifyChecksum && (CalculateSum32 ((UINT32 *) Microcode, TotalSize) != 0)) {
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return FALSE;
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}
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Sum32 = Microcode->ProcessorSignature.Uint32 + Microcode->ProcessorFlags + Microcode->Checksum;
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//
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// Check the processor signature and platform ID in the primary header.
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//
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Match = IsProcessorMatchedMicrocode (
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Microcode->ProcessorSignature.Uint32,
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Microcode->ProcessorFlags,
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MicrocodeCpuIds,
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MicrocodeCpuIdCount
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);
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if (Match) {
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return TRUE;
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}
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ExtendedTableLength = TotalSize - (DataSize + sizeof (CPU_MICROCODE_HEADER));
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if ((ExtendedTableLength < sizeof (CPU_MICROCODE_EXTENDED_TABLE_HEADER)) || ((ExtendedTableLength % 4) != 0)) {
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return FALSE;
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}
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//
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// Extended Table exist, check if the CPU in support list
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//
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ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINTN) (Microcode + 1) + DataSize);
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||||||
|
if (ExtendedTableHeader->ExtendedSignatureCount > MAX_UINT32 / sizeof (CPU_MICROCODE_EXTENDED_TABLE)) {
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
|
if (ExtendedTableHeader->ExtendedSignatureCount * sizeof (CPU_MICROCODE_EXTENDED_TABLE)
|
||||||
|
> ExtendedTableLength - sizeof (CPU_MICROCODE_EXTENDED_TABLE_HEADER)) {
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
|
//
|
||||||
|
// Check the extended table checksum
|
||||||
|
//
|
||||||
|
if (VerifyChecksum && (CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength) != 0)) {
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
|
|
||||||
|
ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);
|
||||||
|
for (Index = 0; Index < ExtendedTableHeader->ExtendedSignatureCount; Index ++) {
|
||||||
|
if (VerifyChecksum &&
|
||||||
|
(ExtendedTable[Index].ProcessorSignature.Uint32 + ExtendedTable[Index].ProcessorFlag
|
||||||
|
+ ExtendedTable[Index].Checksum != Sum32)) {
|
||||||
|
//
|
||||||
|
// The extended table entry is valid when the summation of Processor Signature, Processor Flags
|
||||||
|
// and Checksum equal to the coresponding summation from primary header. Because:
|
||||||
|
// CalculateSum32 (Header + Update Binary) == 0
|
||||||
|
// CalculateSum32 (Header + Update Binary)
|
||||||
|
// - (Header.ProcessorSignature + Header.ProcessorFlag + Header.Checksum)
|
||||||
|
// + (Extended.ProcessorSignature + Extended.ProcessorFlag + Extended.Checksum) == 0
|
||||||
|
// So,
|
||||||
|
// (Header.ProcessorSignature + Header.ProcessorFlag + Header.Checksum)
|
||||||
|
// == (Extended.ProcessorSignature + Extended.ProcessorFlag + Extended.Checksum)
|
||||||
|
//
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
Match = IsProcessorMatchedMicrocode (
|
||||||
|
ExtendedTable[Index].ProcessorSignature.Uint32,
|
||||||
|
ExtendedTable[Index].ProcessorFlag,
|
||||||
|
MicrocodeCpuIds,
|
||||||
|
MicrocodeCpuIdCount
|
||||||
|
);
|
||||||
|
if (Match) {
|
||||||
|
return TRUE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,32 @@
|
||||||
|
## @file
|
||||||
|
# Library for microcode verification and load.
|
||||||
|
#
|
||||||
|
# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
|
||||||
|
#
|
||||||
|
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||||
|
#
|
||||||
|
#
|
||||||
|
##
|
||||||
|
|
||||||
|
[Defines]
|
||||||
|
INF_VERSION = 0x00010006
|
||||||
|
BASE_NAME = MicrocodeLib
|
||||||
|
FILE_GUID = EB8C72BC-8A48-4F80-996B-E52F68416D57
|
||||||
|
MODULE_TYPE = BASE
|
||||||
|
VERSION_STRING = 1.0
|
||||||
|
LIBRARY_CLASS = MicrocodeLib
|
||||||
|
|
||||||
|
#
|
||||||
|
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||||
|
#
|
||||||
|
|
||||||
|
[Sources.common]
|
||||||
|
MicrocodeLib.c
|
||||||
|
|
||||||
|
[Packages]
|
||||||
|
MdePkg/MdePkg.dec
|
||||||
|
UefiCpuPkg/UefiCpuPkg.dec
|
||||||
|
|
||||||
|
[LibraryClasses]
|
||||||
|
BaseLib
|
||||||
|
DebugLib
|
||||||
|
|
@ -1,7 +1,7 @@
|
||||||
## @file UefiCpuPkg.dec
|
## @file UefiCpuPkg.dec
|
||||||
# This Package provides UEFI compatible CPU modules and libraries.
|
# This Package provides UEFI compatible CPU modules and libraries.
|
||||||
#
|
#
|
||||||
# Copyright (c) 2007 - 2020, Intel Corporation. All rights reserved.<BR>
|
# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>
|
||||||
#
|
#
|
||||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||||
#
|
#
|
||||||
|
|
@ -59,6 +59,9 @@
|
||||||
## @libraryclass Provides function to get CPU cache information.
|
## @libraryclass Provides function to get CPU cache information.
|
||||||
CpuCacheInfoLib|Include/Library/CpuCacheInfoLib.h
|
CpuCacheInfoLib|Include/Library/CpuCacheInfoLib.h
|
||||||
|
|
||||||
|
## @libraryclass Provides function for loading microcode.
|
||||||
|
MicrocodeLib|Include/Library/MicrocodeLib.h
|
||||||
|
|
||||||
[Guids]
|
[Guids]
|
||||||
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
|
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
|
||||||
gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
|
gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
|
||||||
|
|
|
||||||
|
|
@ -60,6 +60,7 @@
|
||||||
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
|
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
|
||||||
TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
|
TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
|
||||||
VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf
|
VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf
|
||||||
|
MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
|
||||||
|
|
||||||
[LibraryClasses.common.SEC]
|
[LibraryClasses.common.SEC]
|
||||||
PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
|
PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
|
||||||
|
|
@ -147,6 +148,7 @@
|
||||||
UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
|
UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
|
||||||
UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
|
UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
|
||||||
UefiCpuPkg/Library/MpInitLibUp/MpInitLibUp.inf
|
UefiCpuPkg/Library/MpInitLibUp/MpInitLibUp.inf
|
||||||
|
UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
|
||||||
UefiCpuPkg/Library/MtrrLib/MtrrLib.inf
|
UefiCpuPkg/Library/MtrrLib/MtrrLib.inf
|
||||||
UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
|
UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
|
||||||
UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.inf
|
UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.inf
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue