diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index a328146b69..9622444ec6 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -391,12 +391,6 @@ ArmSetHighVectors ( VOID ); -VOID -EFIAPI -ArmDrainWriteBuffer ( - VOID - ); - VOID EFIAPI ArmDataMemoryBarrier ( diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c index dec125f248..ec35097b40 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -33,7 +33,7 @@ AArch64DataCacheOperation ( AArch64AllDataCachesOperation (DataCacheOperation); - ArmDrainWriteBuffer (); + ArmDataSynchronizationBarrier (); if (SavedInterruptState) { ArmEnableInterrupts (); @@ -46,7 +46,7 @@ ArmInvalidateDataCache ( VOID ) { - ArmDrainWriteBuffer (); + ArmDataSynchronizationBarrier (); AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay); } @@ -56,7 +56,7 @@ ArmCleanInvalidateDataCache ( VOID ) { - ArmDrainWriteBuffer (); + ArmDataSynchronizationBarrier (); AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay); } @@ -66,6 +66,6 @@ ArmCleanDataCache ( VOID ) { - ArmDrainWriteBuffer (); + ArmDataSynchronizationBarrier (); AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay); } diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S index df2dc935c1..c530d19e89 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -26,7 +26,6 @@ GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA) GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay) GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay) GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay) -GCC_ASM_EXPORT (ArmDrainWriteBuffer) GCC_ASM_EXPORT (ArmEnableMmu) GCC_ASM_EXPORT (ArmDisableMmu) GCC_ASM_EXPORT (ArmDisableCachesAndMmu) @@ -364,7 +363,6 @@ ASM_PFX(ArmDataMemoryBarrier): ASM_PFX(ArmDataSynchronizationBarrier): -ASM_PFX(ArmDrainWriteBuffer): dsb sy ret diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c index b53f455bfa..23a7f2f2bb 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c @@ -32,7 +32,7 @@ ArmV7DataCacheOperation ( ArmV7AllDataCachesOperation (DataCacheOperation); - ArmDrainWriteBuffer (); + ArmDataSynchronizationBarrier (); if (SavedInterruptState) { ArmEnableInterrupts (); @@ -45,7 +45,7 @@ ArmInvalidateDataCache ( VOID ) { - ArmDrainWriteBuffer (); + ArmDataSynchronizationBarrier (); ArmV7DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay); } @@ -55,7 +55,7 @@ ArmCleanInvalidateDataCache ( VOID ) { - ArmDrainWriteBuffer (); + ArmDataSynchronizationBarrier (); ArmV7DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay); } @@ -65,6 +65,6 @@ ArmCleanDataCache ( VOID ) { - ArmDrainWriteBuffer (); + ArmDataSynchronizationBarrier (); ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay); } diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S index 7366eee6dc..5f030d92de 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S @@ -23,7 +23,6 @@ GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA) GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay) GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay) GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay) -GCC_ASM_EXPORT (ArmDrainWriteBuffer) GCC_ASM_EXPORT (ArmEnableMmu) GCC_ASM_EXPORT (ArmDisableMmu) GCC_ASM_EXPORT (ArmDisableCachesAndMmu) @@ -261,7 +260,6 @@ ASM_PFX(ArmDataMemoryBarrier): bx LR ASM_PFX(ArmDataSynchronizationBarrier): -ASM_PFX(ArmDrainWriteBuffer): dsb bx LR diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm index 78a12e1629..542157bef7 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm @@ -20,7 +20,6 @@ EXPORT ArmInvalidateDataCacheEntryBySetWay EXPORT ArmCleanDataCacheEntryBySetWay EXPORT ArmCleanInvalidateDataCacheEntryBySetWay - EXPORT ArmDrainWriteBuffer EXPORT ArmEnableMmu EXPORT ArmDisableMmu EXPORT ArmDisableCachesAndMmu @@ -255,7 +254,6 @@ ArmDataMemoryBarrier bx LR ArmDataSynchronizationBarrier -ArmDrainWriteBuffer dsb bx LR