StandaloneMmPkg : Add MM core fv location PPI

Add MM core FV location PPI, it will include
MM core FV location which could be in FSP-I
or Bootloader MM FV.

Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>

StandaloneMmPkg/Include/Ppi/MmCoreFvLocationPpi.h

@@ -0,0 +1,34 @@
+/** @file
+  MM Core FV location PPI header file.
+
+  MM Core FV location PPI is used by StandaloneMm IPL to find MM Core.
+
+  Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef MM_CORE_FV_LOCATION_PPI_H_
+#define MM_CORE_FV_LOCATION_PPI_H_
+
+#pragma pack(1)
+
+///
+/// Global ID for the MM_CORE_FV_LOCATION_PPI.
+///
+#define MM_CORE_FV_LOCATION_GUID \
+  { \
+    0x47a00618, 0x237a, 0x4386, { 0x8f, 0xc5, 0x2a, 0x86, 0xd8, 0xac, 0x41, 0x05 } \
+  }
+
+typedef struct {
+  EFI_PHYSICAL_ADDRESS    Address;
+  UINT64                  Size;
+} MM_CORE_FV_LOCATION_PPI;
+
+extern EFI_GUID  gMmCoreFvLocationPpiGuid;
+
+#pragma pack()
+
+#endif

StandaloneMmPkg/StandaloneMmPkg.dec

@@ -51,6 +51,9 @@
 
   gEventMmDispatchGuid                     = { 0x7e6efffa, 0x69b4, 0x4c1b, { 0xa4, 0xc7, 0xaf, 0xf9, 0xc9, 0x24, 0x4f, 0xee }}
 
+[Ppis]
+  gMmCoreFvLocationPpiGuid                 = { 0x47a00618, 0x237a, 0x4386, { 0x8f, 0xc5, 0x2a, 0x86, 0xd8, 0xac, 0x41, 0x05 }}
+
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   ## Maximum permitted encapsulation levels of sections in a firmware volume,
   #  in the MM phase. Minimum value is 1. Sections nested more deeply are rejected.