diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 87dbd11b86..b30de9152c 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -82,8 +82,7 @@
   gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002
   # This PCD will free the unallocated buffers if their size reach this threshold.
   # We set the default value to 512MB.
-  gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000043
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003
+  gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004
   gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
 
diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
index 8501e5c613..d8e53df609 100644
--- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
+++ b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
@@ -20,27 +20,20 @@ VOID
 CacheRangeOperation (
   IN  VOID            *Start,
   IN  UINTN           Length,
-  IN  CACHE_OPERATION CacheOperation,
   IN  LINE_OPERATION  LineOperation
   )
 {
   UINTN ArmCacheLineLength         = ArmDataCacheLineLength();
   UINTN ArmCacheLineAlignmentMask  = ArmCacheLineLength - 1;
-  UINTN ArmCacheOperationThreshold = PcdGet32(PcdArmCacheOperationThreshold);
 
-  if ((CacheOperation != NULL) && (Length >= ArmCacheOperationThreshold)) {
-    ArmDrainWriteBuffer ();
-    CacheOperation ();
-  } else {
-    // Align address (rounding down)
-    UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
-    UINTN EndAddress     = (UINTN)Start + Length;
+  // Align address (rounding down)
+  UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
+  UINTN EndAddress     = (UINTN)Start + Length;
 
-    // Perform the line operation on an address in each cache line
-    while (AlignedAddress < EndAddress) {
-      LineOperation(AlignedAddress);
-      AlignedAddress += ArmCacheLineLength;
-    }
+  // Perform the line operation on an address in each cache line
+  while (AlignedAddress < EndAddress) {
+    LineOperation(AlignedAddress);
+    AlignedAddress += ArmCacheLineLength;
   }
 }
 
@@ -70,7 +63,7 @@ InvalidateInstructionCacheRange (
   IN      UINTN                     Length
   )
 {
-  CacheRangeOperation (Address, Length, ArmCleanDataCacheToPoU, ArmCleanDataCacheEntryByMVA);
+  CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryByMVA);
   ArmInvalidateInstructionCache ();
   return Address;
 }
@@ -91,7 +84,7 @@ WriteBackInvalidateDataCacheRange (
   IN      UINTN                     Length
   )
 {
-  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCache, ArmCleanInvalidateDataCacheEntryByMVA);
+  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA);
   return Address;
 }
 
@@ -111,7 +104,7 @@ WriteBackDataCacheRange (
   IN      UINTN                     Length
   )
 {
-  CacheRangeOperation(Address, Length, ArmCleanDataCache, ArmCleanDataCacheEntryByMVA);
+  CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA);
   return Address;
 }
 
@@ -122,6 +115,6 @@ InvalidateDataCacheRange (
   IN      UINTN                     Length
   )
 {
-  CacheRangeOperation(Address, Length, NULL, ArmInvalidateDataCacheEntryByMVA);
+  CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA);
   return Address;
 }
diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
index 5910db09d6..d519972942 100644
--- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+++ b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
@@ -31,6 +31,3 @@
 [LibraryClasses]
   ArmLib
   BaseLib
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
index e5247848b5..dd585dea91 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
@@ -41,6 +41,3 @@
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf b/ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf
index 3a99e1b713..23fbe86731 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf
@@ -43,6 +43,3 @@
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf b/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
index 57ac694cd7..302c09af49 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
@@ -38,6 +38,3 @@
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11Lib.inf b/ArmPkg/Library/ArmLib/Arm11/Arm11Lib.inf
index 32d9299629..6ac74d985c 100644
--- a/ArmPkg/Library/ArmLib/Arm11/Arm11Lib.inf
+++ b/ArmPkg/Library/ArmLib/Arm11/Arm11Lib.inf
@@ -47,5 +47,4 @@
   gArmTokenSpaceGuid.PcdRelocateVectorTable
 
 [FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11LibPrePi.inf b/ArmPkg/Library/ArmLib/Arm11/Arm11LibPrePi.inf
index 94dd03d82c..239493d3e6 100644
--- a/ArmPkg/Library/ArmLib/Arm11/Arm11LibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/Arm11/Arm11LibPrePi.inf
@@ -47,5 +47,4 @@
   gArmTokenSpaceGuid.PcdRelocateVectorTable
 
 [FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11LibSec.inf b/ArmPkg/Library/ArmLib/Arm11/Arm11LibSec.inf
index 69763ed4ff..ef3c8f8f72 100644
--- a/ArmPkg/Library/ArmLib/Arm11/Arm11LibSec.inf
+++ b/ArmPkg/Library/ArmLib/Arm11/Arm11LibSec.inf
@@ -43,5 +43,4 @@
   gArmTokenSpaceGuid.PcdRelocateVectorTable
 
 [FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf
index 81661b2391..e8aa056fbf 100644
--- a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf
+++ b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf
@@ -41,6 +41,3 @@
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf
index 0730487cfb..556e3dc5ab 100644
--- a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf
@@ -41,6 +41,3 @@
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
index 55c0ec661a..01bdfb6996 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
@@ -48,6 +48,3 @@
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
index bc403d5613..ac081068db 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
@@ -48,6 +48,3 @@
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
index 4081d1a3e5..a958764f56 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
@@ -42,6 +42,3 @@
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold
diff --git a/ArmPkg/Library/ArmLib/Null/NullArmLib.inf b/ArmPkg/Library/ArmLib/Null/NullArmLib.inf
index 21c374f0b2..36860a7bf9 100644
--- a/ArmPkg/Library/ArmLib/Null/NullArmLib.inf
+++ b/ArmPkg/Library/ArmLib/Null/NullArmLib.inf
@@ -40,6 +40,3 @@
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold